* [Intel-gfx] [PATCH i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
@ 2020-12-16 15:28 ` Tvrtko Ursulin
0 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 15:28 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Analoguous to top(1) we can enable the user to exit from the tool by
pressing 'q' on the console.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 6 ++++
tools/intel_gpu_top.c | 77 +++++++++++++++++++++++++++++++++++--------
2 files changed, 70 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 5552e9699d26..2e0c3a05acc1 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -48,6 +48,12 @@ OPTIONS
-d
Select a specific GPU using supported filter.
+RUNTIME CONTROL
+===============
+
+Supported keys:
+
+ 'q' Exit from the tool.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index dbd353673e55..68911940f1d0 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -23,24 +23,26 @@
#include "igt_device_scan.h"
-#include <stdio.h>
-#include <sys/types.h>
-#include <dirent.h>
-#include <stdint.h>
#include <assert.h>
-#include <string.h>
#include <ctype.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/stat.h>
+#include <dirent.h>
+#include <errno.h>
#include <fcntl.h>
#include <inttypes.h>
-#include <sys/ioctl.h>
-#include <errno.h>
-#include <math.h>
-#include <locale.h>
#include <limits.h>
+#include <locale.h>
+#include <math.h>
+#include <poll.h>
#include <signal.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <termios.h>
#include "igt_perf.h"
@@ -1246,6 +1248,54 @@ static char *tr_pmu_name(struct igt_device_card *card)
return device;
}
+static void interactive_stdin(void)
+{
+ struct termios termios = { };
+ int ret;
+
+ ret = fcntl(0, F_GETFL, NULL);
+ ret |= O_NONBLOCK;
+ ret = fcntl(0, F_SETFL, ret);
+ assert(ret == 0);
+
+ ret = tcgetattr(0, &termios);
+ assert(ret == 0);
+
+ termios.c_lflag &= ~ICANON;
+ termios.c_cc[VMIN] = 1;
+ termios.c_cc[VTIME] = 0; /* Deciseconds only - we'll use poll. */
+
+ ret = tcsetattr(0, TCSAFLUSH, &termios);
+ assert(ret == 0);
+}
+
+static void process_stdin(unsigned int timeout_us)
+{
+ struct pollfd p = { .fd = 0, .events = POLLIN };
+ int ret;
+
+ ret = poll(&p, 1, timeout_us / 1000);
+ if (ret <= 0) {
+ if (ret < 0)
+ stop_top = true;
+ return;
+ }
+
+ for (;;) {
+ char c;
+
+ ret = read(0, &c, 1);
+ if (ret <= 0)
+ break;
+
+ switch (c) {
+ case 'q':
+ stop_top = true;
+ break;
+ };
+ }
+}
+
int main(int argc, char **argv)
{
unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
@@ -1315,6 +1365,7 @@ int main(int argc, char **argv)
switch (output_mode) {
case INTERACTIVE:
pops = &term_pops;
+ interactive_stdin();
break;
case STDOUT:
pops = &stdout_pops;
@@ -1427,7 +1478,7 @@ int main(int argc, char **argv)
if (stop_top)
break;
- usleep(period_us);
+ process_stdin(period_us);
}
free(codename);
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [igt-dev] [PATCH i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
@ 2020-12-16 15:28 ` Tvrtko Ursulin
0 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 15:28 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Analoguous to top(1) we can enable the user to exit from the tool by
pressing 'q' on the console.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 6 ++++
tools/intel_gpu_top.c | 77 +++++++++++++++++++++++++++++++++++--------
2 files changed, 70 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 5552e9699d26..2e0c3a05acc1 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -48,6 +48,12 @@ OPTIONS
-d
Select a specific GPU using supported filter.
+RUNTIME CONTROL
+===============
+
+Supported keys:
+
+ 'q' Exit from the tool.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index dbd353673e55..68911940f1d0 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -23,24 +23,26 @@
#include "igt_device_scan.h"
-#include <stdio.h>
-#include <sys/types.h>
-#include <dirent.h>
-#include <stdint.h>
#include <assert.h>
-#include <string.h>
#include <ctype.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/stat.h>
+#include <dirent.h>
+#include <errno.h>
#include <fcntl.h>
#include <inttypes.h>
-#include <sys/ioctl.h>
-#include <errno.h>
-#include <math.h>
-#include <locale.h>
#include <limits.h>
+#include <locale.h>
+#include <math.h>
+#include <poll.h>
#include <signal.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <termios.h>
#include "igt_perf.h"
@@ -1246,6 +1248,54 @@ static char *tr_pmu_name(struct igt_device_card *card)
return device;
}
+static void interactive_stdin(void)
+{
+ struct termios termios = { };
+ int ret;
+
+ ret = fcntl(0, F_GETFL, NULL);
+ ret |= O_NONBLOCK;
+ ret = fcntl(0, F_SETFL, ret);
+ assert(ret == 0);
+
+ ret = tcgetattr(0, &termios);
+ assert(ret == 0);
+
+ termios.c_lflag &= ~ICANON;
+ termios.c_cc[VMIN] = 1;
+ termios.c_cc[VTIME] = 0; /* Deciseconds only - we'll use poll. */
+
+ ret = tcsetattr(0, TCSAFLUSH, &termios);
+ assert(ret == 0);
+}
+
+static void process_stdin(unsigned int timeout_us)
+{
+ struct pollfd p = { .fd = 0, .events = POLLIN };
+ int ret;
+
+ ret = poll(&p, 1, timeout_us / 1000);
+ if (ret <= 0) {
+ if (ret < 0)
+ stop_top = true;
+ return;
+ }
+
+ for (;;) {
+ char c;
+
+ ret = read(0, &c, 1);
+ if (ret <= 0)
+ break;
+
+ switch (c) {
+ case 'q':
+ stop_top = true;
+ break;
+ };
+ }
+}
+
int main(int argc, char **argv)
{
unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
@@ -1315,6 +1365,7 @@ int main(int argc, char **argv)
switch (output_mode) {
case INTERACTIVE:
pops = &term_pops;
+ interactive_stdin();
break;
case STDOUT:
pops = &stdout_pops;
@@ -1427,7 +1478,7 @@ int main(int argc, char **argv)
if (stop_top)
break;
- usleep(period_us);
+ process_stdin(period_us);
}
free(codename);
--
2.25.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
@ 2020-12-16 15:28 ` Tvrtko Ursulin
-1 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 15:28 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Similarly to how top(1) handles SMP, we can default to showing engines of
a same class as a single bar graph entry.
To achieve this a little bit of hackery is employed. PMU sampling is left
as is and only at the presentation layer we create a fake set of engines,
one for each class, summing and normalizing the load respectively.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 1 +
tools/intel_gpu_top.c | 192 +++++++++++++++++++++++++++++++++++++++---
2 files changed, 180 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 2e0c3a05acc1..35ab10da9bb4 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -54,6 +54,7 @@ RUNTIME CONTROL
Supported keys:
'q' Exit from the tool.
+ '1' Toggle between aggregated engine class and physical engine mode.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 68911940f1d0..8c4280aa19b9 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -76,8 +76,16 @@ struct engine {
struct pmu_counter sema;
};
+struct engine_class {
+ unsigned int class;
+ const char *name;
+ unsigned int num_engines;
+};
+
struct engines {
unsigned int num_engines;
+ unsigned int num_classes;
+ struct engine_class *class;
unsigned int num_counters;
DIR *root;
int fd;
@@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
return lines;
}
+static bool class_view;
+
static int
print_engines_header(struct engines *engines, double t,
int lines, int con_w, int con_h)
@@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
pops->open_struct("engines");
if (output_mode == INTERACTIVE) {
- const char *a = " ENGINE BUSY ";
const char *b = " MI_SEMA MI_WAIT";
+ const char *a;
+
+ if (class_view)
+ a = " ENGINES BUSY ";
+ else
+ a = " ENGINE BUSY ";
printf("\033[7m%s%*s%s\033[0m\n",
a, (int)(con_w - 1 - strlen(a) - strlen(b)),
@@ -1214,6 +1229,164 @@ print_engines_footer(struct engines *engines, double t,
return lines;
}
+static int class_cmp(const void *_a, const void *_b)
+{
+ const struct engine_class *a = _a;
+ const struct engine_class *b = _b;
+
+ return a->class - b->class;
+}
+
+static void init_engine_classes(struct engines *engines)
+{
+ struct engine_class *classes;
+ unsigned int i, num;
+ int max = -1;
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ if ((int)engine->class > max)
+ max = engine->class;
+ }
+ assert(max >= 0);
+
+ num = max + 1;
+
+ classes = calloc(num, sizeof(*classes));
+ assert(classes);
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ classes[engine->class].num_engines++;
+ }
+
+ for (i = 0; i < num; i++) {
+ classes[i].class = i;
+ classes[i].name = class_display_name(i);
+ }
+
+ qsort(classes, num, sizeof(*classes), class_cmp);
+
+ engines->num_classes = num;
+ engines->class = classes;
+}
+
+static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
+{
+ dst->prev += src->prev;
+ dst->cur += src->cur;
+}
+
+static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
+{
+ val->prev /= n;
+ val->cur /= n;
+}
+
+static struct engines *init_classes(struct engines *engines)
+{
+ struct engines *classes;
+ unsigned int i, j;
+
+ init_engine_classes(engines);
+
+ classes = calloc(1, sizeof(struct engines) +
+ engines->num_classes * sizeof(struct engine));
+ assert(classes);
+
+ classes->num_engines = engines->num_classes;
+ classes->num_classes = engines->num_classes;
+ classes->class = engines->class;
+
+ for (i = 0; i < engines->num_classes; i++) {
+ struct engine *engine = engine_ptr(classes, i);
+
+ engine->class = i;
+ engine->instance = -1;
+
+ if (!engines->class[i].num_engines)
+ continue;
+
+ engine->display_name = strdup(class_display_name(i));
+ assert(engine->display_name);
+ engine->short_name = strdup(class_short_name(i));
+ assert(engine->short_name);
+
+ for (j = 0; j < engines->num_engines; j++) {
+ struct engine *e = engine_ptr(engines, j);
+
+ if (e->class == i) {
+ engine->num_counters = e->num_counters;
+ engine->busy = e->busy;
+ engine->sema = e->sema;
+ engine->wait = e->wait;
+ }
+ }
+ }
+
+ return classes;
+}
+
+static struct engines *
+update_classes(struct engines *classes, struct engines *engines)
+{
+ unsigned int i, j;
+
+ if (!classes)
+ classes = init_classes(engines);
+
+ for (i = 0; i < classes->num_engines; i++) {
+ unsigned int num_engines = classes->class[i].num_engines;
+ struct engine *engine = engine_ptr(classes, i);
+
+ if (!num_engines)
+ continue;
+
+ memset(&engine->busy.val, 0, sizeof(engine->busy.val));
+ memset(&engine->sema.val, 0, sizeof(engine->sema.val));
+ memset(&engine->wait.val, 0, sizeof(engine->wait.val));
+
+ for (j = 0; j < engines->num_engines; j++) {
+ struct engine *e = engine_ptr(engines, j);
+
+ if (e->class == i) {
+ __pmu_sum(&engine->busy.val, &e->busy.val);
+ __pmu_sum(&engine->sema.val, &e->sema.val);
+ __pmu_sum(&engine->wait.val, &e->wait.val);
+ }
+ }
+
+ __pmu_normalize(&engine->busy.val, num_engines);
+ __pmu_normalize(&engine->sema.val, num_engines);
+ __pmu_normalize(&engine->wait.val, num_engines);
+ }
+
+ return classes;
+}
+
+static int
+print_engines(struct engines *engines, double t, int lines, int w, int h)
+{
+ static struct engines *classes;
+ struct engines *show;
+
+ if (class_view)
+ classes = show = update_classes(classes, engines);
+ else
+ show = engines;
+
+ lines = print_engines_header(show, t, lines, w, h);
+
+ for (unsigned int i = 0; i < show->num_engines && lines < h; i++)
+ lines = print_engine(show, i, t, lines, w, h);
+
+ lines = print_engines_footer(show, t, lines, w, h);
+
+ return lines;
+}
+
static bool stop_top;
static void sigint_handler(int sig)
@@ -1292,6 +1465,9 @@ static void process_stdin(unsigned int timeout_us)
case 'q':
stop_top = true;
break;
+ case '1':
+ class_view ^= true;
+ break;
};
}
}
@@ -1302,7 +1478,6 @@ int main(int argc, char **argv)
int con_w = -1, con_h = -1;
char *output_path = NULL;
struct engines *engines;
- unsigned int i;
int ret = 0, ch;
bool list_device = false;
char *pmu_device, *opt_device = NULL;
@@ -1366,6 +1541,7 @@ int main(int argc, char **argv)
case INTERACTIVE:
pops = &term_pops;
interactive_stdin();
+ class_view = true;
break;
case STDOUT:
pops = &stdout_pops;
@@ -1462,17 +1638,7 @@ int main(int argc, char **argv)
lines = print_imc(engines, t, lines, con_w, con_h);
- lines = print_engines_header(engines, t, lines, con_w,
- con_h);
-
- for (i = 0;
- i < engines->num_engines && lines < con_h;
- i++)
- lines = print_engine(engines, i, t, lines,
- con_w, con_h);
-
- lines = print_engines_footer(engines, t, lines, con_w,
- con_h);
+ lines = print_engines(engines, t, lines, con_w, con_h);
}
if (stop_top)
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
@ 2020-12-16 15:28 ` Tvrtko Ursulin
0 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 15:28 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Similarly to how top(1) handles SMP, we can default to showing engines of
a same class as a single bar graph entry.
To achieve this a little bit of hackery is employed. PMU sampling is left
as is and only at the presentation layer we create a fake set of engines,
one for each class, summing and normalizing the load respectively.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 1 +
tools/intel_gpu_top.c | 192 +++++++++++++++++++++++++++++++++++++++---
2 files changed, 180 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 2e0c3a05acc1..35ab10da9bb4 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -54,6 +54,7 @@ RUNTIME CONTROL
Supported keys:
'q' Exit from the tool.
+ '1' Toggle between aggregated engine class and physical engine mode.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 68911940f1d0..8c4280aa19b9 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -76,8 +76,16 @@ struct engine {
struct pmu_counter sema;
};
+struct engine_class {
+ unsigned int class;
+ const char *name;
+ unsigned int num_engines;
+};
+
struct engines {
unsigned int num_engines;
+ unsigned int num_classes;
+ struct engine_class *class;
unsigned int num_counters;
DIR *root;
int fd;
@@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
return lines;
}
+static bool class_view;
+
static int
print_engines_header(struct engines *engines, double t,
int lines, int con_w, int con_h)
@@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
pops->open_struct("engines");
if (output_mode == INTERACTIVE) {
- const char *a = " ENGINE BUSY ";
const char *b = " MI_SEMA MI_WAIT";
+ const char *a;
+
+ if (class_view)
+ a = " ENGINES BUSY ";
+ else
+ a = " ENGINE BUSY ";
printf("\033[7m%s%*s%s\033[0m\n",
a, (int)(con_w - 1 - strlen(a) - strlen(b)),
@@ -1214,6 +1229,164 @@ print_engines_footer(struct engines *engines, double t,
return lines;
}
+static int class_cmp(const void *_a, const void *_b)
+{
+ const struct engine_class *a = _a;
+ const struct engine_class *b = _b;
+
+ return a->class - b->class;
+}
+
+static void init_engine_classes(struct engines *engines)
+{
+ struct engine_class *classes;
+ unsigned int i, num;
+ int max = -1;
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ if ((int)engine->class > max)
+ max = engine->class;
+ }
+ assert(max >= 0);
+
+ num = max + 1;
+
+ classes = calloc(num, sizeof(*classes));
+ assert(classes);
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ classes[engine->class].num_engines++;
+ }
+
+ for (i = 0; i < num; i++) {
+ classes[i].class = i;
+ classes[i].name = class_display_name(i);
+ }
+
+ qsort(classes, num, sizeof(*classes), class_cmp);
+
+ engines->num_classes = num;
+ engines->class = classes;
+}
+
+static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
+{
+ dst->prev += src->prev;
+ dst->cur += src->cur;
+}
+
+static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
+{
+ val->prev /= n;
+ val->cur /= n;
+}
+
+static struct engines *init_classes(struct engines *engines)
+{
+ struct engines *classes;
+ unsigned int i, j;
+
+ init_engine_classes(engines);
+
+ classes = calloc(1, sizeof(struct engines) +
+ engines->num_classes * sizeof(struct engine));
+ assert(classes);
+
+ classes->num_engines = engines->num_classes;
+ classes->num_classes = engines->num_classes;
+ classes->class = engines->class;
+
+ for (i = 0; i < engines->num_classes; i++) {
+ struct engine *engine = engine_ptr(classes, i);
+
+ engine->class = i;
+ engine->instance = -1;
+
+ if (!engines->class[i].num_engines)
+ continue;
+
+ engine->display_name = strdup(class_display_name(i));
+ assert(engine->display_name);
+ engine->short_name = strdup(class_short_name(i));
+ assert(engine->short_name);
+
+ for (j = 0; j < engines->num_engines; j++) {
+ struct engine *e = engine_ptr(engines, j);
+
+ if (e->class == i) {
+ engine->num_counters = e->num_counters;
+ engine->busy = e->busy;
+ engine->sema = e->sema;
+ engine->wait = e->wait;
+ }
+ }
+ }
+
+ return classes;
+}
+
+static struct engines *
+update_classes(struct engines *classes, struct engines *engines)
+{
+ unsigned int i, j;
+
+ if (!classes)
+ classes = init_classes(engines);
+
+ for (i = 0; i < classes->num_engines; i++) {
+ unsigned int num_engines = classes->class[i].num_engines;
+ struct engine *engine = engine_ptr(classes, i);
+
+ if (!num_engines)
+ continue;
+
+ memset(&engine->busy.val, 0, sizeof(engine->busy.val));
+ memset(&engine->sema.val, 0, sizeof(engine->sema.val));
+ memset(&engine->wait.val, 0, sizeof(engine->wait.val));
+
+ for (j = 0; j < engines->num_engines; j++) {
+ struct engine *e = engine_ptr(engines, j);
+
+ if (e->class == i) {
+ __pmu_sum(&engine->busy.val, &e->busy.val);
+ __pmu_sum(&engine->sema.val, &e->sema.val);
+ __pmu_sum(&engine->wait.val, &e->wait.val);
+ }
+ }
+
+ __pmu_normalize(&engine->busy.val, num_engines);
+ __pmu_normalize(&engine->sema.val, num_engines);
+ __pmu_normalize(&engine->wait.val, num_engines);
+ }
+
+ return classes;
+}
+
+static int
+print_engines(struct engines *engines, double t, int lines, int w, int h)
+{
+ static struct engines *classes;
+ struct engines *show;
+
+ if (class_view)
+ classes = show = update_classes(classes, engines);
+ else
+ show = engines;
+
+ lines = print_engines_header(show, t, lines, w, h);
+
+ for (unsigned int i = 0; i < show->num_engines && lines < h; i++)
+ lines = print_engine(show, i, t, lines, w, h);
+
+ lines = print_engines_footer(show, t, lines, w, h);
+
+ return lines;
+}
+
static bool stop_top;
static void sigint_handler(int sig)
@@ -1292,6 +1465,9 @@ static void process_stdin(unsigned int timeout_us)
case 'q':
stop_top = true;
break;
+ case '1':
+ class_view ^= true;
+ break;
};
}
}
@@ -1302,7 +1478,6 @@ int main(int argc, char **argv)
int con_w = -1, con_h = -1;
char *output_path = NULL;
struct engines *engines;
- unsigned int i;
int ret = 0, ch;
bool list_device = false;
char *pmu_device, *opt_device = NULL;
@@ -1366,6 +1541,7 @@ int main(int argc, char **argv)
case INTERACTIVE:
pops = &term_pops;
interactive_stdin();
+ class_view = true;
break;
case STDOUT:
pops = &stdout_pops;
@@ -1462,17 +1638,7 @@ int main(int argc, char **argv)
lines = print_imc(engines, t, lines, con_w, con_h);
- lines = print_engines_header(engines, t, lines, con_w,
- con_h);
-
- for (i = 0;
- i < engines->num_engines && lines < con_h;
- i++)
- lines = print_engine(engines, i, t, lines,
- con_w, con_h);
-
- lines = print_engines_footer(engines, t, lines, con_w,
- con_h);
+ lines = print_engines(engines, t, lines, con_w, con_h);
}
if (stop_top)
--
2.25.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
@ 2020-12-16 15:44 ` Chris Wilson
-1 siblings, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 15:44 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2020-12-16 15:28:08)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Analoguous to top(1) we can enable the user to exit from the tool by
> pressing 'q' on the console.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> man/intel_gpu_top.rst | 6 ++++
> tools/intel_gpu_top.c | 77 +++++++++++++++++++++++++++++++++++--------
> 2 files changed, 70 insertions(+), 13 deletions(-)
>
> diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
> index 5552e9699d26..2e0c3a05acc1 100644
> --- a/man/intel_gpu_top.rst
> +++ b/man/intel_gpu_top.rst
> @@ -48,6 +48,12 @@ OPTIONS
> -d
> Select a specific GPU using supported filter.
>
> +RUNTIME CONTROL
> +===============
> +
> +Supported keys:
> +
> + 'q' Exit from the tool.
>
> DEVICE SELECTION
> ================
> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
> index dbd353673e55..68911940f1d0 100644
> --- a/tools/intel_gpu_top.c
> +++ b/tools/intel_gpu_top.c
> @@ -23,24 +23,26 @@
>
> #include "igt_device_scan.h"
>
> -#include <stdio.h>
> -#include <sys/types.h>
> -#include <dirent.h>
> -#include <stdint.h>
> #include <assert.h>
> -#include <string.h>
> #include <ctype.h>
> -#include <stdlib.h>
> -#include <unistd.h>
> -#include <sys/stat.h>
> +#include <dirent.h>
> +#include <errno.h>
> #include <fcntl.h>
> #include <inttypes.h>
> -#include <sys/ioctl.h>
> -#include <errno.h>
> -#include <math.h>
> -#include <locale.h>
> #include <limits.h>
> +#include <locale.h>
> +#include <math.h>
> +#include <poll.h>
> #include <signal.h>
> +#include <stdint.h>
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <string.h>
> +#include <sys/ioctl.h>
> +#include <sys/stat.h>
> +#include <sys/types.h>
> +#include <unistd.h>
> +#include <termios.h>
>
> #include "igt_perf.h"
>
> @@ -1246,6 +1248,54 @@ static char *tr_pmu_name(struct igt_device_card *card)
> return device;
> }
>
> +static void interactive_stdin(void)
> +{
> + struct termios termios = { };
> + int ret;
> +
> + ret = fcntl(0, F_GETFL, NULL);
> + ret |= O_NONBLOCK;
> + ret = fcntl(0, F_SETFL, ret);
> + assert(ret == 0);
I always have to double check that O_NONBLOCK is in F_SETFL and not
F_SETFD.
> +
> + ret = tcgetattr(0, &termios);
> + assert(ret == 0);
> +
> + termios.c_lflag &= ~ICANON;
> + termios.c_cc[VMIN] = 1;
> + termios.c_cc[VTIME] = 0; /* Deciseconds only - we'll use poll. */
> +
> + ret = tcsetattr(0, TCSAFLUSH, &termios);
> + assert(ret == 0);
> +}
> +
> +static void process_stdin(unsigned int timeout_us)
> +{
> + struct pollfd p = { .fd = 0, .events = POLLIN };
> + int ret;
> +
> + ret = poll(&p, 1, timeout_us / 1000);
Replacing the usleep in the mainloop.
Hmm. Won't this have a problem if this run as a daemon (with stdin
closed)?
> + if (ret <= 0) {
> + if (ret < 0)
> + stop_top = true;
> + return;
> + }
> +
> + for (;;) {
> + char c;
> +
> + ret = read(0, &c, 1);
> + if (ret <= 0)
> + break;
O_NONBLOCK on 0.
So on each mainloop, we check for a key press, consume all that are in
the buffer, then return to the mainloop.
> +
> + switch (c) {
> + case 'q':
> + stop_top = true;
> + break;
> + };
> + }
> +}
> +
> int main(int argc, char **argv)
> {
> unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
> @@ -1315,6 +1365,7 @@ int main(int argc, char **argv)
> switch (output_mode) {
> case INTERACTIVE:
INTERACTIVE is the default mode when run in a terminal.
> pops = &term_pops;
> + interactive_stdin();
> break;
> case STDOUT:
> pops = &stdout_pops;
> @@ -1427,7 +1478,7 @@ int main(int argc, char **argv)
> if (stop_top)
> break;
>
> - usleep(period_us);
> + process_stdin(period_us);
Just the question about what happens if run with 0 closed...
if (!process_stdin(period_us))
usleep(period_us);
?
> }
>
> free(codename);
> --
> 2.25.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
@ 2020-12-16 15:44 ` Chris Wilson
0 siblings, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 15:44 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
Quoting Tvrtko Ursulin (2020-12-16 15:28:08)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Analoguous to top(1) we can enable the user to exit from the tool by
> pressing 'q' on the console.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> man/intel_gpu_top.rst | 6 ++++
> tools/intel_gpu_top.c | 77 +++++++++++++++++++++++++++++++++++--------
> 2 files changed, 70 insertions(+), 13 deletions(-)
>
> diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
> index 5552e9699d26..2e0c3a05acc1 100644
> --- a/man/intel_gpu_top.rst
> +++ b/man/intel_gpu_top.rst
> @@ -48,6 +48,12 @@ OPTIONS
> -d
> Select a specific GPU using supported filter.
>
> +RUNTIME CONTROL
> +===============
> +
> +Supported keys:
> +
> + 'q' Exit from the tool.
>
> DEVICE SELECTION
> ================
> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
> index dbd353673e55..68911940f1d0 100644
> --- a/tools/intel_gpu_top.c
> +++ b/tools/intel_gpu_top.c
> @@ -23,24 +23,26 @@
>
> #include "igt_device_scan.h"
>
> -#include <stdio.h>
> -#include <sys/types.h>
> -#include <dirent.h>
> -#include <stdint.h>
> #include <assert.h>
> -#include <string.h>
> #include <ctype.h>
> -#include <stdlib.h>
> -#include <unistd.h>
> -#include <sys/stat.h>
> +#include <dirent.h>
> +#include <errno.h>
> #include <fcntl.h>
> #include <inttypes.h>
> -#include <sys/ioctl.h>
> -#include <errno.h>
> -#include <math.h>
> -#include <locale.h>
> #include <limits.h>
> +#include <locale.h>
> +#include <math.h>
> +#include <poll.h>
> #include <signal.h>
> +#include <stdint.h>
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <string.h>
> +#include <sys/ioctl.h>
> +#include <sys/stat.h>
> +#include <sys/types.h>
> +#include <unistd.h>
> +#include <termios.h>
>
> #include "igt_perf.h"
>
> @@ -1246,6 +1248,54 @@ static char *tr_pmu_name(struct igt_device_card *card)
> return device;
> }
>
> +static void interactive_stdin(void)
> +{
> + struct termios termios = { };
> + int ret;
> +
> + ret = fcntl(0, F_GETFL, NULL);
> + ret |= O_NONBLOCK;
> + ret = fcntl(0, F_SETFL, ret);
> + assert(ret == 0);
I always have to double check that O_NONBLOCK is in F_SETFL and not
F_SETFD.
> +
> + ret = tcgetattr(0, &termios);
> + assert(ret == 0);
> +
> + termios.c_lflag &= ~ICANON;
> + termios.c_cc[VMIN] = 1;
> + termios.c_cc[VTIME] = 0; /* Deciseconds only - we'll use poll. */
> +
> + ret = tcsetattr(0, TCSAFLUSH, &termios);
> + assert(ret == 0);
> +}
> +
> +static void process_stdin(unsigned int timeout_us)
> +{
> + struct pollfd p = { .fd = 0, .events = POLLIN };
> + int ret;
> +
> + ret = poll(&p, 1, timeout_us / 1000);
Replacing the usleep in the mainloop.
Hmm. Won't this have a problem if this run as a daemon (with stdin
closed)?
> + if (ret <= 0) {
> + if (ret < 0)
> + stop_top = true;
> + return;
> + }
> +
> + for (;;) {
> + char c;
> +
> + ret = read(0, &c, 1);
> + if (ret <= 0)
> + break;
O_NONBLOCK on 0.
So on each mainloop, we check for a key press, consume all that are in
the buffer, then return to the mainloop.
> +
> + switch (c) {
> + case 'q':
> + stop_top = true;
> + break;
> + };
> + }
> +}
> +
> int main(int argc, char **argv)
> {
> unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
> @@ -1315,6 +1365,7 @@ int main(int argc, char **argv)
> switch (output_mode) {
> case INTERACTIVE:
INTERACTIVE is the default mode when run in a terminal.
> pops = &term_pops;
> + interactive_stdin();
> break;
> case STDOUT:
> pops = &stdout_pops;
> @@ -1427,7 +1478,7 @@ int main(int argc, char **argv)
> if (stop_top)
> break;
>
> - usleep(period_us);
> + process_stdin(period_us);
Just the question about what happens if run with 0 closed...
if (!process_stdin(period_us))
usleep(period_us);
?
> }
>
> free(codename);
> --
> 2.25.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
>
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
(?)
@ 2020-12-16 15:51 ` Chris Wilson
2020-12-16 15:52 ` Chris Wilson
2020-12-16 16:01 ` Tvrtko Ursulin
-1 siblings, 2 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 15:51 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Similarly to how top(1) handles SMP, we can default to showing engines of
> a same class as a single bar graph entry.
>
> To achieve this a little bit of hackery is employed. PMU sampling is left
> as is and only at the presentation layer we create a fake set of engines,
> one for each class, summing and normalizing the load respectively.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> man/intel_gpu_top.rst | 1 +
> tools/intel_gpu_top.c | 192 +++++++++++++++++++++++++++++++++++++++---
> 2 files changed, 180 insertions(+), 13 deletions(-)
>
> diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
> index 2e0c3a05acc1..35ab10da9bb4 100644
> --- a/man/intel_gpu_top.rst
> +++ b/man/intel_gpu_top.rst
> @@ -54,6 +54,7 @@ RUNTIME CONTROL
> Supported keys:
>
> 'q' Exit from the tool.
> + '1' Toggle between aggregated engine class and physical engine mode.
>
> DEVICE SELECTION
> ================
> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
> index 68911940f1d0..8c4280aa19b9 100644
> --- a/tools/intel_gpu_top.c
> +++ b/tools/intel_gpu_top.c
> @@ -76,8 +76,16 @@ struct engine {
> struct pmu_counter sema;
> };
>
> +struct engine_class {
> + unsigned int class;
> + const char *name;
> + unsigned int num_engines;
> +};
> +
> struct engines {
> unsigned int num_engines;
> + unsigned int num_classes;
> + struct engine_class *class;
> unsigned int num_counters;
> DIR *root;
> int fd;
> @@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
> return lines;
> }
>
> +static bool class_view;
> +
> static int
> print_engines_header(struct engines *engines, double t,
> int lines, int con_w, int con_h)
> @@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
> pops->open_struct("engines");
>
> if (output_mode == INTERACTIVE) {
> - const char *a = " ENGINE BUSY ";
> const char *b = " MI_SEMA MI_WAIT";
> + const char *a;
> +
> + if (class_view)
> + a = " ENGINES BUSY ";
> + else
> + a = " ENGINE BUSY ";
>
> printf("\033[7m%s%*s%s\033[0m\n",
> a, (int)(con_w - 1 - strlen(a) - strlen(b)),
> @@ -1214,6 +1229,164 @@ print_engines_footer(struct engines *engines, double t,
> return lines;
> }
>
> +static int class_cmp(const void *_a, const void *_b)
> +{
> + const struct engine_class *a = _a;
> + const struct engine_class *b = _b;
> +
> + return a->class - b->class;
> +}
> +
> +static void init_engine_classes(struct engines *engines)
> +{
> + struct engine_class *classes;
> + unsigned int i, num;
> + int max = -1;
> +
> + for (i = 0; i < engines->num_engines; i++) {
> + struct engine *engine = engine_ptr(engines, i);
> +
> + if ((int)engine->class > max)
> + max = engine->class;
> + }
> + assert(max >= 0);
> +
> + num = max + 1;
> +
> + classes = calloc(num, sizeof(*classes));
> + assert(classes);
> +
> + for (i = 0; i < engines->num_engines; i++) {
> + struct engine *engine = engine_ptr(engines, i);
> +
> + classes[engine->class].num_engines++;
> + }
> +
> + for (i = 0; i < num; i++) {
> + classes[i].class = i;
> + classes[i].name = class_display_name(i);
> + }
Do you want to remove empty classes at this point?
> +
> + qsort(classes, num, sizeof(*classes), class_cmp);
> +
> + engines->num_classes = num;
> + engines->class = classes;
> +}
> +
> +static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
> +{
> + dst->prev += src->prev;
> + dst->cur += src->cur;
> +}
> +
> +static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
> +{
> + val->prev /= n;
> + val->cur /= n;
I was expecting just the delta to be normalized. This works as well.
> +}
> +
> +static struct engines *init_classes(struct engines *engines)
> +{
> + struct engines *classes;
> + unsigned int i, j;
> +
> + init_engine_classes(engines);
> +
> + classes = calloc(1, sizeof(struct engines) +
> + engines->num_classes * sizeof(struct engine));
> + assert(classes);
> +
> + classes->num_engines = engines->num_classes;
> + classes->num_classes = engines->num_classes;
> + classes->class = engines->class;
> +
> + for (i = 0; i < engines->num_classes; i++) {
> + struct engine *engine = engine_ptr(classes, i);
> +
> + engine->class = i;
> + engine->instance = -1;
> +
> + if (!engines->class[i].num_engines)
> + continue;
> +
> + engine->display_name = strdup(class_display_name(i));
> + assert(engine->display_name);
> + engine->short_name = strdup(class_short_name(i));
> + assert(engine->short_name);
> +
> + for (j = 0; j < engines->num_engines; j++) {
> + struct engine *e = engine_ptr(engines, j);
> +
> + if (e->class == i) {
> + engine->num_counters = e->num_counters;
> + engine->busy = e->busy;
> + engine->sema = e->sema;
> + engine->wait = e->wait;
> + }
> + }
> + }
> +
> + return classes;
> +}
> +
> +static struct engines *
> +update_classes(struct engines *classes, struct engines *engines)
> +{
> + unsigned int i, j;
> +
> + if (!classes)
> + classes = init_classes(engines);
> +
> + for (i = 0; i < classes->num_engines; i++) {
> + unsigned int num_engines = classes->class[i].num_engines;
> + struct engine *engine = engine_ptr(classes, i);
> +
> + if (!num_engines)
> + continue;
> +
> + memset(&engine->busy.val, 0, sizeof(engine->busy.val));
> + memset(&engine->sema.val, 0, sizeof(engine->sema.val));
> + memset(&engine->wait.val, 0, sizeof(engine->wait.val));
> +
> + for (j = 0; j < engines->num_engines; j++) {
> + struct engine *e = engine_ptr(engines, j);
> +
> + if (e->class == i) {
> + __pmu_sum(&engine->busy.val, &e->busy.val);
> + __pmu_sum(&engine->sema.val, &e->sema.val);
> + __pmu_sum(&engine->wait.val, &e->wait.val);
> + }
> + }
> +
> + __pmu_normalize(&engine->busy.val, num_engines);
> + __pmu_normalize(&engine->sema.val, num_engines);
> + __pmu_normalize(&engine->wait.val, num_engines);
Ok. So you wrap the normal engines with class_view, where each engine in
that class_view is an average of all engines within it.
> + }
> +
> + return classes;
> +}
> +
> +static int
> +print_engines(struct engines *engines, double t, int lines, int w, int h)
> +{
> + static struct engines *classes;
> + struct engines *show;
> +
> + if (class_view)
> + classes = show = update_classes(classes, engines);
Something is not right here. Oh static, nvm.
> + else
> + show = engines;
> +
> + lines = print_engines_header(show, t, lines, w, h);
> +
> + for (unsigned int i = 0; i < show->num_engines && lines < h; i++)
> + lines = print_engine(show, i, t, lines, w, h);
> +
> + lines = print_engines_footer(show, t, lines, w, h);
> +
> + return lines;
> +}
> +
> static bool stop_top;
>
> static void sigint_handler(int sig)
> @@ -1292,6 +1465,9 @@ static void process_stdin(unsigned int timeout_us)
> case 'q':
> stop_top = true;
> break;
> + case '1':
> + class_view ^= true;
> + break;
> };
> }
> }
> @@ -1302,7 +1478,6 @@ int main(int argc, char **argv)
> int con_w = -1, con_h = -1;
> char *output_path = NULL;
> struct engines *engines;
> - unsigned int i;
> int ret = 0, ch;
> bool list_device = false;
> char *pmu_device, *opt_device = NULL;
> @@ -1366,6 +1541,7 @@ int main(int argc, char **argv)
> case INTERACTIVE:
> pops = &term_pops;
> interactive_stdin();
> + class_view = true;
> break;
> case STDOUT:
> pops = &stdout_pops;
> @@ -1462,17 +1638,7 @@ int main(int argc, char **argv)
>
> lines = print_imc(engines, t, lines, con_w, con_h);
>
> - lines = print_engines_header(engines, t, lines, con_w,
> - con_h);
> -
> - for (i = 0;
> - i < engines->num_engines && lines < con_h;
> - i++)
> - lines = print_engine(engines, i, t, lines,
> - con_w, con_h);
> -
> - lines = print_engines_footer(engines, t, lines, con_w,
> - con_h);
> + lines = print_engines(engines, t, lines, con_w, con_h);
> }
>
> if (stop_top)
> --
> 2.25.1
>
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
2020-12-16 15:51 ` [Intel-gfx] " Chris Wilson
@ 2020-12-16 15:52 ` Chris Wilson
2020-12-16 16:01 ` Tvrtko Ursulin
1 sibling, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 15:52 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Chris Wilson (2020-12-16 15:51:59)
> Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > Similarly to how top(1) handles SMP, we can default to showing engines of
> > a same class as a single bar graph entry.
> >
> > To achieve this a little bit of hackery is employed. PMU sampling is left
> > as is and only at the presentation layer we create a fake set of engines,
> > one for each class, summing and normalizing the load respectively.
> >
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Where were my manners?
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
@ 2020-12-16 15:52 ` Chris Wilson
0 siblings, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 15:52 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
Quoting Chris Wilson (2020-12-16 15:51:59)
> Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > Similarly to how top(1) handles SMP, we can default to showing engines of
> > a same class as a single bar graph entry.
> >
> > To achieve this a little bit of hackery is employed. PMU sampling is left
> > as is and only at the presentation layer we create a fake set of engines,
> > one for each class, summing and normalizing the load respectively.
> >
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Where were my manners?
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
2020-12-16 15:44 ` Chris Wilson
@ 2020-12-16 15:54 ` Tvrtko Ursulin
-1 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 15:54 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Analoguous to top(1) we can enable the user to exit from the tool by
pressing 'q' on the console.
v2:
* Fix sleep period with closed stdin. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 6 ++++
tools/intel_gpu_top.c | 80 ++++++++++++++++++++++++++++++++++++-------
2 files changed, 73 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 5552e9699d26..2e0c3a05acc1 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -48,6 +48,12 @@ OPTIONS
-d
Select a specific GPU using supported filter.
+RUNTIME CONTROL
+===============
+
+Supported keys:
+
+ 'q' Exit from the tool.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index dbd353673e55..46221c9543eb 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -23,24 +23,26 @@
#include "igt_device_scan.h"
-#include <stdio.h>
-#include <sys/types.h>
-#include <dirent.h>
-#include <stdint.h>
#include <assert.h>
-#include <string.h>
#include <ctype.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/stat.h>
+#include <dirent.h>
+#include <errno.h>
#include <fcntl.h>
#include <inttypes.h>
-#include <sys/ioctl.h>
-#include <errno.h>
-#include <math.h>
-#include <locale.h>
#include <limits.h>
+#include <locale.h>
+#include <math.h>
+#include <poll.h>
#include <signal.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <termios.h>
#include "igt_perf.h"
@@ -1246,6 +1248,54 @@ static char *tr_pmu_name(struct igt_device_card *card)
return device;
}
+static void interactive_stdin(void)
+{
+ struct termios termios = { };
+ int ret;
+
+ ret = fcntl(0, F_GETFL, NULL);
+ ret |= O_NONBLOCK;
+ ret = fcntl(0, F_SETFL, ret);
+ assert(ret == 0);
+
+ ret = tcgetattr(0, &termios);
+ assert(ret == 0);
+
+ termios.c_lflag &= ~ICANON;
+ termios.c_cc[VMIN] = 1;
+ termios.c_cc[VTIME] = 0; /* Deciseconds only - we'll use poll. */
+
+ ret = tcsetattr(0, TCSAFLUSH, &termios);
+ assert(ret == 0);
+}
+
+static void process_stdin(unsigned int timeout_us)
+{
+ struct pollfd p = { .fd = 0, .events = POLLIN };
+ int ret;
+
+ ret = poll(&p, 1, timeout_us / 1000);
+ if (ret <= 0) {
+ if (ret < 0)
+ stop_top = true;
+ return;
+ }
+
+ for (;;) {
+ char c;
+
+ ret = read(0, &c, 1);
+ if (ret <= 0)
+ break;
+
+ switch (c) {
+ case 'q':
+ stop_top = true;
+ break;
+ };
+ }
+}
+
int main(int argc, char **argv)
{
unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
@@ -1315,6 +1365,7 @@ int main(int argc, char **argv)
switch (output_mode) {
case INTERACTIVE:
pops = &term_pops;
+ interactive_stdin();
break;
case STDOUT:
pops = &stdout_pops;
@@ -1427,7 +1478,10 @@ int main(int argc, char **argv)
if (stop_top)
break;
- usleep(period_us);
+ if (output_mode == INTERACTIVE)
+ process_stdin(period_us);
+ else
+ usleep(period_us);
}
free(codename);
--
2.25.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [igt-dev] [PATCH v2 i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
@ 2020-12-16 15:54 ` Tvrtko Ursulin
0 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 15:54 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Analoguous to top(1) we can enable the user to exit from the tool by
pressing 'q' on the console.
v2:
* Fix sleep period with closed stdin. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 6 ++++
tools/intel_gpu_top.c | 80 ++++++++++++++++++++++++++++++++++++-------
2 files changed, 73 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 5552e9699d26..2e0c3a05acc1 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -48,6 +48,12 @@ OPTIONS
-d
Select a specific GPU using supported filter.
+RUNTIME CONTROL
+===============
+
+Supported keys:
+
+ 'q' Exit from the tool.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index dbd353673e55..46221c9543eb 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -23,24 +23,26 @@
#include "igt_device_scan.h"
-#include <stdio.h>
-#include <sys/types.h>
-#include <dirent.h>
-#include <stdint.h>
#include <assert.h>
-#include <string.h>
#include <ctype.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <sys/stat.h>
+#include <dirent.h>
+#include <errno.h>
#include <fcntl.h>
#include <inttypes.h>
-#include <sys/ioctl.h>
-#include <errno.h>
-#include <math.h>
-#include <locale.h>
#include <limits.h>
+#include <locale.h>
+#include <math.h>
+#include <poll.h>
#include <signal.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/ioctl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <termios.h>
#include "igt_perf.h"
@@ -1246,6 +1248,54 @@ static char *tr_pmu_name(struct igt_device_card *card)
return device;
}
+static void interactive_stdin(void)
+{
+ struct termios termios = { };
+ int ret;
+
+ ret = fcntl(0, F_GETFL, NULL);
+ ret |= O_NONBLOCK;
+ ret = fcntl(0, F_SETFL, ret);
+ assert(ret == 0);
+
+ ret = tcgetattr(0, &termios);
+ assert(ret == 0);
+
+ termios.c_lflag &= ~ICANON;
+ termios.c_cc[VMIN] = 1;
+ termios.c_cc[VTIME] = 0; /* Deciseconds only - we'll use poll. */
+
+ ret = tcsetattr(0, TCSAFLUSH, &termios);
+ assert(ret == 0);
+}
+
+static void process_stdin(unsigned int timeout_us)
+{
+ struct pollfd p = { .fd = 0, .events = POLLIN };
+ int ret;
+
+ ret = poll(&p, 1, timeout_us / 1000);
+ if (ret <= 0) {
+ if (ret < 0)
+ stop_top = true;
+ return;
+ }
+
+ for (;;) {
+ char c;
+
+ ret = read(0, &c, 1);
+ if (ret <= 0)
+ break;
+
+ switch (c) {
+ case 'q':
+ stop_top = true;
+ break;
+ };
+ }
+}
+
int main(int argc, char **argv)
{
unsigned int period_us = DEFAULT_PERIOD_MS * 1000;
@@ -1315,6 +1365,7 @@ int main(int argc, char **argv)
switch (output_mode) {
case INTERACTIVE:
pops = &term_pops;
+ interactive_stdin();
break;
case STDOUT:
pops = &stdout_pops;
@@ -1427,7 +1478,10 @@ int main(int argc, char **argv)
if (stop_top)
break;
- usleep(period_us);
+ if (output_mode == INTERACTIVE)
+ process_stdin(period_us);
+ else
+ usleep(period_us);
}
free(codename);
--
2.25.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
2020-12-16 15:54 ` [igt-dev] " Tvrtko Ursulin
(?)
@ 2020-12-16 15:57 ` Chris Wilson
2020-12-17 8:31 ` Chris Wilson
-1 siblings, 1 reply; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 15:57 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2020-12-16 15:54:20)
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Analoguous to top(1) we can enable the user to exit from the tool by
> pressing 'q' on the console.
>
> v2:
> * Fix sleep period with closed stdin. (Chris)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
2020-12-16 15:51 ` [Intel-gfx] " Chris Wilson
@ 2020-12-16 16:01 ` Tvrtko Ursulin
2020-12-16 16:01 ` Tvrtko Ursulin
1 sibling, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 16:01 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Intel-gfx
On 16/12/2020 15:51, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Similarly to how top(1) handles SMP, we can default to showing engines of
>> a same class as a single bar graph entry.
>>
>> To achieve this a little bit of hackery is employed. PMU sampling is left
>> as is and only at the presentation layer we create a fake set of engines,
>> one for each class, summing and normalizing the load respectively.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>> man/intel_gpu_top.rst | 1 +
>> tools/intel_gpu_top.c | 192 +++++++++++++++++++++++++++++++++++++++---
>> 2 files changed, 180 insertions(+), 13 deletions(-)
>>
>> diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
>> index 2e0c3a05acc1..35ab10da9bb4 100644
>> --- a/man/intel_gpu_top.rst
>> +++ b/man/intel_gpu_top.rst
>> @@ -54,6 +54,7 @@ RUNTIME CONTROL
>> Supported keys:
>>
>> 'q' Exit from the tool.
>> + '1' Toggle between aggregated engine class and physical engine mode.
>>
>> DEVICE SELECTION
>> ================
>> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
>> index 68911940f1d0..8c4280aa19b9 100644
>> --- a/tools/intel_gpu_top.c
>> +++ b/tools/intel_gpu_top.c
>> @@ -76,8 +76,16 @@ struct engine {
>> struct pmu_counter sema;
>> };
>>
>> +struct engine_class {
>> + unsigned int class;
>> + const char *name;
>> + unsigned int num_engines;
>> +};
>> +
>> struct engines {
>> unsigned int num_engines;
>> + unsigned int num_classes;
>> + struct engine_class *class;
>> unsigned int num_counters;
>> DIR *root;
>> int fd;
>> @@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
>> return lines;
>> }
>>
>> +static bool class_view;
>> +
>> static int
>> print_engines_header(struct engines *engines, double t,
>> int lines, int con_w, int con_h)
>> @@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
>> pops->open_struct("engines");
>>
>> if (output_mode == INTERACTIVE) {
>> - const char *a = " ENGINE BUSY ";
>> const char *b = " MI_SEMA MI_WAIT";
>> + const char *a;
>> +
>> + if (class_view)
>> + a = " ENGINES BUSY ";
>> + else
>> + a = " ENGINE BUSY ";
>>
>> printf("\033[7m%s%*s%s\033[0m\n",
>> a, (int)(con_w - 1 - strlen(a) - strlen(b)),
>> @@ -1214,6 +1229,164 @@ print_engines_footer(struct engines *engines, double t,
>> return lines;
>> }
>>
>> +static int class_cmp(const void *_a, const void *_b)
>> +{
>> + const struct engine_class *a = _a;
>> + const struct engine_class *b = _b;
>> +
>> + return a->class - b->class;
>> +}
>> +
>> +static void init_engine_classes(struct engines *engines)
>> +{
>> + struct engine_class *classes;
>> + unsigned int i, num;
>> + int max = -1;
>> +
>> + for (i = 0; i < engines->num_engines; i++) {
>> + struct engine *engine = engine_ptr(engines, i);
>> +
>> + if ((int)engine->class > max)
>> + max = engine->class;
>> + }
>> + assert(max >= 0);
>> +
>> + num = max + 1;
>> +
>> + classes = calloc(num, sizeof(*classes));
>> + assert(classes);
>> +
>> + for (i = 0; i < engines->num_engines; i++) {
>> + struct engine *engine = engine_ptr(engines, i);
>> +
>> + classes[engine->class].num_engines++;
>> + }
>> +
>> + for (i = 0; i < num; i++) {
>> + classes[i].class = i;
>> + classes[i].name = class_display_name(i);
>> + }
>
> Do you want to remove empty classes at this point?
I need this array 1:1 with class ids so no. I didn't find yet that
"empty" entries would cause a problem anywhere in the code. Hm actually
there wouldn't be any empty classes, since class generation is driven of
discovered engines.
I need to sprinkle some more asserts and comments around.
>
>> +
>> + qsort(classes, num, sizeof(*classes), class_cmp);
>> +
>> + engines->num_classes = num;
>> + engines->class = classes;
>> +}
>> +
>> +static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
>> +{
>> + dst->prev += src->prev;
>> + dst->cur += src->cur;
>> +}
>> +
>> +static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
>> +{
>> + val->prev /= n;
>> + val->cur /= n;
>
> I was expecting just the delta to be normalized. This works as well.
Yeah, this allows basically no changes to existing code.
Maybe a running average algorithm would be better to not overflow the
u64 but I haven't bothered calculating if that is a theoretical
possibility or not.
>
>> +}
>> +
>> +static struct engines *init_classes(struct engines *engines)
>> +{
>> + struct engines *classes;
>> + unsigned int i, j;
>> +
>> + init_engine_classes(engines);
>> +
>> + classes = calloc(1, sizeof(struct engines) +
>> + engines->num_classes * sizeof(struct engine));
>> + assert(classes);
>> +
>> + classes->num_engines = engines->num_classes;
>> + classes->num_classes = engines->num_classes;
>> + classes->class = engines->class;
>> +
>> + for (i = 0; i < engines->num_classes; i++) {
>> + struct engine *engine = engine_ptr(classes, i);
>> +
>> + engine->class = i;
>> + engine->instance = -1;
>> +
>> + if (!engines->class[i].num_engines)
>> + continue;
>> +
>> + engine->display_name = strdup(class_display_name(i));
>> + assert(engine->display_name);
>> + engine->short_name = strdup(class_short_name(i));
>> + assert(engine->short_name);
>> +
>> + for (j = 0; j < engines->num_engines; j++) {
>> + struct engine *e = engine_ptr(engines, j);
>> +
>> + if (e->class == i) {
>> + engine->num_counters = e->num_counters;
>> + engine->busy = e->busy;
>> + engine->sema = e->sema;
>> + engine->wait = e->wait;
>> + }
>> + }
>> + }
>> +
>> + return classes;
>> +}
>> +
>> +static struct engines *
>> +update_classes(struct engines *classes, struct engines *engines)
>> +{
>> + unsigned int i, j;
>> +
>> + if (!classes)
>> + classes = init_classes(engines);
>> +
>> + for (i = 0; i < classes->num_engines; i++) {
>> + unsigned int num_engines = classes->class[i].num_engines;
>> + struct engine *engine = engine_ptr(classes, i);
>> +
>> + if (!num_engines)
>> + continue;
>> +
>> + memset(&engine->busy.val, 0, sizeof(engine->busy.val));
>> + memset(&engine->sema.val, 0, sizeof(engine->sema.val));
>> + memset(&engine->wait.val, 0, sizeof(engine->wait.val));
>> +
>> + for (j = 0; j < engines->num_engines; j++) {
>> + struct engine *e = engine_ptr(engines, j);
>> +
>> + if (e->class == i) {
>> + __pmu_sum(&engine->busy.val, &e->busy.val);
>> + __pmu_sum(&engine->sema.val, &e->sema.val);
>> + __pmu_sum(&engine->wait.val, &e->wait.val);
>> + }
>> + }
>> +
>> + __pmu_normalize(&engine->busy.val, num_engines);
>> + __pmu_normalize(&engine->sema.val, num_engines);
>> + __pmu_normalize(&engine->wait.val, num_engines);
>
> Ok. So you wrap the normal engines with class_view, where each engine in
> that class_view is an average of all engines within it.
Yes, and then just pass this wrapped/aggregated struct engines * to the
existing code.
>> + }
>> +
>> + return classes;
>> +}
>> +
>> +static int
>> +print_engines(struct engines *engines, double t, int lines, int w, int h)
>> +{
>> + static struct engines *classes;
>> + struct engines *show;
>> +
>> + if (class_view)
>> + classes = show = update_classes(classes, engines);
>
> Something is not right here. Oh static, nvm.
Too hacky? Maybe "show = classes = update_classes()"would read better.
Regards,
Tvrtko
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
@ 2020-12-16 16:01 ` Tvrtko Ursulin
0 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 16:01 UTC (permalink / raw)
To: Chris Wilson, igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
On 16/12/2020 15:51, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Similarly to how top(1) handles SMP, we can default to showing engines of
>> a same class as a single bar graph entry.
>>
>> To achieve this a little bit of hackery is employed. PMU sampling is left
>> as is and only at the presentation layer we create a fake set of engines,
>> one for each class, summing and normalizing the load respectively.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>> man/intel_gpu_top.rst | 1 +
>> tools/intel_gpu_top.c | 192 +++++++++++++++++++++++++++++++++++++++---
>> 2 files changed, 180 insertions(+), 13 deletions(-)
>>
>> diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
>> index 2e0c3a05acc1..35ab10da9bb4 100644
>> --- a/man/intel_gpu_top.rst
>> +++ b/man/intel_gpu_top.rst
>> @@ -54,6 +54,7 @@ RUNTIME CONTROL
>> Supported keys:
>>
>> 'q' Exit from the tool.
>> + '1' Toggle between aggregated engine class and physical engine mode.
>>
>> DEVICE SELECTION
>> ================
>> diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
>> index 68911940f1d0..8c4280aa19b9 100644
>> --- a/tools/intel_gpu_top.c
>> +++ b/tools/intel_gpu_top.c
>> @@ -76,8 +76,16 @@ struct engine {
>> struct pmu_counter sema;
>> };
>>
>> +struct engine_class {
>> + unsigned int class;
>> + const char *name;
>> + unsigned int num_engines;
>> +};
>> +
>> struct engines {
>> unsigned int num_engines;
>> + unsigned int num_classes;
>> + struct engine_class *class;
>> unsigned int num_counters;
>> DIR *root;
>> int fd;
>> @@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
>> return lines;
>> }
>>
>> +static bool class_view;
>> +
>> static int
>> print_engines_header(struct engines *engines, double t,
>> int lines, int con_w, int con_h)
>> @@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
>> pops->open_struct("engines");
>>
>> if (output_mode == INTERACTIVE) {
>> - const char *a = " ENGINE BUSY ";
>> const char *b = " MI_SEMA MI_WAIT";
>> + const char *a;
>> +
>> + if (class_view)
>> + a = " ENGINES BUSY ";
>> + else
>> + a = " ENGINE BUSY ";
>>
>> printf("\033[7m%s%*s%s\033[0m\n",
>> a, (int)(con_w - 1 - strlen(a) - strlen(b)),
>> @@ -1214,6 +1229,164 @@ print_engines_footer(struct engines *engines, double t,
>> return lines;
>> }
>>
>> +static int class_cmp(const void *_a, const void *_b)
>> +{
>> + const struct engine_class *a = _a;
>> + const struct engine_class *b = _b;
>> +
>> + return a->class - b->class;
>> +}
>> +
>> +static void init_engine_classes(struct engines *engines)
>> +{
>> + struct engine_class *classes;
>> + unsigned int i, num;
>> + int max = -1;
>> +
>> + for (i = 0; i < engines->num_engines; i++) {
>> + struct engine *engine = engine_ptr(engines, i);
>> +
>> + if ((int)engine->class > max)
>> + max = engine->class;
>> + }
>> + assert(max >= 0);
>> +
>> + num = max + 1;
>> +
>> + classes = calloc(num, sizeof(*classes));
>> + assert(classes);
>> +
>> + for (i = 0; i < engines->num_engines; i++) {
>> + struct engine *engine = engine_ptr(engines, i);
>> +
>> + classes[engine->class].num_engines++;
>> + }
>> +
>> + for (i = 0; i < num; i++) {
>> + classes[i].class = i;
>> + classes[i].name = class_display_name(i);
>> + }
>
> Do you want to remove empty classes at this point?
I need this array 1:1 with class ids so no. I didn't find yet that
"empty" entries would cause a problem anywhere in the code. Hm actually
there wouldn't be any empty classes, since class generation is driven of
discovered engines.
I need to sprinkle some more asserts and comments around.
>
>> +
>> + qsort(classes, num, sizeof(*classes), class_cmp);
>> +
>> + engines->num_classes = num;
>> + engines->class = classes;
>> +}
>> +
>> +static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
>> +{
>> + dst->prev += src->prev;
>> + dst->cur += src->cur;
>> +}
>> +
>> +static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
>> +{
>> + val->prev /= n;
>> + val->cur /= n;
>
> I was expecting just the delta to be normalized. This works as well.
Yeah, this allows basically no changes to existing code.
Maybe a running average algorithm would be better to not overflow the
u64 but I haven't bothered calculating if that is a theoretical
possibility or not.
>
>> +}
>> +
>> +static struct engines *init_classes(struct engines *engines)
>> +{
>> + struct engines *classes;
>> + unsigned int i, j;
>> +
>> + init_engine_classes(engines);
>> +
>> + classes = calloc(1, sizeof(struct engines) +
>> + engines->num_classes * sizeof(struct engine));
>> + assert(classes);
>> +
>> + classes->num_engines = engines->num_classes;
>> + classes->num_classes = engines->num_classes;
>> + classes->class = engines->class;
>> +
>> + for (i = 0; i < engines->num_classes; i++) {
>> + struct engine *engine = engine_ptr(classes, i);
>> +
>> + engine->class = i;
>> + engine->instance = -1;
>> +
>> + if (!engines->class[i].num_engines)
>> + continue;
>> +
>> + engine->display_name = strdup(class_display_name(i));
>> + assert(engine->display_name);
>> + engine->short_name = strdup(class_short_name(i));
>> + assert(engine->short_name);
>> +
>> + for (j = 0; j < engines->num_engines; j++) {
>> + struct engine *e = engine_ptr(engines, j);
>> +
>> + if (e->class == i) {
>> + engine->num_counters = e->num_counters;
>> + engine->busy = e->busy;
>> + engine->sema = e->sema;
>> + engine->wait = e->wait;
>> + }
>> + }
>> + }
>> +
>> + return classes;
>> +}
>> +
>> +static struct engines *
>> +update_classes(struct engines *classes, struct engines *engines)
>> +{
>> + unsigned int i, j;
>> +
>> + if (!classes)
>> + classes = init_classes(engines);
>> +
>> + for (i = 0; i < classes->num_engines; i++) {
>> + unsigned int num_engines = classes->class[i].num_engines;
>> + struct engine *engine = engine_ptr(classes, i);
>> +
>> + if (!num_engines)
>> + continue;
>> +
>> + memset(&engine->busy.val, 0, sizeof(engine->busy.val));
>> + memset(&engine->sema.val, 0, sizeof(engine->sema.val));
>> + memset(&engine->wait.val, 0, sizeof(engine->wait.val));
>> +
>> + for (j = 0; j < engines->num_engines; j++) {
>> + struct engine *e = engine_ptr(engines, j);
>> +
>> + if (e->class == i) {
>> + __pmu_sum(&engine->busy.val, &e->busy.val);
>> + __pmu_sum(&engine->sema.val, &e->sema.val);
>> + __pmu_sum(&engine->wait.val, &e->wait.val);
>> + }
>> + }
>> +
>> + __pmu_normalize(&engine->busy.val, num_engines);
>> + __pmu_normalize(&engine->sema.val, num_engines);
>> + __pmu_normalize(&engine->wait.val, num_engines);
>
> Ok. So you wrap the normal engines with class_view, where each engine in
> that class_view is an average of all engines within it.
Yes, and then just pass this wrapped/aggregated struct engines * to the
existing code.
>> + }
>> +
>> + return classes;
>> +}
>> +
>> +static int
>> +print_engines(struct engines *engines, double t, int lines, int w, int h)
>> +{
>> + static struct engines *classes;
>> + struct engines *show;
>> +
>> + if (class_view)
>> + classes = show = update_classes(classes, engines);
>
> Something is not right here. Oh static, nvm.
Too hacky? Maybe "show = classes = update_classes()"would read better.
Regards,
Tvrtko
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
2020-12-16 16:01 ` Tvrtko Ursulin
@ 2020-12-16 16:05 ` Chris Wilson
-1 siblings, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 16:05 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Tvrtko Ursulin (2020-12-16 16:01:30)
>
> On 16/12/2020 15:51, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
> >> +static int
> >> +print_engines(struct engines *engines, double t, int lines, int w, int h)
> >> +{
> >> + static struct engines *classes;
> >> + struct engines *show;
> >> +
> >> + if (class_view)
> >> + classes = show = update_classes(classes, engines);
> >
> > Something is not right here. Oh static, nvm.
>
> Too hacky? Maybe "show = classes = update_classes()"would read better.
show = update_classes(engines);
with update_classes doing the if (once) classes = init_classes(engines) ?
-Chris
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [igt-dev] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
@ 2020-12-16 16:05 ` Chris Wilson
0 siblings, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-16 16:05 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
Quoting Tvrtko Ursulin (2020-12-16 16:01:30)
>
> On 16/12/2020 15:51, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2020-12-16 15:28:09)
> >> +static int
> >> +print_engines(struct engines *engines, double t, int lines, int w, int h)
> >> +{
> >> + static struct engines *classes;
> >> + struct engines *show;
> >> +
> >> + if (class_view)
> >> + classes = show = update_classes(classes, engines);
> >
> > Something is not right here. Oh static, nvm.
>
> Too hacky? Maybe "show = classes = update_classes()"would read better.
show = update_classes(engines);
with update_classes doing the if (once) classes = init_classes(engines) ?
-Chris
_______________________________________________
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igt-dev@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
2020-12-16 16:05 ` Chris Wilson
@ 2020-12-16 16:42 ` Tvrtko Ursulin
-1 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 16:42 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Similarly to how top(1) handles SMP, we can default to showing engines of
a same class as a single bar graph entry.
To achieve this a little bit of hackery is employed. PMU sampling is left
as is and only at the presentation layer we create a fake set of engines,
one for each class, summing and normalizing the load respectively.
v2:
* Fix building the aggregated engines.
* Tidy static variable handling.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 1 +
tools/intel_gpu_top.c | 208 +++++++++++++++++++++++++++++++++++++++---
2 files changed, 196 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 2e0c3a05acc1..35ab10da9bb4 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -54,6 +54,7 @@ RUNTIME CONTROL
Supported keys:
'q' Exit from the tool.
+ '1' Toggle between aggregated engine class and physical engine mode.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 46221c9543eb..9ae30b8020dc 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -76,8 +76,16 @@ struct engine {
struct pmu_counter sema;
};
+struct engine_class {
+ unsigned int class;
+ const char *name;
+ unsigned int num_engines;
+};
+
struct engines {
unsigned int num_engines;
+ unsigned int num_classes;
+ struct engine_class *class;
unsigned int num_counters;
DIR *root;
int fd;
@@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
return lines;
}
+static bool class_view;
+
static int
print_engines_header(struct engines *engines, double t,
int lines, int con_w, int con_h)
@@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
pops->open_struct("engines");
if (output_mode == INTERACTIVE) {
- const char *a = " ENGINE BUSY ";
const char *b = " MI_SEMA MI_WAIT";
+ const char *a;
+
+ if (class_view)
+ a = " ENGINES BUSY ";
+ else
+ a = " ENGINE BUSY ";
printf("\033[7m%s%*s%s\033[0m\n",
a, (int)(con_w - 1 - strlen(a) - strlen(b)),
@@ -1214,6 +1229,180 @@ print_engines_footer(struct engines *engines, double t,
return lines;
}
+static int class_cmp(const void *_a, const void *_b)
+{
+ const struct engine_class *a = _a;
+ const struct engine_class *b = _b;
+
+ return a->class - b->class;
+}
+
+static void init_engine_classes(struct engines *engines)
+{
+ struct engine_class *classes;
+ unsigned int i, num;
+ int max = -1;
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ if ((int)engine->class > max)
+ max = engine->class;
+ }
+ assert(max >= 0);
+
+ num = max + 1;
+
+ classes = calloc(num, sizeof(*classes));
+ assert(classes);
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ classes[engine->class].num_engines++;
+ }
+
+ for (i = 0; i < num; i++) {
+ classes[i].class = i;
+ classes[i].name = class_display_name(i);
+ }
+
+ qsort(classes, num, sizeof(*classes), class_cmp);
+
+ engines->num_classes = num;
+ engines->class = classes;
+}
+
+static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
+{
+ dst->prev += src->prev;
+ dst->cur += src->cur;
+}
+
+static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
+{
+ val->prev /= n;
+ val->cur /= n;
+}
+
+static struct engines *init_class_engines(struct engines *engines)
+{
+ unsigned int num_present;
+ struct engines *classes;
+ unsigned int i, j, k;
+
+ init_engine_classes(engines);
+
+ num_present = 0; /* Classes with engines. */
+ for (i = 0; i < engines->num_classes; i++) {
+ if (engines->class[i].num_engines)
+ num_present++;
+ }
+
+ classes = calloc(1, sizeof(struct engines) +
+ num_present * sizeof(struct engine));
+ assert(classes);
+
+ classes->num_engines = num_present;
+ classes->num_classes = engines->num_classes;
+ classes->class = engines->class;
+
+ j = 0;
+ for (i = 0; i < engines->num_classes; i++) {
+ struct engine *engine = engine_ptr(classes, j);
+
+ /* Skip classes with no engines. */
+ if (!engines->class[i].num_engines)
+ continue;
+
+ assert(j < num_present);
+
+ engine->class = i;
+ engine->instance = -1;
+
+ engine->display_name = strdup(class_display_name(i));
+ assert(engine->display_name);
+ engine->short_name = strdup(class_short_name(i));
+ assert(engine->short_name);
+
+ /*
+ * Copy over pmu metadata from one real engine of the same
+ * class.
+ */
+ for (k = 0; k < engines->num_engines; k++) {
+ struct engine *e = engine_ptr(engines, k);
+
+ if (e->class == i) {
+ engine->num_counters = e->num_counters;
+ engine->busy = e->busy;
+ engine->sema = e->sema;
+ engine->wait = e->wait;
+ break;
+ }
+ }
+
+ j++; /* Next "class engine" to populate. */
+ }
+
+ return classes;
+}
+
+static struct engines *update_class_engines(struct engines *engines)
+{
+ static struct engines *classes;
+ unsigned int i, j;
+
+ if (!classes)
+ classes = init_class_engines(engines);
+
+ for (i = 0; i < classes->num_engines; i++) {
+ unsigned int num_engines = classes->class[i].num_engines;
+ struct engine *engine = engine_ptr(classes, i);
+
+ assert(num_engines);
+
+ memset(&engine->busy.val, 0, sizeof(engine->busy.val));
+ memset(&engine->sema.val, 0, sizeof(engine->sema.val));
+ memset(&engine->wait.val, 0, sizeof(engine->wait.val));
+
+ for (j = 0; j < engines->num_engines; j++) {
+ struct engine *e = engine_ptr(engines, j);
+
+ if (e->class == i) {
+ __pmu_sum(&engine->busy.val, &e->busy.val);
+ __pmu_sum(&engine->sema.val, &e->sema.val);
+ __pmu_sum(&engine->wait.val, &e->wait.val);
+ }
+ }
+
+ __pmu_normalize(&engine->busy.val, num_engines);
+ __pmu_normalize(&engine->sema.val, num_engines);
+ __pmu_normalize(&engine->wait.val, num_engines);
+ }
+
+ return classes;
+}
+
+static int
+print_engines(struct engines *engines, double t, int lines, int w, int h)
+{
+ struct engines *show;
+
+ if (class_view)
+ show = update_class_engines(engines);
+ else
+ show = engines;
+
+ lines = print_engines_header(show, t, lines, w, h);
+
+ for (unsigned int i = 0; i < show->num_engines && lines < h; i++)
+ lines = print_engine(show, i, t, lines, w, h);
+
+ lines = print_engines_footer(show, t, lines, w, h);
+
+ return lines;
+}
+
static bool stop_top;
static void sigint_handler(int sig)
@@ -1292,6 +1481,9 @@ static void process_stdin(unsigned int timeout_us)
case 'q':
stop_top = true;
break;
+ case '1':
+ class_view ^= true;
+ break;
};
}
}
@@ -1302,7 +1494,6 @@ int main(int argc, char **argv)
int con_w = -1, con_h = -1;
char *output_path = NULL;
struct engines *engines;
- unsigned int i;
int ret = 0, ch;
bool list_device = false;
char *pmu_device, *opt_device = NULL;
@@ -1366,6 +1557,7 @@ int main(int argc, char **argv)
case INTERACTIVE:
pops = &term_pops;
interactive_stdin();
+ class_view = true;
break;
case STDOUT:
pops = &stdout_pops;
@@ -1462,17 +1654,7 @@ int main(int argc, char **argv)
lines = print_imc(engines, t, lines, con_w, con_h);
- lines = print_engines_header(engines, t, lines, con_w,
- con_h);
-
- for (i = 0;
- i < engines->num_engines && lines < con_h;
- i++)
- lines = print_engine(engines, i, t, lines,
- con_w, con_h);
-
- lines = print_engines_footer(engines, t, lines, con_w,
- con_h);
+ lines = print_engines(engines, t, lines, con_w, con_h);
}
if (stop_top)
--
2.25.1
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^ permalink raw reply related [flat|nested] 21+ messages in thread
* [igt-dev] [PATCH v2 i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class
@ 2020-12-16 16:42 ` Tvrtko Ursulin
0 siblings, 0 replies; 21+ messages in thread
From: Tvrtko Ursulin @ 2020-12-16 16:42 UTC (permalink / raw)
To: igt-dev; +Cc: Intel-gfx, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Similarly to how top(1) handles SMP, we can default to showing engines of
a same class as a single bar graph entry.
To achieve this a little bit of hackery is employed. PMU sampling is left
as is and only at the presentation layer we create a fake set of engines,
one for each class, summing and normalizing the load respectively.
v2:
* Fix building the aggregated engines.
* Tidy static variable handling.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
man/intel_gpu_top.rst | 1 +
tools/intel_gpu_top.c | 208 +++++++++++++++++++++++++++++++++++++++---
2 files changed, 196 insertions(+), 13 deletions(-)
diff --git a/man/intel_gpu_top.rst b/man/intel_gpu_top.rst
index 2e0c3a05acc1..35ab10da9bb4 100644
--- a/man/intel_gpu_top.rst
+++ b/man/intel_gpu_top.rst
@@ -54,6 +54,7 @@ RUNTIME CONTROL
Supported keys:
'q' Exit from the tool.
+ '1' Toggle between aggregated engine class and physical engine mode.
DEVICE SELECTION
================
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index 46221c9543eb..9ae30b8020dc 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -76,8 +76,16 @@ struct engine {
struct pmu_counter sema;
};
+struct engine_class {
+ unsigned int class;
+ const char *name;
+ unsigned int num_engines;
+};
+
struct engines {
unsigned int num_engines;
+ unsigned int num_classes;
+ struct engine_class *class;
unsigned int num_counters;
DIR *root;
int fd;
@@ -1118,6 +1126,8 @@ print_imc(struct engines *engines, double t, int lines, int con_w, int con_h)
return lines;
}
+static bool class_view;
+
static int
print_engines_header(struct engines *engines, double t,
int lines, int con_w, int con_h)
@@ -1133,8 +1143,13 @@ print_engines_header(struct engines *engines, double t,
pops->open_struct("engines");
if (output_mode == INTERACTIVE) {
- const char *a = " ENGINE BUSY ";
const char *b = " MI_SEMA MI_WAIT";
+ const char *a;
+
+ if (class_view)
+ a = " ENGINES BUSY ";
+ else
+ a = " ENGINE BUSY ";
printf("\033[7m%s%*s%s\033[0m\n",
a, (int)(con_w - 1 - strlen(a) - strlen(b)),
@@ -1214,6 +1229,180 @@ print_engines_footer(struct engines *engines, double t,
return lines;
}
+static int class_cmp(const void *_a, const void *_b)
+{
+ const struct engine_class *a = _a;
+ const struct engine_class *b = _b;
+
+ return a->class - b->class;
+}
+
+static void init_engine_classes(struct engines *engines)
+{
+ struct engine_class *classes;
+ unsigned int i, num;
+ int max = -1;
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ if ((int)engine->class > max)
+ max = engine->class;
+ }
+ assert(max >= 0);
+
+ num = max + 1;
+
+ classes = calloc(num, sizeof(*classes));
+ assert(classes);
+
+ for (i = 0; i < engines->num_engines; i++) {
+ struct engine *engine = engine_ptr(engines, i);
+
+ classes[engine->class].num_engines++;
+ }
+
+ for (i = 0; i < num; i++) {
+ classes[i].class = i;
+ classes[i].name = class_display_name(i);
+ }
+
+ qsort(classes, num, sizeof(*classes), class_cmp);
+
+ engines->num_classes = num;
+ engines->class = classes;
+}
+
+static void __pmu_sum(struct pmu_pair *dst, struct pmu_pair *src)
+{
+ dst->prev += src->prev;
+ dst->cur += src->cur;
+}
+
+static void __pmu_normalize(struct pmu_pair *val, unsigned int n)
+{
+ val->prev /= n;
+ val->cur /= n;
+}
+
+static struct engines *init_class_engines(struct engines *engines)
+{
+ unsigned int num_present;
+ struct engines *classes;
+ unsigned int i, j, k;
+
+ init_engine_classes(engines);
+
+ num_present = 0; /* Classes with engines. */
+ for (i = 0; i < engines->num_classes; i++) {
+ if (engines->class[i].num_engines)
+ num_present++;
+ }
+
+ classes = calloc(1, sizeof(struct engines) +
+ num_present * sizeof(struct engine));
+ assert(classes);
+
+ classes->num_engines = num_present;
+ classes->num_classes = engines->num_classes;
+ classes->class = engines->class;
+
+ j = 0;
+ for (i = 0; i < engines->num_classes; i++) {
+ struct engine *engine = engine_ptr(classes, j);
+
+ /* Skip classes with no engines. */
+ if (!engines->class[i].num_engines)
+ continue;
+
+ assert(j < num_present);
+
+ engine->class = i;
+ engine->instance = -1;
+
+ engine->display_name = strdup(class_display_name(i));
+ assert(engine->display_name);
+ engine->short_name = strdup(class_short_name(i));
+ assert(engine->short_name);
+
+ /*
+ * Copy over pmu metadata from one real engine of the same
+ * class.
+ */
+ for (k = 0; k < engines->num_engines; k++) {
+ struct engine *e = engine_ptr(engines, k);
+
+ if (e->class == i) {
+ engine->num_counters = e->num_counters;
+ engine->busy = e->busy;
+ engine->sema = e->sema;
+ engine->wait = e->wait;
+ break;
+ }
+ }
+
+ j++; /* Next "class engine" to populate. */
+ }
+
+ return classes;
+}
+
+static struct engines *update_class_engines(struct engines *engines)
+{
+ static struct engines *classes;
+ unsigned int i, j;
+
+ if (!classes)
+ classes = init_class_engines(engines);
+
+ for (i = 0; i < classes->num_engines; i++) {
+ unsigned int num_engines = classes->class[i].num_engines;
+ struct engine *engine = engine_ptr(classes, i);
+
+ assert(num_engines);
+
+ memset(&engine->busy.val, 0, sizeof(engine->busy.val));
+ memset(&engine->sema.val, 0, sizeof(engine->sema.val));
+ memset(&engine->wait.val, 0, sizeof(engine->wait.val));
+
+ for (j = 0; j < engines->num_engines; j++) {
+ struct engine *e = engine_ptr(engines, j);
+
+ if (e->class == i) {
+ __pmu_sum(&engine->busy.val, &e->busy.val);
+ __pmu_sum(&engine->sema.val, &e->sema.val);
+ __pmu_sum(&engine->wait.val, &e->wait.val);
+ }
+ }
+
+ __pmu_normalize(&engine->busy.val, num_engines);
+ __pmu_normalize(&engine->sema.val, num_engines);
+ __pmu_normalize(&engine->wait.val, num_engines);
+ }
+
+ return classes;
+}
+
+static int
+print_engines(struct engines *engines, double t, int lines, int w, int h)
+{
+ struct engines *show;
+
+ if (class_view)
+ show = update_class_engines(engines);
+ else
+ show = engines;
+
+ lines = print_engines_header(show, t, lines, w, h);
+
+ for (unsigned int i = 0; i < show->num_engines && lines < h; i++)
+ lines = print_engine(show, i, t, lines, w, h);
+
+ lines = print_engines_footer(show, t, lines, w, h);
+
+ return lines;
+}
+
static bool stop_top;
static void sigint_handler(int sig)
@@ -1292,6 +1481,9 @@ static void process_stdin(unsigned int timeout_us)
case 'q':
stop_top = true;
break;
+ case '1':
+ class_view ^= true;
+ break;
};
}
}
@@ -1302,7 +1494,6 @@ int main(int argc, char **argv)
int con_w = -1, con_h = -1;
char *output_path = NULL;
struct engines *engines;
- unsigned int i;
int ret = 0, ch;
bool list_device = false;
char *pmu_device, *opt_device = NULL;
@@ -1366,6 +1557,7 @@ int main(int argc, char **argv)
case INTERACTIVE:
pops = &term_pops;
interactive_stdin();
+ class_view = true;
break;
case STDOUT:
pops = &stdout_pops;
@@ -1462,17 +1654,7 @@ int main(int argc, char **argv)
lines = print_imc(engines, t, lines, con_w, con_h);
- lines = print_engines_header(engines, t, lines, con_w,
- con_h);
-
- for (i = 0;
- i < engines->num_engines && lines < con_h;
- i++)
- lines = print_engine(engines, i, t, lines,
- con_w, con_h);
-
- lines = print_engines_footer(engines, t, lines, con_w,
- con_h);
+ lines = print_engines(engines, t, lines, con_w, con_h);
}
if (stop_top)
--
2.25.1
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [v2,i-g-t,1/2] intel_gpu_top: Support exiting the tool by pressing 'q' (rev3)
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
` (2 preceding siblings ...)
(?)
@ 2020-12-16 18:04 ` Patchwork
-1 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2020-12-16 18:04 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 3815 bytes --]
== Series Details ==
Series: series starting with [v2,i-g-t,1/2] intel_gpu_top: Support exiting the tool by pressing 'q' (rev3)
URL : https://patchwork.freedesktop.org/series/85009/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9493 -> IGTPW_5300
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/index.html
Known issues
------------
Here are the changes found in IGTPW_5300 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@i915_selftest@live@gt_pm:
- fi-tgl-y: NOTRUN -> [DMESG-FAIL][3] ([i915#1759])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-tgl-y/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@gt_timelines:
- fi-apl-guc: [PASS][4] -> [INCOMPLETE][5] ([i915#2750])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/fi-apl-guc/igt@i915_selftest@live@gt_timelines.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-apl-guc/igt@i915_selftest@live@gt_timelines.html
* igt@runner@aborted:
- fi-bdw-5557u: NOTRUN -> [FAIL][6] ([i915#2029] / [i915#2722])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-bdw-5557u/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][7] ([i915#2411] / [i915#402]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
* igt@vgem_basic@setversion:
- fi-tgl-y: [DMESG-WARN][9] ([i915#402]) -> [PASS][10] +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/fi-tgl-y/igt@vgem_basic@setversion.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-tgl-y/igt@vgem_basic@setversion.html
#### Warnings ####
* igt@i915_selftest@live@gt_lrc:
- fi-tgl-y: [INCOMPLETE][11] -> [DMESG-FAIL][12] ([i915#2373])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/fi-tgl-y/igt@i915_selftest@live@gt_lrc.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/fi-tgl-y/igt@i915_selftest@live@gt_lrc.html
[i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2373]: https://gitlab.freedesktop.org/drm/intel/issues/2373
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2750]: https://gitlab.freedesktop.org/drm/intel/issues/2750
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (42 -> 38)
------------------------------
Missing (4): fi-dg1-1 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5905 -> IGTPW_5300
CI-20190529: 20190529
CI_DRM_9493: 27c8bb9a6204aea5be2a779ca1f36482149de9bf @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5300: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/index.html
IGT_5905: 3d0934900bddeb7a68f1abab4cd05077f0609e32 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/index.html
[-- Attachment #1.2: Type: text/html, Size: 4714 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 21+ messages in thread
* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [v2,i-g-t,1/2] intel_gpu_top: Support exiting the tool by pressing 'q' (rev3)
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
` (3 preceding siblings ...)
(?)
@ 2020-12-16 21:08 ` Patchwork
-1 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2020-12-16 21:08 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: igt-dev
[-- Attachment #1.1: Type: text/plain, Size: 20416 bytes --]
== Series Details ==
Series: series starting with [v2,i-g-t,1/2] intel_gpu_top: Support exiting the tool by pressing 'q' (rev3)
URL : https://patchwork.freedesktop.org/series/85009/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9493_full -> IGTPW_5300_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/index.html
New tests
---------
New tests have been introduced between CI_DRM_9493_full and IGTPW_5300_full:
### New IGT tests (4) ###
* igt@kms_atomic_transition@modeset-transition:
- Statuses :
- Exec time: [None] s
* igt@kms_atomic_transition@modeset-transition-fencing:
- Statuses :
- Exec time: [None] s
* igt@kms_atomic_transition@modeset-transition-nonblocking:
- Statuses :
- Exec time: [None] s
* igt@kms_atomic_transition@modeset-transition-nonblocking-fencing:
- Statuses :
- Exec time: [None] s
Known issues
------------
Here are the changes found in IGTPW_5300_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fence@basic-wait@bcs0:
- shard-glk: NOTRUN -> [SKIP][1] ([fdo#109271]) +9 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-glk1/igt@gem_exec_fence@basic-wait@bcs0.html
* igt@gem_exec_params@secure-non-master:
- shard-tglb: NOTRUN -> [SKIP][2] ([fdo#112283])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb1/igt@gem_exec_params@secure-non-master.html
- shard-iclb: NOTRUN -> [SKIP][3] ([fdo#112283])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb3/igt@gem_exec_params@secure-non-master.html
* igt@gem_userptr_blits@process-exit-mmap-busy@uc:
- shard-kbl: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1699]) +3 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl7/igt@gem_userptr_blits@process-exit-mmap-busy@uc.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][5] -> [FAIL][6] ([i915#454])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
* igt@i915_suspend@sysfs-reader:
- shard-tglb: [PASS][7] -> [DMESG-WARN][8] ([i915#1436] / [i915#1602] / [i915#1887] / [i915#2411])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-tglb1/igt@i915_suspend@sysfs-reader.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb3/igt@i915_suspend@sysfs-reader.html
- shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#1602] / [i915#2635])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-apl3/igt@i915_suspend@sysfs-reader.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-apl4/igt@i915_suspend@sysfs-reader.html
- shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#1602] / [i915#2635])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-glk8/igt@i915_suspend@sysfs-reader.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-glk8/igt@i915_suspend@sysfs-reader.html
- shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([i915#2637])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw6/igt@i915_suspend@sysfs-reader.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw6/igt@i915_suspend@sysfs-reader.html
- shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#1602])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-kbl1/igt@i915_suspend@sysfs-reader.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl3/igt@i915_suspend@sysfs-reader.html
- shard-iclb: [PASS][17] -> [DMESG-WARN][18] ([i915#1602])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb5/igt@i915_suspend@sysfs-reader.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb4/igt@i915_suspend@sysfs-reader.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#111615]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb5/igt@kms_big_fb@yf-tiled-64bpp-rotate-270.html
- shard-iclb: NOTRUN -> [SKIP][20] ([fdo#110723])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb2/igt@kms_big_fb@yf-tiled-64bpp-rotate-270.html
* igt@kms_chamelium@hdmi-aspect-ratio:
- shard-hsw: NOTRUN -> [SKIP][21] ([fdo#109271] / [fdo#111827])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw4/igt@kms_chamelium@hdmi-aspect-ratio.html
* igt@kms_color_chamelium@pipe-d-ctm-0-25:
- shard-kbl: NOTRUN -> [SKIP][22] ([fdo#109271] / [fdo#111827]) +2 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl2/igt@kms_color_chamelium@pipe-d-ctm-0-25.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: [PASS][23] -> [FAIL][24] ([i915#96])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_flip@2x-flip-vs-modeset-vs-hang:
- shard-iclb: NOTRUN -> [SKIP][25] ([fdo#109274]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb1/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1:
- shard-tglb: [PASS][26] -> [FAIL][27] ([i915#2122])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-tglb5/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb5/igt@kms_flip@flip-vs-blocking-wf-vblank@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-kbl: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2672])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff:
- shard-tglb: NOTRUN -> [SKIP][29] ([fdo#111825]) +3 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff.html
- shard-iclb: NOTRUN -> [SKIP][30] ([fdo#109280])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271]) +14 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-apl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-farfromfence:
- shard-kbl: NOTRUN -> [SKIP][32] ([fdo#109271]) +48 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl4/igt@kms_frontbuffer_tracking@psr-farfromfence.html
* igt@kms_hdr@static-toggle-dpms:
- shard-tglb: NOTRUN -> [SKIP][33] ([i915#1187])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb8/igt@kms_hdr@static-toggle-dpms.html
- shard-iclb: NOTRUN -> [SKIP][34] ([i915#1187])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb7/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
- shard-kbl: NOTRUN -> [FAIL][35] ([fdo#108145] / [i915#265])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl2/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-hsw: NOTRUN -> [SKIP][36] ([fdo#109271]) +14 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
#### Possible fixes ####
* {igt@gem_exec_balancer@fairslice}:
- shard-tglb: [FAIL][37] ([i915#2802]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-tglb7/igt@gem_exec_balancer@fairslice.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb2/igt@gem_exec_balancer@fairslice.html
- shard-iclb: [FAIL][39] ([i915#2802]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb2/igt@gem_exec_balancer@fairslice.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb6/igt@gem_exec_balancer@fairslice.html
* igt@gen9_exec_parse@allowed-all:
- shard-kbl: [DMESG-WARN][41] ([i915#1436] / [i915#716]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-kbl1/igt@gen9_exec_parse@allowed-all.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl1/igt@gen9_exec_parse@allowed-all.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: [DMESG-WARN][43] ([i915#2635]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
- shard-iclb: [DMESG-WARN][45] -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
- shard-glk: [DMESG-WARN][47] ([i915#2635]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-glk2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-glk7/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
- shard-hsw: [DMESG-WARN][49] ([i915#2637]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
- shard-kbl: [DMESG-WARN][51] -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-kbl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
- shard-tglb: [INCOMPLETE][53] ([i915#1436] / [i915#1798] / [i915#1982] / [i915#456]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-tglb2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
- shard-hsw: [FAIL][55] ([i915#96]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp1:
- shard-apl: [FAIL][57] ([i915#79]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-apl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp1.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-apl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp1.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60] +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb8/igt@kms_psr@psr2_suspend.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb2/igt@kms_psr@psr2_suspend.html
* igt@kms_vblank@pipe-b-query-forked-busy-hang:
- shard-hsw: [INCOMPLETE][61] -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw2/igt@kms_vblank@pipe-b-query-forked-busy-hang.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw4/igt@kms_vblank@pipe-b-query-forked-busy-hang.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm:
- shard-hsw: [SKIP][63] ([fdo#109271]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw8/igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw1/igt@kms_vblank@pipe-b-ts-continuation-dpms-rpm.html
#### Warnings ####
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][65] ([i915#1804] / [i915#2684]) -> [WARN][66] ([i915#2684])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb5/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-iclb: [SKIP][67] ([i915#579]) -> [SKIP][68] ([fdo#109293] / [fdo#109506])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb8/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb6/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
- shard-tglb: [SKIP][69] ([i915#579]) -> [SKIP][70] ([fdo#109506] / [i915#2411])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-tglb5/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-tglb2/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
* igt@runner@aborted:
- shard-hsw: [FAIL][71] ([i915#2295] / [i915#483]) -> [FAIL][72] ([i915#2295])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-hsw1/igt@runner@aborted.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-hsw6/igt@runner@aborted.html
- shard-kbl: ([FAIL][73], [FAIL][74], [FAIL][75]) ([fdo#109271] / [i915#1436] / [i915#1814] / [i915#2295] / [i915#2722] / [i915#483] / [i915#716]) -> ([FAIL][76], [FAIL][77]) ([i915#2295] / [i915#2722] / [i915#483])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-kbl1/igt@runner@aborted.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-kbl3/igt@runner@aborted.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-kbl2/igt@runner@aborted.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl3/igt@runner@aborted.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-kbl6/igt@runner@aborted.html
- shard-iclb: ([FAIL][78], [FAIL][79]) ([i915#1814] / [i915#2295] / [i915#2722] / [i915#2724] / [i915#483]) -> ([FAIL][80], [FAIL][81]) ([i915#2295] / [i915#2722] / [i915#2724])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb6/igt@runner@aborted.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-iclb8/igt@runner@aborted.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb4/igt@runner@aborted.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-iclb2/igt@runner@aborted.html
- shard-apl: ([FAIL][82], [FAIL][83]) ([i915#1814] / [i915#2295] / [i915#2722]) -> ([FAIL][84], [FAIL][85]) ([i915#2295] / [i915#2722])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-apl6/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-apl2/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-apl4/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-apl1/igt@runner@aborted.html
- shard-glk: ([FAIL][86], [FAIL][87]) ([i915#1814] / [i915#2295] / [i915#2722] / [i915#483] / [k.org#202321]) -> ([FAIL][88], [FAIL][89]) ([i915#2295] / [i915#2722] / [k.org#202321])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-glk2/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9493/shard-glk7/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-glk8/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/shard-glk2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1187]: https://gitlab.freedesktop.org/drm/intel/issues/1187
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
[i915#1699]: https://gitlab.freedesktop.org/drm/intel/issues/1699
[i915#1798]: https://gitlab.freedesktop.org/drm/intel/issues/1798
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1887]: https://gitlab.freedesktop.org/drm/intel/issues/1887
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2635]: https://gitlab.freedesktop.org/drm/intel/issues/2635
[i915#2637]: https://gitlab.freedesktop.org/drm/intel/issues/2637
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724
[i915#2802]: https://gitlab.freedesktop.org/drm/intel/issues/2802
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#456]: https://gitlab.freedesktop.org/drm/intel/issues/456
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (10 -> 8)
------------------------------
Missing (2): pig-skl-6260u pig-glk-j5005
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_5905 -> IGTPW_5300
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_9493: 27c8bb9a6204aea5be2a779ca1f36482149de9bf @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_5300: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/index.html
IGT_5905: 3d0934900bddeb7a68f1abab4cd05077f0609e32 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5300/index.html
[-- Attachment #1.2: Type: text/html, Size: 26105 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q'
2020-12-16 15:57 ` [Intel-gfx] " Chris Wilson
@ 2020-12-17 8:31 ` Chris Wilson
0 siblings, 0 replies; 21+ messages in thread
From: Chris Wilson @ 2020-12-17 8:31 UTC (permalink / raw)
To: Tvrtko Ursulin, igt-dev; +Cc: Intel-gfx
Quoting Chris Wilson (2020-12-16 15:57:53)
> Quoting Tvrtko Ursulin (2020-12-16 15:54:20)
> > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >
> > Analoguous to top(1) we can enable the user to exit from the tool by
> > pressing 'q' on the console.
> >
> > v2:
> > * Fix sleep period with closed stdin. (Chris)
> >
> > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
I've only used this once, and I already miss it.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2020-12-17 8:31 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-16 15:28 [Intel-gfx] [PATCH i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q' Tvrtko Ursulin
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
2020-12-16 15:28 ` [Intel-gfx] [PATCH i-g-t 2/2] intel_gpu_top: Aggregate engine busyness per class Tvrtko Ursulin
2020-12-16 15:28 ` [igt-dev] " Tvrtko Ursulin
2020-12-16 15:51 ` [Intel-gfx] " Chris Wilson
2020-12-16 15:52 ` Chris Wilson
2020-12-16 15:52 ` Chris Wilson
2020-12-16 16:01 ` [Intel-gfx] " Tvrtko Ursulin
2020-12-16 16:01 ` Tvrtko Ursulin
2020-12-16 16:05 ` [Intel-gfx] " Chris Wilson
2020-12-16 16:05 ` Chris Wilson
2020-12-16 16:42 ` [Intel-gfx] [PATCH v2 " Tvrtko Ursulin
2020-12-16 16:42 ` [igt-dev] " Tvrtko Ursulin
2020-12-16 15:44 ` [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] intel_gpu_top: Support exiting the tool by pressing 'q' Chris Wilson
2020-12-16 15:44 ` Chris Wilson
2020-12-16 15:54 ` [Intel-gfx] [PATCH v2 " Tvrtko Ursulin
2020-12-16 15:54 ` [igt-dev] " Tvrtko Ursulin
2020-12-16 15:57 ` [Intel-gfx] " Chris Wilson
2020-12-17 8:31 ` Chris Wilson
2020-12-16 18:04 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [v2,i-g-t,1/2] intel_gpu_top: Support exiting the tool by pressing 'q' (rev3) Patchwork
2020-12-16 21:08 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
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