* [PATCH] clk: sunxi-ng: h6: Fix CEC clock
@ 2021-01-06 14:32 ` Andre Przywara
0 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2021-01-06 14:32 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Maxime Ripard, Chen-Yu Tsai
Cc: Jernej Skrabec, Icenowy Zheng, linux-clk, linux-arm-kernel, linux-sunxi
The CEC clock on the H6 SoC is a bit special, since it uses a fixed
pre-dividier for one source clock (the PLL), but conveys the other clock
(32K OSC) directly.
We are using a fixed predivider array for that, but fail to use the right
flag to actually activate that.
Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Reported-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index f2497d0a4683..a26dbbdff80d 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -682,7 +682,7 @@ static struct ccu_mux hdmi_cec_clk = {
.common = {
.reg = 0xb10,
- .features = CCU_FEATURE_VARIABLE_PREDIV,
+ .features = CCU_FEATURE_FIXED_PREDIV,
.hw.init = CLK_HW_INIT_PARENTS("hdmi-cec",
hdmi_cec_parents,
&ccu_mux_ops,
--
2.17.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] clk: sunxi-ng: h6: Fix CEC clock
@ 2021-01-06 14:32 ` Andre Przywara
0 siblings, 0 replies; 6+ messages in thread
From: Andre Przywara @ 2021-01-06 14:32 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Maxime Ripard, Chen-Yu Tsai
Cc: Jernej Skrabec, linux-sunxi, linux-clk, linux-arm-kernel, Icenowy Zheng
The CEC clock on the H6 SoC is a bit special, since it uses a fixed
pre-dividier for one source clock (the PLL), but conveys the other clock
(32K OSC) directly.
We are using a fixed predivider array for that, but fail to use the right
flag to actually activate that.
Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Reported-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index f2497d0a4683..a26dbbdff80d 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -682,7 +682,7 @@ static struct ccu_mux hdmi_cec_clk = {
.common = {
.reg = 0xb10,
- .features = CCU_FEATURE_VARIABLE_PREDIV,
+ .features = CCU_FEATURE_FIXED_PREDIV,
.hw.init = CLK_HW_INIT_PARENTS("hdmi-cec",
hdmi_cec_parents,
&ccu_mux_ops,
--
2.17.5
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [linux-sunxi] [PATCH] clk: sunxi-ng: h6: Fix CEC clock
2021-01-06 14:32 ` Andre Przywara
@ 2021-01-06 16:06 ` Chen-Yu Tsai
-1 siblings, 0 replies; 6+ messages in thread
From: Chen-Yu Tsai @ 2021-01-06 16:06 UTC (permalink / raw)
To: André Przywara
Cc: Michael Turquette, Stephen Boyd, Maxime Ripard, Jernej Skrabec,
Icenowy Zheng, linux-clk, linux-arm-kernel, linux-sunxi
On Wed, Jan 6, 2021 at 10:33 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> The CEC clock on the H6 SoC is a bit special, since it uses a fixed
> pre-dividier for one source clock (the PLL), but conveys the other clock
> (32K OSC) directly.
> We are using a fixed predivider array for that, but fail to use the right
> flag to actually activate that.
>
> Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Reported-by: Jernej Skrabec <jernej.skrabec@siol.net>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [linux-sunxi] [PATCH] clk: sunxi-ng: h6: Fix CEC clock
@ 2021-01-06 16:06 ` Chen-Yu Tsai
0 siblings, 0 replies; 6+ messages in thread
From: Chen-Yu Tsai @ 2021-01-06 16:06 UTC (permalink / raw)
To: André Przywara
Cc: Jernej Skrabec, Stephen Boyd, Michael Turquette, Maxime Ripard,
linux-sunxi, linux-clk, linux-arm-kernel, Icenowy Zheng
On Wed, Jan 6, 2021 at 10:33 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> The CEC clock on the H6 SoC is a bit special, since it uses a fixed
> pre-dividier for one source clock (the PLL), but conveys the other clock
> (32K OSC) directly.
> We are using a fixed predivider array for that, but fail to use the right
> flag to actually activate that.
>
> Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Reported-by: Jernej Skrabec <jernej.skrabec@siol.net>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] clk: sunxi-ng: h6: Fix CEC clock
2021-01-06 14:32 ` Andre Przywara
@ 2021-01-06 16:51 ` Maxime Ripard
-1 siblings, 0 replies; 6+ messages in thread
From: Maxime Ripard @ 2021-01-06 16:51 UTC (permalink / raw)
To: Andre Przywara
Cc: Michael Turquette, Stephen Boyd, Chen-Yu Tsai, Jernej Skrabec,
Icenowy Zheng, linux-clk, linux-arm-kernel, linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 573 bytes --]
On Wed, Jan 06, 2021 at 02:32:46PM +0000, Andre Przywara wrote:
> The CEC clock on the H6 SoC is a bit special, since it uses a fixed
> pre-dividier for one source clock (the PLL), but conveys the other clock
> (32K OSC) directly.
> We are using a fixed predivider array for that, but fail to use the right
> flag to actually activate that.
>
> Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Reported-by: Jernej Skrabec <jernej.skrabec@siol.net>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Applied, thanks!
Maxime
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] clk: sunxi-ng: h6: Fix CEC clock
@ 2021-01-06 16:51 ` Maxime Ripard
0 siblings, 0 replies; 6+ messages in thread
From: Maxime Ripard @ 2021-01-06 16:51 UTC (permalink / raw)
To: Andre Przywara
Cc: Jernej Skrabec, Stephen Boyd, Michael Turquette, linux-sunxi,
Chen-Yu Tsai, linux-clk, linux-arm-kernel, Icenowy Zheng
[-- Attachment #1.1: Type: text/plain, Size: 573 bytes --]
On Wed, Jan 06, 2021 at 02:32:46PM +0000, Andre Przywara wrote:
> The CEC clock on the H6 SoC is a bit special, since it uses a fixed
> pre-dividier for one source clock (the PLL), but conveys the other clock
> (32K OSC) directly.
> We are using a fixed predivider array for that, but fail to use the right
> flag to actually activate that.
>
> Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Reported-by: Jernej Skrabec <jernej.skrabec@siol.net>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Applied, thanks!
Maxime
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-01-06 16:53 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-06 14:32 [PATCH] clk: sunxi-ng: h6: Fix CEC clock Andre Przywara
2021-01-06 14:32 ` Andre Przywara
2021-01-06 16:06 ` [linux-sunxi] " Chen-Yu Tsai
2021-01-06 16:06 ` Chen-Yu Tsai
2021-01-06 16:51 ` Maxime Ripard
2021-01-06 16:51 ` Maxime Ripard
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