From: Dave Gerlach <d-gerlach@ti.com>
To: Nishanth Menon <nm@ti.com>
Cc: Dave Gerlach <d-gerlach@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
Tony Lindgren <tony@atomide.com>,
Vignesh Raghavendra <vigneshr@ti.com>, Suman Anna <s-anna@ti.com>,
Sekhar Nori <nsekhar@ti.com>,
Kishon Vijay Abraham <kishon@ti.com>,
Lokesh Vutla <lokeshvutla@ti.com>,
Aswath Govindraju <a-govindraju@ti.com>
Subject: [PATCH v3 4/5] arm64: dts: ti: k3-am64-main: Enable DMA support
Date: Wed, 20 Jan 2021 14:25:31 -0600 [thread overview]
Message-ID: <20210120202532.9011-5-d-gerlach@ti.com> (raw)
In-Reply-To: <20210120202532.9011-1-d-gerlach@ti.com>
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
Add the nodes for DMSS INTA, BCDMA and PKTDMA to enable the use of the
DMAs in the system.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 74 ++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index e3ef4bff04af..25b702303637 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -49,6 +49,8 @@ dmss: dmss {
dma-ranges;
ranges;
+ ti,sci-dev-id = <25>;
+
secure_proxy_main: mailbox@4d000000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
@@ -59,6 +61,78 @@ secure_proxy_main: mailbox@4d000000 {
interrupt-names = "rx_012";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ inta_main_dmss: interrupt-controller@48000000 {
+ compatible = "ti,sci-inta";
+ reg = <0x00 0x48000000 0x00 0x100000>;
+ #address-cells = <0>;
+ #interrupt-cells = <0>;
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ msi-controller;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <28>;
+ ti,interrupt-ranges = <4 68 36>;
+ ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
+ };
+
+ main_bcdma: dma-controller@485c0100 {
+ compatible = "ti,am64-dmss-bcdma";
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c000000 0x00 0x20000>,
+ <0x00 0x4a820000 0x00 0x20000>,
+ <0x00 0x4aa40000 0x00 0x20000>,
+ <0x00 0x4bc00000 0x00 0x100000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <3>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <26>;
+ ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
+ ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
+ ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
+ };
+
+ main_pktdma: dma-controller@485c0000 {
+ compatible = "ti,am64-dmss-pktdma";
+ reg = <0x00 0x485c0000 0x00 0x100>,
+ <0x00 0x4a800000 0x00 0x20000>,
+ <0x00 0x4aa00000 0x00 0x40000>,
+ <0x00 0x4b800000 0x00 0x400000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <2>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <30>;
+ ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
+ <0x24>, /* CPSW_TX_CHAN */
+ <0x25>, /* SAUL_TX_0_CHAN */
+ <0x26>, /* SAUL_TX_1_CHAN */
+ <0x27>, /* ICSSG_0_TX_CHAN */
+ <0x28>; /* ICSSG_1_TX_CHAN */
+ ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
+ <0x11>, /* RING_CPSW_TX_CHAN */
+ <0x12>, /* RING_SAUL_TX_0_CHAN */
+ <0x13>, /* RING_SAUL_TX_1_CHAN */
+ <0x14>, /* RING_ICSSG_0_TX_CHAN */
+ <0x15>; /* RING_ICSSG_1_TX_CHAN */
+ ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
+ <0x2b>, /* CPSW_RX_CHAN */
+ <0x2d>, /* SAUL_RX_0_CHAN */
+ <0x2f>, /* SAUL_RX_1_CHAN */
+ <0x31>, /* SAUL_RX_2_CHAN */
+ <0x33>, /* SAUL_RX_3_CHAN */
+ <0x35>, /* ICSSG_0_RX_CHAN */
+ <0x37>; /* ICSSG_1_RX_CHAN */
+ ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
+ <0x2c>, /* FLOW_CPSW_RX_CHAN */
+ <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
+ <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
+ <0x36>, /* FLOW_ICSSG_0_RX_CHAN */
+ <0x38>; /* FLOW_ICSSG_1_RX_CHAN */
+ };
};
dmsc: dmsc@44043000 {
--
2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Dave Gerlach <d-gerlach@ti.com>
To: Nishanth Menon <nm@ti.com>
Cc: devicetree@vger.kernel.org, Vignesh Raghavendra <vigneshr@ti.com>,
Dave Gerlach <d-gerlach@ti.com>, Tony Lindgren <tony@atomide.com>,
Sekhar Nori <nsekhar@ti.com>,
Kishon Vijay Abraham <kishon@ti.com>,
Lokesh Vutla <lokeshvutla@ti.com>,
Rob Herring <robh+dt@kernel.org>,
Aswath Govindraju <a-govindraju@ti.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/5] arm64: dts: ti: k3-am64-main: Enable DMA support
Date: Wed, 20 Jan 2021 14:25:31 -0600 [thread overview]
Message-ID: <20210120202532.9011-5-d-gerlach@ti.com> (raw)
In-Reply-To: <20210120202532.9011-1-d-gerlach@ti.com>
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
Add the nodes for DMSS INTA, BCDMA and PKTDMA to enable the use of the
DMAs in the system.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 74 ++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index e3ef4bff04af..25b702303637 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -49,6 +49,8 @@ dmss: dmss {
dma-ranges;
ranges;
+ ti,sci-dev-id = <25>;
+
secure_proxy_main: mailbox@4d000000 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
@@ -59,6 +61,78 @@ secure_proxy_main: mailbox@4d000000 {
interrupt-names = "rx_012";
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ inta_main_dmss: interrupt-controller@48000000 {
+ compatible = "ti,sci-inta";
+ reg = <0x00 0x48000000 0x00 0x100000>;
+ #address-cells = <0>;
+ #interrupt-cells = <0>;
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ msi-controller;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <28>;
+ ti,interrupt-ranges = <4 68 36>;
+ ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
+ };
+
+ main_bcdma: dma-controller@485c0100 {
+ compatible = "ti,am64-dmss-bcdma";
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c000000 0x00 0x20000>,
+ <0x00 0x4a820000 0x00 0x20000>,
+ <0x00 0x4aa40000 0x00 0x20000>,
+ <0x00 0x4bc00000 0x00 0x100000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <3>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <26>;
+ ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
+ ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
+ ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
+ };
+
+ main_pktdma: dma-controller@485c0000 {
+ compatible = "ti,am64-dmss-pktdma";
+ reg = <0x00 0x485c0000 0x00 0x100>,
+ <0x00 0x4a800000 0x00 0x20000>,
+ <0x00 0x4aa00000 0x00 0x40000>,
+ <0x00 0x4b800000 0x00 0x400000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&inta_main_dmss>;
+ #dma-cells = <2>;
+
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <30>;
+ ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
+ <0x24>, /* CPSW_TX_CHAN */
+ <0x25>, /* SAUL_TX_0_CHAN */
+ <0x26>, /* SAUL_TX_1_CHAN */
+ <0x27>, /* ICSSG_0_TX_CHAN */
+ <0x28>; /* ICSSG_1_TX_CHAN */
+ ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
+ <0x11>, /* RING_CPSW_TX_CHAN */
+ <0x12>, /* RING_SAUL_TX_0_CHAN */
+ <0x13>, /* RING_SAUL_TX_1_CHAN */
+ <0x14>, /* RING_ICSSG_0_TX_CHAN */
+ <0x15>; /* RING_ICSSG_1_TX_CHAN */
+ ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
+ <0x2b>, /* CPSW_RX_CHAN */
+ <0x2d>, /* SAUL_RX_0_CHAN */
+ <0x2f>, /* SAUL_RX_1_CHAN */
+ <0x31>, /* SAUL_RX_2_CHAN */
+ <0x33>, /* SAUL_RX_3_CHAN */
+ <0x35>, /* ICSSG_0_RX_CHAN */
+ <0x37>; /* ICSSG_1_RX_CHAN */
+ ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
+ <0x2c>, /* FLOW_CPSW_RX_CHAN */
+ <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
+ <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
+ <0x36>, /* FLOW_ICSSG_0_RX_CHAN */
+ <0x38>; /* FLOW_ICSSG_1_RX_CHAN */
+ };
};
dmsc: dmsc@44043000 {
--
2.28.0
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next prev parent reply other threads:[~2021-01-20 20:49 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-20 20:25 [PATCH v3 0/5] arm64: Initial support for Texas Instruments AM642 Platform Dave Gerlach
2021-01-20 20:25 ` Dave Gerlach
2021-01-20 20:25 ` [PATCH v3 1/5] dt-bindings: arm: ti: Add bindings for AM642 SoC Dave Gerlach
2021-01-20 20:25 ` Dave Gerlach
2021-01-20 20:25 ` [PATCH v3 2/5] dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64 Dave Gerlach
2021-01-20 20:25 ` Dave Gerlach
2021-01-20 20:50 ` Suman Anna
2021-01-20 20:50 ` Suman Anna
2021-01-25 14:39 ` Nishanth Menon
2021-01-25 14:39 ` Nishanth Menon
2021-02-09 2:34 ` Rob Herring
2021-02-09 2:34 ` Rob Herring
2021-01-20 20:25 ` [PATCH v3 3/5] arm64: dts: ti: Add support for AM642 SoC Dave Gerlach
2021-01-20 20:25 ` Dave Gerlach
2021-01-20 22:04 ` Nishanth Menon
2021-01-20 22:04 ` Nishanth Menon
2021-01-21 17:25 ` Suman Anna
2021-01-21 17:25 ` Suman Anna
2021-01-21 17:46 ` Nishanth Menon
2021-01-21 17:46 ` Nishanth Menon
2021-01-21 18:13 ` Suman Anna
2021-01-21 18:13 ` Suman Anna
2021-01-21 18:39 ` Nishanth Menon
2021-01-21 18:39 ` Nishanth Menon
2021-01-21 19:57 ` Suman Anna
2021-01-21 19:57 ` Suman Anna
2021-01-21 20:13 ` Nishanth Menon
2021-01-21 20:13 ` Nishanth Menon
2021-01-21 20:42 ` Suman Anna
2021-01-21 20:42 ` Suman Anna
2021-01-21 21:18 ` Nishanth Menon
2021-01-21 21:18 ` Nishanth Menon
2021-01-21 22:57 ` Suman Anna
2021-01-21 22:57 ` Suman Anna
2021-01-22 11:23 ` Arnd Bergmann
2021-01-22 11:23 ` Arnd Bergmann
2021-01-22 13:00 ` Tony Lindgren
2021-01-22 13:00 ` Tony Lindgren
2021-01-25 14:16 ` Nishanth Menon
2021-01-25 14:16 ` Nishanth Menon
2021-01-25 22:48 ` Suman Anna
2021-01-25 22:48 ` Suman Anna
2021-01-25 23:02 ` Suman Anna
2021-01-25 23:02 ` Suman Anna
2021-01-20 20:25 ` Dave Gerlach [this message]
2021-01-20 20:25 ` [PATCH v3 4/5] arm64: dts: ti: k3-am64-main: Enable DMA support Dave Gerlach
2021-01-20 20:25 ` [PATCH v3 5/5] arm64: dts: ti: Add support for AM642 EVM Dave Gerlach
2021-01-20 20:25 ` Dave Gerlach
2021-01-25 16:44 ` Suman Anna
2021-01-25 16:44 ` Suman Anna
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