From: Peter Zijlstra <peterz@infradead.org>
To: Like Xu <like.xu@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>,
Kan Liang <kan.liang@linux.intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 RESEND 3/5] perf/x86/lbr: Move cpuc->lbr_xsave allocation out of sleeping region
Date: Tue, 23 Mar 2021 22:41:40 +0100 [thread overview]
Message-ID: <20210323214140.GE4746@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <20210322060635.821531-4-like.xu@linux.intel.com>
On Mon, Mar 22, 2021 at 02:06:33PM +0800, Like Xu wrote:
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 18df17129695..a4ce669cc78d 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -373,7 +373,7 @@ set_ext_hw_attr(struct hw_perf_event *hwc, struct perf_event *event)
> return x86_pmu_extra_regs(val, event);
> }
>
> -int x86_reserve_hardware(void)
> +int x86_reserve_hardware(struct perf_event *event)
> {
> int err = 0;
>
> @@ -382,8 +382,10 @@ int x86_reserve_hardware(void)
> if (atomic_read(&pmc_refcount) == 0) {
> if (!reserve_pmc_hardware())
> err = -EBUSY;
> - else
> + else {
> reserve_ds_buffers();
> + reserve_lbr_buffers(event);
> + }
> }
> if (!err)
> atomic_inc(&pmc_refcount);
This makes absolutely no sense what so ever. This is only executed for
the first event that gets here.
next prev parent reply other threads:[~2021-03-23 21:43 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-22 6:06 [PATCH v4 RESEND 0/5] x86: The perf/x86 changes to support guest Arch LBR Like Xu
2021-03-22 6:06 ` [PATCH v4 RESEND 1/5] perf/x86/intel: Fix the comment about guest LBR support on KVM Like Xu
2021-03-22 6:06 ` [PATCH v4 RESEND 2/5] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Like Xu
2021-03-23 21:38 ` Peter Zijlstra
2021-03-24 2:02 ` Like Xu
2021-03-22 6:06 ` [PATCH v4 RESEND 3/5] perf/x86/lbr: Move cpuc->lbr_xsave allocation out of sleeping region Like Xu
2021-03-23 20:56 ` Liang, Kan
2021-03-23 21:41 ` Peter Zijlstra [this message]
2021-03-23 23:03 ` Liang, Kan
2021-03-24 1:32 ` Namhyung Kim
2021-03-24 3:46 ` Like Xu
2021-03-24 4:04 ` Namhyung Kim
2021-03-24 5:42 ` Like Xu
2021-03-22 6:06 ` [PATCH v4 RESEND 4/5] perf/x86/lbr: Skip checking for the existence of LBR_TOS for Arch LBR Like Xu
2021-03-23 21:49 ` Peter Zijlstra
2021-03-24 3:32 ` Like Xu
2021-03-22 6:06 ` [PATCH v4 RESEND 5/5] perf/x86: Move ARCH_LBR_CTL_MASK definition to include/asm/msr-index.h Like Xu
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