From: Will Deacon <will@kernel.org> To: Hector Martin <marcan@marcan.st> Cc: linux-arm-kernel@lists.infradead.org, Marc Zyngier <maz@kernel.org>, Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@kernel.org>, Olof Johansson <olof@lixom.net>, Krzysztof Kozlowski <krzk@kernel.org>, Mark Kettenis <mark.kettenis@xs4all.nl>, Tony Lindgren <tony@atomide.com>, Mohamed Mediouni <mohamed.mediouni@caramail.com>, Stan Skowronek <stan@corellium.com>, Alexander Graf <graf@amazon.com>, Linus Walleij <linus.walleij@linaro.org>, Mark Rutland <mark.rutland@arm.com>, Andy Shevchenko <andy.shevchenko@gmail.com>, Jonathan Corbet <corbet@lwn.net>, Catalin Marinas <catalin.marinas@arm.com>, Christoph Hellwig <hch@infradead.org>, "David S. Miller" <davem@davemloft.net>, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 15/18] irqchip/apple-aic: Add support for the Apple Interrupt Controller Date: Wed, 7 Apr 2021 22:09:41 +0100 [thread overview] Message-ID: <20210407210940.GC16198@willie-the-truck> (raw) In-Reply-To: <20210402090542.131194-16-marcan@marcan.st> On Fri, Apr 02, 2021 at 06:05:39PM +0900, Hector Martin wrote: > This is the root interrupt controller used on Apple ARM SoCs such as the > M1. This irqchip driver performs multiple functions: > > * Handles both IRQs and FIQs > > * Drives the AIC peripheral itself (which handles IRQs) > > * Dispatches FIQs to downstream hard-wired clients (currently the ARM > timer). > > * Implements a virtual IPI multiplexer to funnel multiple Linux IPIs > into a single hardware IPI > > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > MAINTAINERS | 2 + > drivers/irqchip/Kconfig | 8 + > drivers/irqchip/Makefile | 1 + > drivers/irqchip/irq-apple-aic.c | 837 ++++++++++++++++++++++++++++++++ > include/linux/cpuhotplug.h | 1 + > 5 files changed, 849 insertions(+) > create mode 100644 drivers/irqchip/irq-apple-aic.c Couple of stale comment nits: > +static void aic_ipi_unmask(struct irq_data *d) > +{ > + struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); > + u32 irq_bit = BIT(irqd_to_hwirq(d)); > + > + atomic_or(irq_bit, this_cpu_ptr(&aic_vipi_enable)); > + > + /* > + * The atomic_or() above must complete before the atomic_read_acquire() below to avoid > + * racing aic_ipi_send_mask(). > + */ (the atomic_read_acquire() is now an atomic_read()) > + smp_mb__after_atomic(); > + > + /* > + * If a pending vIPI was unmasked, raise a HW IPI to ourselves. > + * No barriers needed here since this is a self-IPI. > + */ > + if (atomic_read(this_cpu_ptr(&aic_vipi_flag)) & irq_bit) > + aic_ic_write(ic, AIC_IPI_SEND, AIC_IPI_SEND_CPU(smp_processor_id())); > +} > + > +static void aic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) > +{ > + struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); > + u32 irq_bit = BIT(irqd_to_hwirq(d)); > + u32 send = 0; > + int cpu; > + unsigned long pending; > + > + for_each_cpu(cpu, mask) { > + /* > + * This sequence is the mirror of the one in aic_ipi_unmask(); > + * see the comment there. Additionally, release semantics > + * ensure that the vIPI flag set is ordered after any shared > + * memory accesses that precede it. This therefore also pairs > + * with the atomic_fetch_andnot in aic_handle_ipi(). > + */ > + pending = atomic_fetch_or_release(irq_bit, per_cpu_ptr(&aic_vipi_flag, cpu)); > + > + /* > + * The atomic_fetch_or_release() above must complete before the > + * atomic_read_acquire() below to avoid racing aic_ipi_unmask(). > + */ (same here) > + smp_mb__after_atomic(); > + > + if (!(pending & irq_bit) && > + (atomic_read(per_cpu_ptr(&aic_vipi_enable, cpu)) & irq_bit)) > + send |= AIC_IPI_SEND_CPU(cpu); > + } But with that: Acked-by: Will Deacon <will@kernel.org> Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org> To: Hector Martin <marcan@marcan.st> Cc: linux-arm-kernel@lists.infradead.org, Marc Zyngier <maz@kernel.org>, Rob Herring <robh@kernel.org>, Arnd Bergmann <arnd@kernel.org>, Olof Johansson <olof@lixom.net>, Krzysztof Kozlowski <krzk@kernel.org>, Mark Kettenis <mark.kettenis@xs4all.nl>, Tony Lindgren <tony@atomide.com>, Mohamed Mediouni <mohamed.mediouni@caramail.com>, Stan Skowronek <stan@corellium.com>, Alexander Graf <graf@amazon.com>, Linus Walleij <linus.walleij@linaro.org>, Mark Rutland <mark.rutland@arm.com>, Andy Shevchenko <andy.shevchenko@gmail.com>, Jonathan Corbet <corbet@lwn.net>, Catalin Marinas <catalin.marinas@arm.com>, Christoph Hellwig <hch@infradead.org>, "David S. Miller" <davem@davemloft.net>, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 15/18] irqchip/apple-aic: Add support for the Apple Interrupt Controller Date: Wed, 7 Apr 2021 22:09:41 +0100 [thread overview] Message-ID: <20210407210940.GC16198@willie-the-truck> (raw) In-Reply-To: <20210402090542.131194-16-marcan@marcan.st> On Fri, Apr 02, 2021 at 06:05:39PM +0900, Hector Martin wrote: > This is the root interrupt controller used on Apple ARM SoCs such as the > M1. This irqchip driver performs multiple functions: > > * Handles both IRQs and FIQs > > * Drives the AIC peripheral itself (which handles IRQs) > > * Dispatches FIQs to downstream hard-wired clients (currently the ARM > timer). > > * Implements a virtual IPI multiplexer to funnel multiple Linux IPIs > into a single hardware IPI > > Signed-off-by: Hector Martin <marcan@marcan.st> > --- > MAINTAINERS | 2 + > drivers/irqchip/Kconfig | 8 + > drivers/irqchip/Makefile | 1 + > drivers/irqchip/irq-apple-aic.c | 837 ++++++++++++++++++++++++++++++++ > include/linux/cpuhotplug.h | 1 + > 5 files changed, 849 insertions(+) > create mode 100644 drivers/irqchip/irq-apple-aic.c Couple of stale comment nits: > +static void aic_ipi_unmask(struct irq_data *d) > +{ > + struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); > + u32 irq_bit = BIT(irqd_to_hwirq(d)); > + > + atomic_or(irq_bit, this_cpu_ptr(&aic_vipi_enable)); > + > + /* > + * The atomic_or() above must complete before the atomic_read_acquire() below to avoid > + * racing aic_ipi_send_mask(). > + */ (the atomic_read_acquire() is now an atomic_read()) > + smp_mb__after_atomic(); > + > + /* > + * If a pending vIPI was unmasked, raise a HW IPI to ourselves. > + * No barriers needed here since this is a self-IPI. > + */ > + if (atomic_read(this_cpu_ptr(&aic_vipi_flag)) & irq_bit) > + aic_ic_write(ic, AIC_IPI_SEND, AIC_IPI_SEND_CPU(smp_processor_id())); > +} > + > +static void aic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) > +{ > + struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); > + u32 irq_bit = BIT(irqd_to_hwirq(d)); > + u32 send = 0; > + int cpu; > + unsigned long pending; > + > + for_each_cpu(cpu, mask) { > + /* > + * This sequence is the mirror of the one in aic_ipi_unmask(); > + * see the comment there. Additionally, release semantics > + * ensure that the vIPI flag set is ordered after any shared > + * memory accesses that precede it. This therefore also pairs > + * with the atomic_fetch_andnot in aic_handle_ipi(). > + */ > + pending = atomic_fetch_or_release(irq_bit, per_cpu_ptr(&aic_vipi_flag, cpu)); > + > + /* > + * The atomic_fetch_or_release() above must complete before the > + * atomic_read_acquire() below to avoid racing aic_ipi_unmask(). > + */ (same here) > + smp_mb__after_atomic(); > + > + if (!(pending & irq_bit) && > + (atomic_read(per_cpu_ptr(&aic_vipi_enable, cpu)) & irq_bit)) > + send |= AIC_IPI_SEND_CPU(cpu); > + } But with that: Acked-by: Will Deacon <will@kernel.org> Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-07 21:09 UTC|newest] Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-02 9:05 [PATCH v4 00/18] Apple M1 SoC platform bring-up Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 01/18] dt-bindings: vendor-prefixes: Add apple prefix Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 02/18] dt-bindings: arm: apple: Add bindings for Apple ARM platforms Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 03/18] dt-bindings: arm: cpus: Add apple,firestorm & icestorm compatibles Hector Martin 2021-04-02 9:05 ` [PATCH v4 03/18] dt-bindings: arm: cpus: Add apple, firestorm " Hector Martin 2021-04-02 9:05 ` [PATCH v4 04/18] arm64: cputype: Add CPU implementor & types for the Apple M1 cores Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 05/18] dt-bindings: timer: arm,arch_timer: Add interrupt-names support Hector Martin 2021-04-02 9:05 ` [PATCH v4 05/18] dt-bindings: timer: arm, arch_timer: " Hector Martin 2021-04-06 16:44 ` [PATCH v4 05/18] dt-bindings: timer: arm,arch_timer: " Rob Herring 2021-04-06 16:44 ` Rob Herring 2021-04-02 9:05 ` [PATCH v4 06/18] arm64: arch_timer: Implement support for interrupt-names Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 07/18] asm-generic/io.h: Add a non-posted variant of ioremap() Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 08/18] docs: driver-api: device-io: Document I/O access functions Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 09/18] docs: driver-api: device-io: Document ioremap() variants & access funcs Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 10/18] arm64: Implement ioremap_np() to map MMIO as nGnRnE Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 11/18] asm-generic/io.h: implement pci_remap_cfgspace using ioremap_np Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-07 13:27 ` Andy Shevchenko 2021-04-07 13:27 ` Andy Shevchenko 2021-04-07 21:03 ` Will Deacon 2021-04-07 21:03 ` Will Deacon 2021-04-08 11:01 ` Hector Martin 2021-04-08 11:01 ` Hector Martin 2021-04-08 11:24 ` Andy Shevchenko 2021-04-08 11:24 ` Andy Shevchenko 2021-04-02 9:05 ` [PATCH v4 12/18] of/address: Add infrastructure to declare MMIO as non-posted Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-06 16:47 ` Rob Herring 2021-04-06 16:47 ` Rob Herring 2021-04-06 16:59 ` Hector Martin 2021-04-06 16:59 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 13/18] arm64: Move ICH_ sysreg bits from arm-gic-v3.h to sysreg.h Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 14/18] dt-bindings: interrupt-controller: Add DT bindings for apple-aic Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 15/18] irqchip/apple-aic: Add support for the Apple Interrupt Controller Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-06 18:16 ` Marc Zyngier 2021-04-06 18:16 ` Marc Zyngier 2021-04-06 19:21 ` Hector Martin 2021-04-06 19:21 ` Hector Martin 2021-04-07 21:09 ` Will Deacon [this message] 2021-04-07 21:09 ` Will Deacon 2021-04-08 11:02 ` Hector Martin 2021-04-08 11:02 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 16/18] arm64: Kconfig: Introduce CONFIG_ARCH_APPLE Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 17/18] dt-bindings: display: Add apple,simple-framebuffer Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 9:05 ` [PATCH v4 18/18] arm64: apple: Add initial Apple Mac mini (M1, 2020) devicetree Hector Martin 2021-04-02 9:05 ` Hector Martin 2021-04-02 22:48 ` Konrad Dybcio 2021-04-06 16:56 ` Rob Herring 2021-04-06 16:56 ` Rob Herring
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210407210940.GC16198@willie-the-truck \ --to=will@kernel.org \ --cc=andy.shevchenko@gmail.com \ --cc=arnd@kernel.org \ --cc=catalin.marinas@arm.com \ --cc=corbet@lwn.net \ --cc=davem@davemloft.net \ --cc=devicetree@vger.kernel.org \ --cc=graf@amazon.com \ --cc=hch@infradead.org \ --cc=krzk@kernel.org \ --cc=linus.walleij@linaro.org \ --cc=linux-arch@vger.kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-doc@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=marcan@marcan.st \ --cc=mark.kettenis@xs4all.nl \ --cc=mark.rutland@arm.com \ --cc=maz@kernel.org \ --cc=mohamed.mediouni@caramail.com \ --cc=olof@lixom.net \ --cc=robh@kernel.org \ --cc=stan@corellium.com \ --cc=tony@atomide.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.