* [PATCH] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
@ 2021-05-28 0:31 Adam Ford
2021-06-01 6:54 ` Biju Das
0 siblings, 1 reply; 2+ messages in thread
From: Adam Ford @ 2021-05-28 0:31 UTC (permalink / raw)
To: u-boot; +Cc: biju.das.jz, Adam Ford
There is a QSPI NOR flash part on the board. Because this chip isn't
yet supported in Linux, but it is supported in U-Boot, and the
face that the RPC_SPI compatible names are different in U-Boot and
Linux, the device tree updates are confined to -u-boot.dtsi files.
Signed-off-by: Adam Ford <aford173@gmail.com>
diff --git a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
index a0c0a7f35c..06271537b7 100644
--- a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
@@ -4,11 +4,19 @@
*/
/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
};
+&avb {
+ phy-mode = "rgmii-txid";
+};
+
&cpg {
u-boot,dm-pre-reloc;
};
@@ -25,6 +33,25 @@
u-boot,dm-pre-reloc;
};
+&rpc {
+ compatible = "renesas,rcar-gen3-rpc";
+ num-cs = <1>;
+ spi-max-frequency = <40000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+};
+
&sdhi0 {
/delete-property/ cd-gpios;
};
diff --git a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
index a0c0a7f35c..be0ce54e55 100644
--- a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
@@ -4,6 +4,10 @@
*/
/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
@@ -25,6 +29,25 @@
u-boot,dm-pre-reloc;
};
+&rpc {
+ compatible = "renesas,rcar-gen3-rpc";
+ num-cs = <1>;
+ spi-max-frequency = <40000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+};
+
&sdhi0 {
/delete-property/ cd-gpios;
};
diff --git a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
index eef200af2d..228391e0df 100644
--- a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
+++ b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
@@ -4,6 +4,10 @@
*/
/ {
+ aliases {
+ spi0 = &rpc;
+ };
+
soc {
u-boot,dm-pre-reloc;
};
@@ -25,6 +29,25 @@
u-boot,dm-pre-reloc;
};
+&rpc {
+ compatible = "renesas,rcar-gen3-rpc";
+ num-cs = <1>;
+ spi-max-frequency = <40000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "spi-flash", "jedec,spi-nor";
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+};
+
&sdhi0 {
/delete-property/ cd-gpios;
sd-uhs-sdr12;
diff --git a/configs/r8a774a1_beacon_defconfig b/configs/r8a774a1_beacon_defconfig
index 58d3f9f019..ff29a40d15 100644
--- a/configs/r8a774a1_beacon_defconfig
+++ b/configs/r8a774a1_beacon_defconfig
@@ -17,7 +17,9 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -46,6 +48,10 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
@@ -55,6 +61,9 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a774b1_beacon_defconfig b/configs/r8a774b1_beacon_defconfig
index c0d2d1bf53..537343eea0 100644
--- a/configs/r8a774b1_beacon_defconfig
+++ b/configs/r8a774b1_beacon_defconfig
@@ -17,7 +17,9 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -47,6 +49,10 @@ CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
@@ -60,6 +66,9 @@ CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a774e1_beacon_defconfig b/configs/r8a774e1_beacon_defconfig
index 800c7b8c79..8b3b86007f 100644
--- a/configs/r8a774e1_beacon_defconfig
+++ b/configs/r8a774e1_beacon_defconfig
@@ -17,7 +17,9 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -46,6 +48,10 @@ CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
@@ -55,6 +61,9 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* RE: [PATCH] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
2021-05-28 0:31 [PATCH] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash Adam Ford
@ 2021-06-01 6:54 ` Biju Das
0 siblings, 0 replies; 2+ messages in thread
From: Biju Das @ 2021-06-01 6:54 UTC (permalink / raw)
To: Adam Ford, u-boot
Hi Adam,
Thanks for the patch.
> -----Original Message-----
> From: Adam Ford <aford173@gmail.com>
> Sent: 28 May 2021 01:31
> To: u-boot@lists.denx.de
> Cc: Biju Das <biju.das.jz@bp.renesas.com>; Adam Ford <aford173@gmail.com>
> Subject: [PATCH] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash
>
> There is a QSPI NOR flash part on the board. Because this chip isn't yet
> supported in Linux, but it is supported in U-Boot, and the face that the
> RPC_SPI compatible names are different in U-Boot and Linux, the device
> tree updates are confined to -u-boot.dtsi files.
>
If RPC is configured for secure access in TF-A, u-boot fails. This patch works only
if RPC configured for normal access(by compiling TF-A with RZG_RPC_HYPERFLASH_LOCKED=0).
May be you need to update this in the commit message.
> Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Biju Bas <biju.das.jz@bp.renesas.com>
>
> diff --git a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> index a0c0a7f35c..06271537b7 100644
> --- a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> +++ b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit-u-boot.dtsi
> @@ -4,11 +4,19 @@
> */
>
> / {
> + aliases {
> + spi0 = &rpc;
> + };
> +
> soc {
> u-boot,dm-pre-reloc;
> };
> };
>
> +&avb {
> + phy-mode = "rgmii-txid";
> +};
> +
> &cpg {
> u-boot,dm-pre-reloc;
> };
> @@ -25,6 +33,25 @@
> u-boot,dm-pre-reloc;
> };
>
> +&rpc {
> + compatible = "renesas,rcar-gen3-rpc";
> + num-cs = <1>;
> + spi-max-frequency = <40000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + compatible = "spi-flash", "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> +};
> +
> &sdhi0 {
> /delete-property/ cd-gpios;
> };
> diff --git a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> index a0c0a7f35c..be0ce54e55 100644
> --- a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> +++ b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit-u-boot.dtsi
> @@ -4,6 +4,10 @@
> */
>
> / {
> + aliases {
> + spi0 = &rpc;
> + };
> +
> soc {
> u-boot,dm-pre-reloc;
> };
> @@ -25,6 +29,25 @@
> u-boot,dm-pre-reloc;
> };
>
> +&rpc {
> + compatible = "renesas,rcar-gen3-rpc";
> + num-cs = <1>;
> + spi-max-frequency = <40000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + compatible = "spi-flash", "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> +};
> +
> &sdhi0 {
> /delete-property/ cd-gpios;
> };
> diff --git a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> index eef200af2d..228391e0df 100644
> --- a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> +++ b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi
> @@ -4,6 +4,10 @@
> */
>
> / {
> + aliases {
> + spi0 = &rpc;
> + };
> +
> soc {
> u-boot,dm-pre-reloc;
> };
> @@ -25,6 +29,25 @@
> u-boot,dm-pre-reloc;
> };
>
> +&rpc {
> + compatible = "renesas,rcar-gen3-rpc";
> + num-cs = <1>;
> + spi-max-frequency = <40000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0>;
> + compatible = "spi-flash", "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> +};
> +
> &sdhi0 {
> /delete-property/ cd-gpios;
> sd-uhs-sdr12;
> diff --git a/configs/r8a774a1_beacon_defconfig
> b/configs/r8a774a1_beacon_defconfig
> index 58d3f9f019..ff29a40d15 100644
> --- a/configs/r8a774a1_beacon_defconfig
> +++ b/configs/r8a774a1_beacon_defconfig
> @@ -17,7 +17,9 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> @@ -46,6 +48,10 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y
> CONFIG_MMC_HS200_SUPPORT=y CONFIG_RENESAS_SDHI=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> CONFIG_BITBANGMII=y
> CONFIG_PHY_REALTEK=y
> CONFIG_DM_ETH=y
> @@ -55,6 +61,9 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y
> CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_SCIF_CONSOLE=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_RENESAS_RPC_SPI=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> diff --git a/configs/r8a774b1_beacon_defconfig
> b/configs/r8a774b1_beacon_defconfig
> index c0d2d1bf53..537343eea0 100644
> --- a/configs/r8a774b1_beacon_defconfig
> +++ b/configs/r8a774b1_beacon_defconfig
> @@ -17,7 +17,9 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> @@ -47,6 +49,10 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y
> CONFIG_RENESAS_SDHI=y CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_MTD=y
> CONFIG_DM_SPI_FLASH=y
> CONFIG_BITBANGMII=y
> CONFIG_PHY_REALTEK=y
> @@ -60,6 +66,9 @@ CONFIG_SCIF_CONSOLE=y
> CONFIG_SPI=y
> CONFIG_DM_SPI=y
> CONFIG_RENESAS_RPC_SPI=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_RENESAS_RPC_SPI=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> diff --git a/configs/r8a774e1_beacon_defconfig
> b/configs/r8a774e1_beacon_defconfig
> index 800c7b8c79..8b3b86007f 100644
> --- a/configs/r8a774e1_beacon_defconfig
> +++ b/configs/r8a774e1_beacon_defconfig
> @@ -17,7 +17,9 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPIO=y
> CONFIG_CMD_I2C=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_MTD=y
> CONFIG_CMD_PART=y
> +CONFIG_CMD_SPI=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> @@ -46,6 +48,10 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y
> CONFIG_MMC_HS200_SUPPORT=y CONFIG_RENESAS_SDHI=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_DM_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> CONFIG_BITBANGMII=y
> CONFIG_PHY_REALTEK=y
> CONFIG_DM_ETH=y
> @@ -55,6 +61,9 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y
> CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_SCIF_CONSOLE=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_RENESAS_RPC_SPI=y
> CONFIG_USB=y
> CONFIG_DM_USB=y
> CONFIG_USB_XHCI_HCD=y
> --
> 2.25.1
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-06-01 6:55 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
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2021-05-28 0:31 [PATCH] ARM: rmobile: beacon-renesom: Enable QSPI NOR Flash Adam Ford
2021-06-01 6:54 ` Biju Das
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