All of lore.kernel.org
 help / color / mirror / Atom feed
From: Boris Brezillon <boris.brezillon@collabora.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: "DRI Development" <dri-devel@lists.freedesktop.org>,
	"Tomeu Vizoso" <tomeu.vizoso@collabora.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
	"Steven Price" <steven.price@arm.com>,
	linaro-mm-sig@lists.linaro.org,
	"Alyssa Rosenzweig" <alyssa.rosenzweig@collabora.com>,
	"Daniel Vetter" <daniel.vetter@intel.com>,
	linux-media@vger.kernel.org
Subject: Re: [PATCH 06/15] drm/panfrost: Fix implicit sync
Date: Wed, 23 Jun 2021 18:47:37 +0200	[thread overview]
Message-ID: <20210623184737.7e47f77c@collabora.com> (raw)
In-Reply-To: <20210622165511.3169559-7-daniel.vetter@ffwll.ch>

On Tue, 22 Jun 2021 18:55:02 +0200
Daniel Vetter <daniel.vetter@ffwll.ch> wrote:

> Currently this has no practial relevance I think because there's not
> many who can pull off a setup with panfrost and another gpu in the
> same system. But the rules are that if you're setting an exclusive
> fence, indicating a gpu write access in the implicit fencing system,
> then you need to wait for all fences, not just the previous exclusive
> fence.
> 
> panfrost against itself has no problem, because it always sets the
> exclusive fence (but that's probably something that will need to be
> fixed for vulkan and/or multi-engine gpus, or you'll suffer badly).
> Also no problem with that against display.
> 
> With the prep work done to switch over to the dependency helpers this
> is now a oneliner.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Cc: Steven Price <steven.price@arm.com>
> Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
> Cc: Sumit Semwal <sumit.semwal@linaro.org>

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>

> Cc: "Christian König" <christian.koenig@amd.com>
> Cc: linux-media@vger.kernel.org
> Cc: linaro-mm-sig@lists.linaro.org
> ---
>  drivers/gpu/drm/panfrost/panfrost_job.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
> index 71cd43fa1b36..ef004d587dc4 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_job.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_job.c
> @@ -203,9 +203,8 @@ static int panfrost_acquire_object_fences(struct drm_gem_object **bos,
>  	int i, ret;
>  
>  	for (i = 0; i < bo_count; i++) {
> -		struct dma_fence *fence = dma_resv_get_excl_unlocked(bos[i]->resv);
> -
> -		ret = drm_gem_fence_array_add(deps, fence);
> +		/* panfrost always uses write mode in its current uapi */
> +		ret = drm_gem_fence_array_add_implicit(deps, bos[i], true);
>  		if (ret)
>  			return ret;
>  	}


WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@collabora.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: "Tomeu Vizoso" <tomeu.vizoso@collabora.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
	"DRI Development" <dri-devel@lists.freedesktop.org>,
	"Steven Price" <steven.price@arm.com>,
	linaro-mm-sig@lists.linaro.org,
	"Alyssa Rosenzweig" <alyssa.rosenzweig@collabora.com>,
	"Daniel Vetter" <daniel.vetter@intel.com>,
	"Christian König" <christian.koenig@amd.com>,
	linux-media@vger.kernel.org
Subject: Re: [PATCH 06/15] drm/panfrost: Fix implicit sync
Date: Wed, 23 Jun 2021 18:47:37 +0200	[thread overview]
Message-ID: <20210623184737.7e47f77c@collabora.com> (raw)
In-Reply-To: <20210622165511.3169559-7-daniel.vetter@ffwll.ch>

On Tue, 22 Jun 2021 18:55:02 +0200
Daniel Vetter <daniel.vetter@ffwll.ch> wrote:

> Currently this has no practial relevance I think because there's not
> many who can pull off a setup with panfrost and another gpu in the
> same system. But the rules are that if you're setting an exclusive
> fence, indicating a gpu write access in the implicit fencing system,
> then you need to wait for all fences, not just the previous exclusive
> fence.
> 
> panfrost against itself has no problem, because it always sets the
> exclusive fence (but that's probably something that will need to be
> fixed for vulkan and/or multi-engine gpus, or you'll suffer badly).
> Also no problem with that against display.
> 
> With the prep work done to switch over to the dependency helpers this
> is now a oneliner.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Cc: Steven Price <steven.price@arm.com>
> Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
> Cc: Sumit Semwal <sumit.semwal@linaro.org>

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>

> Cc: "Christian König" <christian.koenig@amd.com>
> Cc: linux-media@vger.kernel.org
> Cc: linaro-mm-sig@lists.linaro.org
> ---
>  drivers/gpu/drm/panfrost/panfrost_job.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
> index 71cd43fa1b36..ef004d587dc4 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_job.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_job.c
> @@ -203,9 +203,8 @@ static int panfrost_acquire_object_fences(struct drm_gem_object **bos,
>  	int i, ret;
>  
>  	for (i = 0; i < bo_count; i++) {
> -		struct dma_fence *fence = dma_resv_get_excl_unlocked(bos[i]->resv);
> -
> -		ret = drm_gem_fence_array_add(deps, fence);
> +		/* panfrost always uses write mode in its current uapi */
> +		ret = drm_gem_fence_array_add_implicit(deps, bos[i], true);
>  		if (ret)
>  			return ret;
>  	}


WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@collabora.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: "Tomeu Vizoso" <tomeu.vizoso@collabora.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>,
	"DRI Development" <dri-devel@lists.freedesktop.org>,
	"Steven Price" <steven.price@arm.com>,
	linaro-mm-sig@lists.linaro.org,
	"Alyssa Rosenzweig" <alyssa.rosenzweig@collabora.com>,
	"Daniel Vetter" <daniel.vetter@intel.com>,
	"Christian König" <christian.koenig@amd.com>,
	linux-media@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH 06/15] drm/panfrost: Fix implicit sync
Date: Wed, 23 Jun 2021 18:47:37 +0200	[thread overview]
Message-ID: <20210623184737.7e47f77c@collabora.com> (raw)
In-Reply-To: <20210622165511.3169559-7-daniel.vetter@ffwll.ch>

On Tue, 22 Jun 2021 18:55:02 +0200
Daniel Vetter <daniel.vetter@ffwll.ch> wrote:

> Currently this has no practial relevance I think because there's not
> many who can pull off a setup with panfrost and another gpu in the
> same system. But the rules are that if you're setting an exclusive
> fence, indicating a gpu write access in the implicit fencing system,
> then you need to wait for all fences, not just the previous exclusive
> fence.
> 
> panfrost against itself has no problem, because it always sets the
> exclusive fence (but that's probably something that will need to be
> fixed for vulkan and/or multi-engine gpus, or you'll suffer badly).
> Also no problem with that against display.
> 
> With the prep work done to switch over to the dependency helpers this
> is now a oneliner.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> Cc: Steven Price <steven.price@arm.com>
> Cc: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
> Cc: Sumit Semwal <sumit.semwal@linaro.org>

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>

> Cc: "Christian König" <christian.koenig@amd.com>
> Cc: linux-media@vger.kernel.org
> Cc: linaro-mm-sig@lists.linaro.org
> ---
>  drivers/gpu/drm/panfrost/panfrost_job.c | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
> index 71cd43fa1b36..ef004d587dc4 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_job.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_job.c
> @@ -203,9 +203,8 @@ static int panfrost_acquire_object_fences(struct drm_gem_object **bos,
>  	int i, ret;
>  
>  	for (i = 0; i < bo_count; i++) {
> -		struct dma_fence *fence = dma_resv_get_excl_unlocked(bos[i]->resv);
> -
> -		ret = drm_gem_fence_array_add(deps, fence);
> +		/* panfrost always uses write mode in its current uapi */
> +		ret = drm_gem_fence_array_add_implicit(deps, bos[i], true);
>  		if (ret)
>  			return ret;
>  	}

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-06-23 16:47 UTC|newest]

Thread overview: 175+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-22 16:54 [PATCH 00/15] implicit fencing/dma-resv rules for shared buffers Daniel Vetter
2021-06-22 16:54 ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:54 ` [PATCH 01/15] dma-resv: Fix kerneldoc Daniel Vetter
2021-06-22 16:54   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:54   ` Daniel Vetter
2021-06-22 18:19   ` Alex Deucher
2021-06-22 18:19     ` [Intel-gfx] " Alex Deucher
2021-06-22 18:19     ` Alex Deucher
2021-06-22 18:49   ` Sam Ravnborg
2021-06-22 18:49     ` [Intel-gfx] " Sam Ravnborg
2021-06-22 19:19     ` Daniel Vetter
2021-06-22 19:19       ` [Intel-gfx] " Daniel Vetter
2021-06-22 19:19       ` Daniel Vetter
2021-06-23  8:31   ` Christian König
2021-06-23  8:31     ` [Intel-gfx] " Christian König
2021-06-23  8:31     ` Christian König
2021-06-23 15:15     ` Daniel Vetter
2021-06-23 15:15       ` [Intel-gfx] " Daniel Vetter
2021-06-23 15:15       ` Daniel Vetter
2021-06-22 16:54 ` [PATCH 02/15] dma-buf: Switch to inline kerneldoc Daniel Vetter
2021-06-22 16:54   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:54   ` Daniel Vetter
2021-06-22 18:24   ` Alex Deucher
2021-06-22 18:24     ` [Intel-gfx] " Alex Deucher
2021-06-22 18:24     ` Alex Deucher
2021-06-22 19:01   ` Sam Ravnborg
2021-06-22 19:01     ` [Intel-gfx] " Sam Ravnborg
2021-06-22 19:21     ` Daniel Vetter
2021-06-22 19:21       ` [Intel-gfx] " Daniel Vetter
2021-06-22 19:21       ` Daniel Vetter
2021-06-23  8:32   ` Christian König
2021-06-23  8:32     ` [Intel-gfx] " Christian König
2021-06-23  8:32     ` Christian König
2021-06-23 16:17   ` [PATCH] " Daniel Vetter
2021-06-23 16:17     ` [Intel-gfx] " Daniel Vetter
2021-06-23 16:17     ` Daniel Vetter
2021-06-23 17:33     ` Sam Ravnborg
2021-06-23 17:33       ` [Intel-gfx] " Sam Ravnborg
2021-06-22 16:54 ` [PATCH 03/15] dma-buf: Document dma-buf implicit fencing/resv fencing rules Daniel Vetter
2021-06-22 16:54   ` [Intel-gfx] " Daniel Vetter
2021-06-23  8:41   ` Christian König
2021-06-23  8:41     ` [Intel-gfx] " Christian König
2021-06-23 16:19   ` [PATCH] " Daniel Vetter
2021-06-23 16:19     ` [Intel-gfx] " Daniel Vetter
2021-06-24  6:59     ` Dave Airlie
2021-06-24  6:59       ` [Intel-gfx] " Dave Airlie
2021-06-24 11:08     ` [Mesa-dev] " Daniel Stone
2021-06-24 11:08       ` [Intel-gfx] " Daniel Stone
2021-06-24 11:23       ` Daniel Vetter
2021-06-24 11:23         ` [Intel-gfx] " Daniel Vetter
2021-06-24 12:48     ` Daniel Vetter
2021-06-24 12:52     ` Daniel Vetter
2021-06-22 16:55 ` [PATCH 04/15] drm/panfrost: Shrink sched_lock Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-23 16:52   ` Boris Brezillon
2021-06-23 16:52     ` [Intel-gfx] " Boris Brezillon
2021-06-22 16:55 ` [PATCH 05/15] drm/panfrost: Use xarray and helpers for depedency tracking Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-23 16:51   ` Boris Brezillon
2021-06-23 16:51     ` [Intel-gfx] " Boris Brezillon
2021-06-23 16:51     ` Boris Brezillon
2021-06-22 16:55 ` [PATCH 06/15] drm/panfrost: Fix implicit sync Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-23 16:47   ` Boris Brezillon [this message]
2021-06-23 16:47     ` [Intel-gfx] " Boris Brezillon
2021-06-23 16:47     ` Boris Brezillon
2021-06-23 19:17     ` Daniel Vetter
2021-06-23 19:17       ` [Intel-gfx] " Daniel Vetter
2021-06-23 19:17       ` Daniel Vetter
2021-06-22 16:55 ` [PATCH 07/15] drm/atomic-helper: make drm_gem_plane_helper_prepare_fb the default Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 19:10   ` Sam Ravnborg
2021-06-22 19:10     ` [Intel-gfx] " Sam Ravnborg
2021-06-22 20:20     ` Daniel Vetter
2021-06-22 20:20       ` [Intel-gfx] " Daniel Vetter
2021-06-23 15:39       ` Sam Ravnborg
2021-06-23 15:39         ` [Intel-gfx] " Sam Ravnborg
2021-06-23 16:22   ` [PATCH] " Daniel Vetter
2021-06-23 16:22     ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55 ` [PATCH 08/15] drm/<driver>: drm_gem_plane_helper_prepare_fb is now " Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-24  8:32   ` Philipp Zabel
2021-06-24  8:32     ` Philipp Zabel
2021-06-24  8:32     ` [Intel-gfx] " Philipp Zabel
2021-06-24  8:32     ` Philipp Zabel
2021-06-24  8:32     ` Philipp Zabel
2021-06-24  8:32     ` Philipp Zabel
2021-06-24  8:32     ` Philipp Zabel
2021-06-24  8:32     ` Philipp Zabel
2021-06-22 16:55 ` [PATCH 09/15] drm/armada: Remove prepare/cleanup_fb hooks Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-24 12:46   ` Maxime Ripard
2021-06-24 12:46     ` [Intel-gfx] " Maxime Ripard
2021-06-22 16:55 ` [PATCH 10/15] drm/vram-helpers: Create DRM_GEM_VRAM_PLANE_HELPER_FUNCS Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-24  7:38   ` Thomas Zimmermann
2021-06-24  7:38     ` [Intel-gfx] " Thomas Zimmermann
2021-06-24  7:46   ` Thomas Zimmermann
2021-06-24  7:46     ` [Intel-gfx] " Thomas Zimmermann
2021-06-24 13:39     ` Daniel Vetter
2021-06-24 13:39       ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55 ` [PATCH 11/15] drm/omap: Follow implicit fencing in prepare_fb Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55 ` [PATCH 12/15] drm/simple-helper: drm_gem_simple_display_pipe_prepare_fb as default Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 19:15   ` Sam Ravnborg
2021-06-22 19:15     ` [Intel-gfx] " Sam Ravnborg
2021-06-23 16:24   ` [PATCH] " Daniel Vetter
2021-06-23 16:24     ` [Intel-gfx] " Daniel Vetter
2021-06-23 17:34     ` Sam Ravnborg
2021-06-23 17:34       ` [Intel-gfx] " Sam Ravnborg
2021-06-22 16:55 ` [PATCH 13/15] drm/tiny: drm_gem_simple_display_pipe_prepare_fb is the default Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 16:55   ` Daniel Vetter
2021-06-22 16:55 ` [PATCH 14/15] drm/gem: Tiny kernel clarification for drm_gem_fence_array_add Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-23  8:42   ` Christian König
2021-06-23  8:42     ` [Intel-gfx] " Christian König
2021-06-24 12:41     ` Daniel Vetter
2021-06-24 12:41       ` [Intel-gfx] " Daniel Vetter
2021-06-24 12:48       ` Christian König
2021-06-24 12:48         ` [Intel-gfx] " Christian König
2021-06-24 13:32         ` Daniel Vetter
2021-06-24 13:32           ` [Intel-gfx] " Daniel Vetter
2021-06-24 13:35           ` Christian König
2021-06-24 13:35             ` [Intel-gfx] " Christian König
2021-06-24 13:41             ` Daniel Vetter
2021-06-24 13:41               ` [Intel-gfx] " Daniel Vetter
2021-06-24 13:45               ` Christian König
2021-06-24 13:45                 ` [Intel-gfx] " Christian König
2021-06-22 16:55 ` [PATCH 15/15] RFC: drm/amdgpu: Implement a proper implicit fencing uapi Daniel Vetter
2021-06-22 16:55   ` [Intel-gfx] " Daniel Vetter
2021-06-22 23:56   ` kernel test robot
2021-06-23  9:45   ` Bas Nieuwenhuizen
2021-06-23  9:45     ` [Intel-gfx] " Bas Nieuwenhuizen
2021-06-23 12:18     ` Daniel Vetter
2021-06-23 12:18       ` [Intel-gfx] " Daniel Vetter
2021-06-23 12:59       ` Christian König
2021-06-23 12:59         ` [Intel-gfx] " Christian König
2021-06-23 13:38         ` Bas Nieuwenhuizen
2021-06-23 13:38           ` [Intel-gfx] " Bas Nieuwenhuizen
2021-06-23 13:44           ` Christian König
2021-06-23 13:44             ` [Intel-gfx] " Christian König
2021-06-23 13:49             ` Daniel Vetter
2021-06-23 13:49               ` [Intel-gfx] " Daniel Vetter
2021-06-23 14:02               ` Christian König
2021-06-23 14:02                 ` [Intel-gfx] " Christian König
2021-06-23 14:50                 ` Daniel Vetter
2021-06-23 14:50                   ` [Intel-gfx] " Daniel Vetter
2021-06-23 14:58                   ` Bas Nieuwenhuizen
2021-06-23 14:58                     ` [Intel-gfx] " Bas Nieuwenhuizen
2021-06-23 15:03                     ` Daniel Vetter
2021-06-23 15:03                       ` [Intel-gfx] " Daniel Vetter
2021-06-23 15:07                       ` Christian König
2021-06-23 15:07                         ` [Intel-gfx] " Christian König
2021-06-23 15:12                         ` Daniel Vetter
2021-06-23 15:12                           ` [Intel-gfx] " Daniel Vetter
2021-06-23 15:15                           ` Christian König
2021-06-23 15:15                             ` [Intel-gfx] " Christian König
2021-06-22 17:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for implicit fencing/dma-resv rules for shared buffers Patchwork
2021-06-22 17:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-22 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-22 19:12 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-06-23 17:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for implicit fencing/dma-resv rules for shared buffers (rev5) Patchwork
2021-06-23 17:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-23 17:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-23 21:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210623184737.7e47f77c@collabora.com \
    --to=boris.brezillon@collabora.com \
    --cc=alyssa.rosenzweig@collabora.com \
    --cc=christian.koenig@amd.com \
    --cc=daniel.vetter@ffwll.ch \
    --cc=daniel.vetter@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=linaro-mm-sig@lists.linaro.org \
    --cc=linux-media@vger.kernel.org \
    --cc=steven.price@arm.com \
    --cc=tomeu.vizoso@collabora.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.