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* [chrome-os:chromeos-5.10 74/94] drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c:328:15: warning: variable 'cal_sel' set but not used
@ 2021-07-23  8:56 kernel test robot
  0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2021-07-23  8:56 UTC (permalink / raw)
  To: kbuild-all

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tree:   https://chromium.googlesource.com/chromiumos/third_party/kernel chromeos-5.10
head:   c5919bb0351727649285c4b951b6037bebf78124
commit: 9b58d081211d782593f5f6864cf6be8176e205a1 [74/94] BACKPORT: FROMLIST: media: platform: mtk-isp: Add Mediatek sensor interface driver
config: alpha-randconfig-r005-20210723 (attached as .config)
compiler: alpha-linux-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git remote add chrome-os https://chromium.googlesource.com/chromiumos/third_party/kernel
        git fetch --no-tags chrome-os chromeos-5.10
        git checkout 9b58d081211d782593f5f6864cf6be8176e205a1
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross ARCH=alpha 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c: In function 'mtk_seninf_set_csi_mipi':
>> drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c:328:15: warning: variable 'cal_sel' set but not used [-Wunused-but-set-variable]
     328 |  unsigned int cal_sel;
         |               ^~~~~~~
   At top level:
   drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c:955:12: warning: 'seninf_pm_resume' defined but not used [-Wunused-function]
     955 | static int seninf_pm_resume(struct device *dev)
         |            ^~~~~~~~~~~~~~~~
   drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c:945:12: warning: 'seninf_pm_suspend' defined but not used [-Wunused-function]
     945 | static int seninf_pm_suspend(struct device *dev)
         |            ^~~~~~~~~~~~~~~~~


vim +/cal_sel +328 drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c

   320	
   321	static void mtk_seninf_set_csi_mipi(struct mtk_seninf *priv,
   322					    unsigned int seninf)
   323	{
   324		void __iomem *seninf_base = priv->base_reg;
   325		void __iomem *pseninf = priv->base_reg + 0x1000 * seninf;
   326		unsigned int dpcm = mtk_seninf_get_dpcm(priv);
   327		unsigned int data_lane_num = priv->sensor[priv->port].num_data_lanes;
 > 328		unsigned int cal_sel;
   329		unsigned int data_header_order = 1;
   330		unsigned int pad_sel = PAD_10BIT;
   331		unsigned int val = 0;
   332	
   333		dev_dbg(priv->dev, "IS_4D1C %d port %d\n",
   334			is_4d1c(priv->port), priv->port);
   335	
   336		switch (priv->port) {
   337		case CFG_CSI_PORT_1:
   338			cal_sel = 1;
   339			writel((0x7ffff8fe & readl(seninf_base +
   340				SENINF_TOP_PHY_SENINF_CTL_CSI1)) | 0x80000200,
   341			       seninf_base + SENINF_TOP_PHY_SENINF_CTL_CSI1);
   342			break;
   343		case CFG_CSI_PORT_2:
   344			cal_sel = 2;
   345			writel((0x7ffff8fe & readl(seninf_base +
   346				SENINF_TOP_PHY_SENINF_CTL_CSI2)) | 0x80000200,
   347			       seninf_base + SENINF_TOP_PHY_SENINF_CTL_CSI2);
   348			break;
   349		case CFG_CSI_PORT_0:
   350			cal_sel = 0;
   351			writel((0x7ffff8fe & readl(seninf_base +
   352				SENINF_TOP_PHY_SENINF_CTL_CSI0)) | 0x80000200,
   353			       seninf_base + SENINF_TOP_PHY_SENINF_CTL_CSI0);
   354			break;
   355		case CFG_CSI_PORT_0A:
   356		case CFG_CSI_PORT_0B:
   357			cal_sel = 0;
   358			writel((0x7fffc8fe & readl(seninf_base +
   359				SENINF_TOP_PHY_SENINF_CTL_CSI0)) | 0x80001100,
   360			       seninf_base + SENINF_TOP_PHY_SENINF_CTL_CSI0);
   361			break;
   362		}
   363	
   364		/* First Enable Sensor interface and select pad (0x1a04_0200) */
   365		writel(readl(pseninf + SENINF1_CTRL) | 0x1,
   366		       pseninf + SENINF1_CTRL);
   367		writel((0x8fffffff & readl(pseninf + SENINF1_CTRL)) |
   368			(pad_sel << 28), pseninf + SENINF1_CTRL);
   369		writel(0xffff0fff & readl(pseninf + SENINF1_CTRL),
   370		       pseninf + SENINF1_CTRL);
   371		writel((0xffffff9f & readl(pseninf + SENINF1_CTRL_EXT)) |
   372			0x40, pseninf + SENINF1_CTRL_EXT);
   373	
   374		mtk_seninf_set_dphy(priv, seninf);
   375	
   376		/* DPCM Enable */
   377		val = 1 << ((dpcm == 0x2a) ? 15 : ((dpcm & 0xF) + 7));
   378		writel(val, pseninf + SENINF1_CSI2_DPCM);
   379	
   380		/* Settle delay */
   381		writel((0xffff00ff & readl(pseninf + SENINF1_CSI2_LNRD_TIMING)) |
   382			(SENINF_SETTLE_DELAY << 8), pseninf + SENINF1_CSI2_LNRD_TIMING);
   383		/* CSI2 control */
   384		val = readl(pseninf + SENINF1_CSI2_CTL) | (data_header_order << 16) |
   385			0x10 | ((1 << data_lane_num) - 1);
   386		writel(val, pseninf + SENINF1_CSI2_CTL);
   387		writel((0xfffff3f8 & readl(pseninf + SENINF1_CSI2_RESYNC_MERGE_CTL)) |
   388			0x3, pseninf + SENINF1_CSI2_RESYNC_MERGE_CTL);
   389		writel(0xfffff800 & readl(pseninf + SENINF1_CSI2_MODE),
   390		       pseninf + SENINF1_CSI2_MODE);
   391		writel(0x1dff00, pseninf + SENINF1_CSI2_DPHY_SYNC);
   392		writel(0xfffffffe & readl(pseninf + SENINF1_CSI2_SPARE0),
   393		       pseninf + SENINF1_CSI2_SPARE0);
   394		writel((0xf5ffff7f & readl(pseninf + SENINF1_CSI2_CTL)) |
   395		       0x2000000, pseninf + SENINF1_CSI2_CTL);
   396		writel((0xffffff00 & readl(pseninf + SENINF1_CSI2_HS_TRAIL)) |
   397		       SENINF_HS_TRAIL_PARAMETER, pseninf + SENINF1_CSI2_HS_TRAIL);
   398	
   399		/* Set debug port to output packet number */
   400		writel(0x8000001A, pseninf + SENINF1_CSI2_DGB_SEL);
   401		/* Enable CSI2 IRQ mask */
   402		/* Turn on all interrupt */
   403		writel(0xffffffff, pseninf + SENINF1_CSI2_INT_EN);
   404		/* Write clear CSI2 IRQ */
   405		writel(0xffffffff, pseninf + SENINF1_CSI2_INT_STATUS);
   406		/* Enable CSI2 Extend IRQ mask */
   407		/* Turn on all interrupt */
   408		writel(0x0000001f, pseninf + SENINF1_CSI2_INT_EN_EXT);
   409		writel((0xffffff7f & readl(pseninf + SENINF1_CTRL)) |
   410			0x80, pseninf + SENINF1_CTRL);
   411	
   412		udelay(1);
   413		writel(0xffffff7f & readl(pseninf + SENINF1_CTRL)
   414			, pseninf + SENINF1_CTRL);
   415	}
   416	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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2021-07-23  8:56 [chrome-os:chromeos-5.10 74/94] drivers/media/platform/mtk-isp/isp_50/seninf/mtk_seninf.c:328:15: warning: variable 'cal_sel' set but not used kernel test robot

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