[PATCH v2 0/4] RK3568 GPU

[PATCH v2 0/4] RK3568 GPU

[Ezequiel Garcia]

I've decided to split the GPU off previous series:

https://lore.kernel.org/linux-rockchip/2147216.TLkxdtWsSY@diego/

This series now contains only the GPU support, as the VPU
needs a tiny rework.

This is compiled tested only, in this case. Similar patches
have been tested on a v5.10-based kernel, so I'd say it's good
to go.

The mesa side is merged https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771
and can be tested without a display, using something like weston --backend=headless-backend.so,
which provides an environment for GL to work.

Ezequiel Garcia (4):
  dt-bindings: gpu: mali-bifrost: Allow up to two clocks
  dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
  arm64: dts: rockchip: Add GPU node for rk3568
  arm64: dts: rockchip: Enable the GPU on Quartz64 Model A

 .../bindings/gpu/arm,mali-bifrost.yaml        |  8 +++-
 .../boot/dts/rockchip/rk3566-quartz64-a.dts   |  5 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      | 47 +++++++++++++++++++
 3 files changed, 59 insertions(+), 1 deletion(-)

-- 
2.32.0

[PATCH v2 0/4] RK3568 GPU

[Ezequiel Garcia]

I've decided to split the GPU off previous series:

https://lore.kernel.org/linux-rockchip/2147216.TLkxdtWsSY@diego/

This series now contains only the GPU support, as the VPU
needs a tiny rework.

This is compiled tested only, in this case. Similar patches
have been tested on a v5.10-based kernel, so I'd say it's good
to go.

The mesa side is merged https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771
and can be tested without a display, using something like weston --backend=headless-backend.so,
which provides an environment for GL to work.

Ezequiel Garcia (4):
  dt-bindings: gpu: mali-bifrost: Allow up to two clocks
  dt-bindings: gpu: mali-bifrost: Add RK3568 compatible
  arm64: dts: rockchip: Add GPU node for rk3568
  arm64: dts: rockchip: Enable the GPU on Quartz64 Model A

 .../bindings/gpu/arm,mali-bifrost.yaml        |  8 +++-
 .../boot/dts/rockchip/rk3566-quartz64-a.dts   |  5 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      | 47 +++++++++++++++++++
 3 files changed, 59 insertions(+), 1 deletion(-)

-- 
2.32.0


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[PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Ezequiel Garcia]

Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 .../devicetree/bindings/gpu/arm,mali-bifrost.yaml          | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 0f73f436bea7..01532140096e 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -38,7 +38,12 @@ properties:
       - const: gpu
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
 
   mali-supply: true
 
-- 
2.32.0

[PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Ezequiel Garcia]

Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 .../devicetree/bindings/gpu/arm,mali-bifrost.yaml          | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 0f73f436bea7..01532140096e 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -38,7 +38,12 @@ properties:
       - const: gpu
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    maxItems: 2
 
   mali-supply: true
 
-- 
2.32.0


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[PATCH 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible

[Ezequiel Garcia]

The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU,
add a compatible string for it.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 01532140096e..6afe7030b859 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -20,6 +20,7 @@ properties:
           - mediatek,mt8183-mali
           - realtek,rtd1619-mali
           - rockchip,px30-mali
+          - rockchip,rk3568-mali
       - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
 
   reg:
-- 
2.32.0

[PATCH 2/4] dt-bindings: gpu: mali-bifrost: Add RK3568 compatible

[Ezequiel Garcia]

The Rockchip RK3568 SoC has a Bifrost Mali-G52 GPU,
add a compatible string for it.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 01532140096e..6afe7030b859 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -20,6 +20,7 @@ properties:
           - mediatek,mt8183-mali
           - realtek,rtd1619-mali
           - rockchip,px30-mali
+          - rockchip,rk3568-mali
       - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
 
   reg:
-- 
2.32.0


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[PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568

[Ezequiel Garcia]

Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.

Quoting the datasheet:

Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index bef747fb1fe2..f4f400792659 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -121,6 +121,35 @@ opp-1800000000 {
 		};
 	};
 
+	gpu_opp_table: opp-table2 {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-700000000 {
+			opp-hz = /bits/ 64 <700000000>;
+			opp-microvolt = <900000>;
+		};
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
 	firmware {
 		scmi: scmi {
 			compatible = "arm,scmi-smc";
@@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC {
 		};
 	};
 
+	gpu: gpu@fde60000 {
+		compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+		reg = <0x0 0xfde60000 0x0 0x4000>;
+
+		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "job", "mmu", "gpu";
+
+		clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+		clock-names = "core", "bus";
+		operating-points-v2 = <&gpu_opp_table>;
+
+		#cooling-cells = <2>;
+		power-domains = <&power RK3568_PD_GPU>;
+		status = "disabled";
+	};
+
 	sdmmc2: mmc@fe000000 {
 		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe000000 0x0 0x4000>;
-- 
2.32.0

[PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568

[Ezequiel Garcia]

Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
which is based on the Bifrost architecture. It has
one shader core and two execution engines.

Quoting the datasheet:

Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index bef747fb1fe2..f4f400792659 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -121,6 +121,35 @@ opp-1800000000 {
 		};
 	};
 
+	gpu_opp_table: opp-table2 {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-700000000 {
+			opp-hz = /bits/ 64 <700000000>;
+			opp-microvolt = <900000>;
+		};
+		opp-800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1000000>;
+		};
+	};
+
 	firmware {
 		scmi: scmi {
 			compatible = "arm,scmi-smc";
@@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC {
 		};
 	};
 
+	gpu: gpu@fde60000 {
+		compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+		reg = <0x0 0xfde60000 0x0 0x4000>;
+
+		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "job", "mmu", "gpu";
+
+		clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+		clock-names = "core", "bus";
+		operating-points-v2 = <&gpu_opp_table>;
+
+		#cooling-cells = <2>;
+		power-domains = <&power RK3568_PD_GPU>;
+		status = "disabled";
+	};
+
 	sdmmc2: mmc@fe000000 {
 		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe000000 0x0 0x4000>;
-- 
2.32.0


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[PATCH 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A

[Ezequiel Garcia]

Enable the GPU core on the Pine64 Quartz64 Model A.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index b239f314b38a..1e6153b52594 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -462,3 +462,8 @@ bluetooth {
 &uart2 {
 	status = "okay";
 };
+
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
-- 
2.32.0

[PATCH 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A

[Ezequiel Garcia]

Enable the GPU core on the Pine64 Quartz64 Model A.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index b239f314b38a..1e6153b52594 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -462,3 +462,8 @@ bluetooth {
 &uart2 {
 	status = "okay";
 };
+
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
-- 
2.32.0


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Re: [PATCH 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A

[Johan Jonker]

Hi Ezequiel,

On 7/30/21 6:45 PM, Ezequiel Garcia wrote:
> Enable the GPU core on the Pine64 Quartz64 Model A.
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> index b239f314b38a..1e6153b52594 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -462,3 +462,8 @@ bluetooth {
>  &uart2 {
>  	status = "okay";
>  };
> +

> +&gpu {

Nodes without "reg" are sort in alphabetical order.

> +	mali-supply = <&vdd_gpu>;
> +	status = "okay";
> +};
> 

Re: [PATCH 4/4] arm64: dts: rockchip: Enable the GPU on Quartz64 Model A

[Johan Jonker]

Hi Ezequiel,

On 7/30/21 6:45 PM, Ezequiel Garcia wrote:
> Enable the GPU core on the Pine64 Quartz64 Model A.
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> index b239f314b38a..1e6153b52594 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -462,3 +462,8 @@ bluetooth {
>  &uart2 {
>  	status = "okay";
>  };
> +

> +&gpu {

Nodes without "reg" are sort in alphabetical order.

> +	mali-supply = <&vdd_gpu>;
> +	status = "okay";
> +};
> 

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Re: [PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568

[Johan Jonker]

Hi Ezequiel,

Some comments. Have a look if it's useful.

On 7/30/21 6:45 PM, Ezequiel Garcia wrote:
> Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
> which is based on the Bifrost architecture. It has
> one shader core and two execution engines.
> 
> Quoting the datasheet:
> 
> Mali-G52 1-Core-2EE
> * Support 1600Mpix/s fill rate when 800MHz clock frequency
> * Support 38.4GLOPs when 800MHz clock frequency
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index bef747fb1fe2..f4f400792659 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -121,6 +121,35 @@ opp-1800000000 {
>  		};
>  	};
>  

> +	gpu_opp_table: opp-table2 {

	gpu_opp_table: gpu-opp-table {

> +		compatible = "operating-points-v2";
> +
> +		opp-200000000 {
> +			opp-hz = /bits/ 64 <200000000>;
> +			opp-microvolt = <825000>;
> +		};

Similar to cpu0_opp_table keep the same style and add an empty line
between nodes.

> +		opp-300000000 {
> +			opp-hz = /bits/ 64 <300000000>;
> +			opp-microvolt = <825000>;
> +		};
> +		opp-400000000 {
> +			opp-hz = /bits/ 64 <400000000>;
> +			opp-microvolt = <825000>;
> +		};
> +		opp-600000000 {
> +			opp-hz = /bits/ 64 <600000000>;
> +			opp-microvolt = <825000>;
> +		};
> +		opp-700000000 {
> +			opp-hz = /bits/ 64 <700000000>;
> +			opp-microvolt = <900000>;
> +		};
> +		opp-800000000 {
> +			opp-hz = /bits/ 64 <800000000>;
> +			opp-microvolt = <1000000>;
> +		};
> +	};
> +
>  	firmware {
>  		scmi: scmi {
>  			compatible = "arm,scmi-smc";
> @@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC {
>  		};
>  	};
>  
> +	gpu: gpu@fde60000 {
> +		compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
> +		reg = <0x0 0xfde60000 0x0 0x4000>;

> +

remove empty lines

> +		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "job", "mmu", "gpu";

> +

dito

> +		clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
> +		clock-names = "core", "bus";

Not sure if it's possible, but could you keep them all a little bit in
the same order/style as arm,mali-400?

From arm,mali-utgard.yaml:

  clock-names:
    items:
      - const: bus
      - const: core


> +		operating-points-v2 = <&gpu_opp_table>;

> +

dito

> +		#cooling-cells = <2>;
> +		power-domains = <&power RK3568_PD_GPU>;
> +		status = "disabled";
> +	};
> +
>  	sdmmc2: mmc@fe000000 {
>  		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x0 0xfe000000 0x0 0x4000>;
> 

Re: [PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568

[Johan Jonker]

Hi Ezequiel,

Some comments. Have a look if it's useful.

On 7/30/21 6:45 PM, Ezequiel Garcia wrote:
> Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
> which is based on the Bifrost architecture. It has
> one shader core and two execution engines.
> 
> Quoting the datasheet:
> 
> Mali-G52 1-Core-2EE
> * Support 1600Mpix/s fill rate when 800MHz clock frequency
> * Support 38.4GLOPs when 800MHz clock frequency
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> index bef747fb1fe2..f4f400792659 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -121,6 +121,35 @@ opp-1800000000 {
>  		};
>  	};
>  

> +	gpu_opp_table: opp-table2 {

	gpu_opp_table: gpu-opp-table {

> +		compatible = "operating-points-v2";
> +
> +		opp-200000000 {
> +			opp-hz = /bits/ 64 <200000000>;
> +			opp-microvolt = <825000>;
> +		};

Similar to cpu0_opp_table keep the same style and add an empty line
between nodes.

> +		opp-300000000 {
> +			opp-hz = /bits/ 64 <300000000>;
> +			opp-microvolt = <825000>;
> +		};
> +		opp-400000000 {
> +			opp-hz = /bits/ 64 <400000000>;
> +			opp-microvolt = <825000>;
> +		};
> +		opp-600000000 {
> +			opp-hz = /bits/ 64 <600000000>;
> +			opp-microvolt = <825000>;
> +		};
> +		opp-700000000 {
> +			opp-hz = /bits/ 64 <700000000>;
> +			opp-microvolt = <900000>;
> +		};
> +		opp-800000000 {
> +			opp-hz = /bits/ 64 <800000000>;
> +			opp-microvolt = <1000000>;
> +		};
> +	};
> +
>  	firmware {
>  		scmi: scmi {
>  			compatible = "arm,scmi-smc";
> @@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC {
>  		};
>  	};
>  
> +	gpu: gpu@fde60000 {
> +		compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
> +		reg = <0x0 0xfde60000 0x0 0x4000>;

> +

remove empty lines

> +		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "job", "mmu", "gpu";

> +

dito

> +		clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
> +		clock-names = "core", "bus";

Not sure if it's possible, but could you keep them all a little bit in
the same order/style as arm,mali-400?

From arm,mali-utgard.yaml:

  clock-names:
    items:
      - const: bus
      - const: core


> +		operating-points-v2 = <&gpu_opp_table>;

> +

dito

> +		#cooling-cells = <2>;
> +		power-domains = <&power RK3568_PD_GPU>;
> +		status = "disabled";
> +	};
> +
>  	sdmmc2: mmc@fe000000 {
>  		compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x0 0xfe000000 0x0 0x4000>;
> 

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Re: [PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568

[Ezequiel Garcia]

Hi Johan,

Thanks for the review.

On Fri, 2021-07-30 at 21:38 +0200, Johan Jonker wrote:
> Hi Ezequiel,
> 
> Some comments. Have a look if it's useful.
> 
> On 7/30/21 6:45 PM, Ezequiel Garcia wrote:
> > Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
> > which is based on the Bifrost architecture. It has
> > one shader core and two execution engines.
> > 
> > Quoting the datasheet:
> > 
> > Mali-G52 1-Core-2EE
> > * Support 1600Mpix/s fill rate when 800MHz clock frequency
> > * Support 38.4GLOPs when 800MHz clock frequency
> > 
> > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++
> >  1 file changed, 47 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > index bef747fb1fe2..f4f400792659 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > @@ -121,6 +121,35 @@ opp-1800000000 {
> >                 };
> >         };
> >  
> 
> > +       gpu_opp_table: opp-table2 {
> 
>         gpu_opp_table: gpu-opp-table {
> 

Makes sense.

> > +               compatible = "operating-points-v2";
> > +
> > +               opp-200000000 {
> > +                       opp-hz = /bits/ 64 <200000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> 
> Similar to cpu0_opp_table keep the same style and add an empty line
> between nodes.
> 

Makes sense.

> > +               opp-300000000 {
> > +                       opp-hz = /bits/ 64 <300000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> > +               opp-400000000 {
> > +                       opp-hz = /bits/ 64 <400000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> > +               opp-600000000 {
> > +                       opp-hz = /bits/ 64 <600000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> > +               opp-700000000 {
> > +                       opp-hz = /bits/ 64 <700000000>;
> > +                       opp-microvolt = <900000>;
> > +               };
> > +               opp-800000000 {
> > +                       opp-hz = /bits/ 64 <800000000>;
> > +                       opp-microvolt = <1000000>;
> > +               };
> > +       };
> > +
> >         firmware {
> >                 scmi: scmi {
> >                         compatible = "arm,scmi-smc";
> > @@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC {
> >                 };
> >         };
> >  
> > +       gpu: gpu@fde60000 {
> > +               compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
> > +               reg = <0x0 0xfde60000 0x0 0x4000>;
> 
> > +
> 
> remove empty lines
> 

Makes sense.

> > +               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> > +                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> > +                            <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> > +               interrupt-names = "job", "mmu", "gpu";
> 
> > +
> 
> dito
> 
> > +               clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
> > +               clock-names = "core", "bus";
> 
> Not sure if it's possible, but could you keep them all a little bit in
> the same order/style as arm,mali-400?
> 
> From arm,mali-utgard.yaml:
> 
>   clock-names:
>     items:
>       - const: bus
>       - const: core
> 

Don't think we can do that in this case, as the first clock
is already expected as the "core" one.

These clocks might need some cleaner specification in the
driver or the dt-binding (or both), but I'd like to defer
that to the driver maintainers.


-- 
Kindly,
Ezequiel

Re: [PATCH 3/4] arm64: dts: rockchip: Add GPU node for rk3568

[Ezequiel Garcia]

Hi Johan,

Thanks for the review.

On Fri, 2021-07-30 at 21:38 +0200, Johan Jonker wrote:
> Hi Ezequiel,
> 
> Some comments. Have a look if it's useful.
> 
> On 7/30/21 6:45 PM, Ezequiel Garcia wrote:
> > Rockchip SoCs RK3566 and RK3568 have a Mali Gondul core
> > which is based on the Bifrost architecture. It has
> > one shader core and two execution engines.
> > 
> > Quoting the datasheet:
> > 
> > Mali-G52 1-Core-2EE
> > * Support 1600Mpix/s fill rate when 800MHz clock frequency
> > * Support 38.4GLOPs when 800MHz clock frequency
> > 
> > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk356x.dtsi | 47 ++++++++++++++++++++++++
> >  1 file changed, 47 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > index bef747fb1fe2..f4f400792659 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > @@ -121,6 +121,35 @@ opp-1800000000 {
> >                 };
> >         };
> >  
> 
> > +       gpu_opp_table: opp-table2 {
> 
>         gpu_opp_table: gpu-opp-table {
> 

Makes sense.

> > +               compatible = "operating-points-v2";
> > +
> > +               opp-200000000 {
> > +                       opp-hz = /bits/ 64 <200000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> 
> Similar to cpu0_opp_table keep the same style and add an empty line
> between nodes.
> 

Makes sense.

> > +               opp-300000000 {
> > +                       opp-hz = /bits/ 64 <300000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> > +               opp-400000000 {
> > +                       opp-hz = /bits/ 64 <400000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> > +               opp-600000000 {
> > +                       opp-hz = /bits/ 64 <600000000>;
> > +                       opp-microvolt = <825000>;
> > +               };
> > +               opp-700000000 {
> > +                       opp-hz = /bits/ 64 <700000000>;
> > +                       opp-microvolt = <900000>;
> > +               };
> > +               opp-800000000 {
> > +                       opp-hz = /bits/ 64 <800000000>;
> > +                       opp-microvolt = <1000000>;
> > +               };
> > +       };
> > +
> >         firmware {
> >                 scmi: scmi {
> >                         compatible = "arm,scmi-smc";
> > @@ -332,6 +361,24 @@ power-domain@RK3568_PD_RKVENC {
> >                 };
> >         };
> >  
> > +       gpu: gpu@fde60000 {
> > +               compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
> > +               reg = <0x0 0xfde60000 0x0 0x4000>;
> 
> > +
> 
> remove empty lines
> 

Makes sense.

> > +               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
> > +                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> > +                            <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> > +               interrupt-names = "job", "mmu", "gpu";
> 
> > +
> 
> dito
> 
> > +               clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
> > +               clock-names = "core", "bus";
> 
> Not sure if it's possible, but could you keep them all a little bit in
> the same order/style as arm,mali-400?
> 
> From arm,mali-utgard.yaml:
> 
>   clock-names:
>     items:
>       - const: bus
>       - const: core
> 

Don't think we can do that in this case, as the first clock
is already expected as the "core" one.

These clocks might need some cleaner specification in the
driver or the dt-binding (or both), but I'd like to defer
that to the driver maintainers.


-- 
Kindly,
Ezequiel


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Re: [PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Rob Herring]

On Fri, Nov 26, 2021 at 04:17:26PM +0100, Alex Bee wrote:
> Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
> added an optional bus_clock to support Allwinner H6 T-720 GPU.

That's midgard and this is bifrost... Driver changes are somewhat 
irrelevant.

> Increase the max clock items in the dt-binding to reflect this.
> 
> Bifrost GPU in Rockchip RK3568 SoCs also has a core and a bus clock
> and it gets added here in a (very) similar way it was done for
> allwinner,sun50i-h6-mali compatible in arm,mali-midgard binding.

I guess that one is insufficient.

> 
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> ---
>  .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> index 6f98dd55fb4c..2849a7a97d73 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -39,7 +39,14 @@ properties:
>        - const: gpu
>  
>    clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: core
> +      - const: bus
>  
>    mali-supply: true
>  
> @@ -118,6 +125,17 @@ allOf:
>          power-domains:
>            maxItems: 1
>          sram-supply: false
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: rockchip,rk3568-mali
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2

           clock-names:
             minItems: 2

> +      required:
> +        - clock-names

       else:
         properties:
           clocks: 
             maxItems: 1

           clock-names: 
             maxItems: 1

>  
>  examples:
>    - |
> -- 
> 2.30.2
> 
> 

Re: [PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Rob Herring]

On Fri, Nov 26, 2021 at 04:17:26PM +0100, Alex Bee wrote:
> Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
> added an optional bus_clock to support Allwinner H6 T-720 GPU.

That's midgard and this is bifrost... Driver changes are somewhat 
irrelevant.

> Increase the max clock items in the dt-binding to reflect this.
> 
> Bifrost GPU in Rockchip RK3568 SoCs also has a core and a bus clock
> and it gets added here in a (very) similar way it was done for
> allwinner,sun50i-h6-mali compatible in arm,mali-midgard binding.

I guess that one is insufficient.

> 
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> ---
>  .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> index 6f98dd55fb4c..2849a7a97d73 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -39,7 +39,14 @@ properties:
>        - const: gpu
>  
>    clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: core
> +      - const: bus
>  
>    mali-supply: true
>  
> @@ -118,6 +125,17 @@ allOf:
>          power-domains:
>            maxItems: 1
>          sram-supply: false
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: rockchip,rk3568-mali
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2

           clock-names:
             minItems: 2

> +      required:
> +        - clock-names

       else:
         properties:
           clocks: 
             maxItems: 1

           clock-names: 
             maxItems: 1

>  
>  examples:
>    - |
> -- 
> 2.30.2
> 
> 

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Re: [PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Rob Herring]

On Fri, Nov 26, 2021 at 04:17:26PM +0100, Alex Bee wrote:
> Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
> added an optional bus_clock to support Allwinner H6 T-720 GPU.

That's midgard and this is bifrost... Driver changes are somewhat 
irrelevant.

> Increase the max clock items in the dt-binding to reflect this.
> 
> Bifrost GPU in Rockchip RK3568 SoCs also has a core and a bus clock
> and it gets added here in a (very) similar way it was done for
> allwinner,sun50i-h6-mali compatible in arm,mali-midgard binding.

I guess that one is insufficient.

> 
> Signed-off-by: Alex Bee <knaerzche@gmail.com>
> ---
>  .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> index 6f98dd55fb4c..2849a7a97d73 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -39,7 +39,14 @@ properties:
>        - const: gpu
>  
>    clocks:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: core
> +      - const: bus
>  
>    mali-supply: true
>  
> @@ -118,6 +125,17 @@ allOf:
>          power-domains:
>            maxItems: 1
>          sram-supply: false
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: rockchip,rk3568-mali
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 2

           clock-names:
             minItems: 2

> +      required:
> +        - clock-names

       else:
         properties:
           clocks: 
             maxItems: 1

           clock-names: 
             maxItems: 1

>  
>  examples:
>    - |
> -- 
> 2.30.2
> 
> 

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[PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Alex Bee]

Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.

Bifrost GPU in Rockchip RK3568 SoCs also has a core and a bus clock
and it gets added here in a (very) similar way it was done for
allwinner,sun50i-h6-mali compatible in arm,mali-midgard binding.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
 .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 6f98dd55fb4c..2849a7a97d73 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -39,7 +39,14 @@ properties:
       - const: gpu
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: core
+      - const: bus
 
   mali-supply: true
 
@@ -118,6 +125,17 @@ allOf:
         power-domains:
           maxItems: 1
         sram-supply: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: rockchip,rk3568-mali
+    then:
+      properties:
+        clocks:
+          minItems: 2
+      required:
+        - clock-names
 
 examples:
   - |
-- 
2.30.2


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[PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Alex Bee]

Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.

Bifrost GPU in Rockchip RK3568 SoCs also has a core and a bus clock
and it gets added here in a (very) similar way it was done for
allwinner,sun50i-h6-mali compatible in arm,mali-midgard binding.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
 .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 6f98dd55fb4c..2849a7a97d73 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -39,7 +39,14 @@ properties:
       - const: gpu
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: core
+      - const: bus
 
   mali-supply: true
 
@@ -118,6 +125,17 @@ allOf:
         power-domains:
           maxItems: 1
         sram-supply: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: rockchip,rk3568-mali
+    then:
+      properties:
+        clocks:
+          minItems: 2
+      required:
+        - clock-names
 
 examples:
   - |
-- 
2.30.2


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[PATCH 1/4] dt-bindings: gpu: mali-bifrost: Allow up to two clocks

[Alex Bee]

Commit b681af0bc1cc ("drm: panfrost: add optional bus_clock")
added an optional bus_clock to support Allwinner H6 T-720 GPU.
Increase the max clock items in the dt-binding to reflect this.

Bifrost GPU in Rockchip RK3568 SoCs also has a core and a bus clock
and it gets added here in a (very) similar way it was done for
allwinner,sun50i-h6-mali compatible in arm,mali-midgard binding.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
---
 .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index 6f98dd55fb4c..2849a7a97d73 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -39,7 +39,14 @@ properties:
       - const: gpu
 
   clocks:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    minItems: 1
+    items:
+      - const: core
+      - const: bus
 
   mali-supply: true
 
@@ -118,6 +125,17 @@ allOf:
         power-domains:
           maxItems: 1
         sram-supply: false
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: rockchip,rk3568-mali
+    then:
+      properties:
+        clocks:
+          minItems: 2
+      required:
+        - clock-names
 
 examples:
   - |
-- 
2.30.2