From: Alexey Baturo <baturo.alexey@gmail.com> Cc: baturo.alexey@gmail.com, qemu-riscv@nongnu.org, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, Bin Meng <bin.meng@windriver.com>, richard.henderson@linaro.org, qemu-devel@nongnu.org, space.monkey.delivers@gmail.com, Alistair Francis <alistair.francis@wdc.com>, kupokupokupopo@gmail.com, palmer@dabbelt.com Subject: [PATCH v10 7/7] [RISCV_PM] Allow experimental J-ext to be turned on Date: Sun, 29 Aug 2021 20:51:20 +0300 [thread overview] Message-ID: <20210829175120.19413-8-space.monkey.delivers@gmail.com> (raw) In-Reply-To: <20210829175120.19413-1-space.monkey.delivers@gmail.com> Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> --- target/riscv/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ab8c81cb5e..fde96c21f2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -583,6 +583,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) /* mmte is supposed to have pm.current hardwired to 1 */ env->mmte |= (PM_EXT_INITIAL | MMTE_M_PM_CURRENT); #endif + target_misa |= RVJ; } set_misa(env, target_misa); @@ -618,6 +619,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, false), DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false), DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false), + DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false), DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true), DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true), DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true), -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Alexey Baturo <baturo.alexey@gmail.com> Cc: baturo.alexey@gmail.com, richard.henderson@linaro.org, space.monkey.delivers@gmail.com, kupokupokupopo@gmail.com, palmer@dabbelt.com, Alistair.Francis@wdc.com, sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de, qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com> Subject: [PATCH v10 7/7] [RISCV_PM] Allow experimental J-ext to be turned on Date: Sun, 29 Aug 2021 20:51:20 +0300 [thread overview] Message-ID: <20210829175120.19413-8-space.monkey.delivers@gmail.com> (raw) In-Reply-To: <20210829175120.19413-1-space.monkey.delivers@gmail.com> Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> --- target/riscv/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ab8c81cb5e..fde96c21f2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -583,6 +583,7 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) /* mmte is supposed to have pm.current hardwired to 1 */ env->mmte |= (PM_EXT_INITIAL | MMTE_M_PM_CURRENT); #endif + target_misa |= RVJ; } set_misa(env, target_misa); @@ -618,6 +619,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, false), DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false), DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false), + DEFINE_PROP_BOOL("x-j", RISCVCPU, cfg.ext_j, false), DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true), DEFINE_PROP_BOOL("Zifencei", RISCVCPU, cfg.ext_ifencei, true), DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true), -- 2.20.1
next prev parent reply other threads:[~2021-08-29 17:58 UTC|newest] Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-29 17:51 [PATCH v10 0/7] RISC-V Pointer Masking implementation Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-08-29 17:51 ` [PATCH v10 1/7] [RISCV_PM] Add J-extension into RISC-V Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-08-29 17:51 ` [PATCH v10 2/7] [RISCV_PM] Add CSR defines for RISC-V PM extension Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-09-09 4:34 ` Alistair Francis 2021-08-29 17:51 ` [PATCH v10 3/7] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-09-09 5:57 ` Alistair Francis 2021-08-29 17:51 ` [PATCH v10 4/7] [RISCV_PM] Print new PM CSRs in QEMU logs Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-08-29 17:51 ` [PATCH v10 5/7] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-08-29 17:51 ` [PATCH v10 6/7] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo 2021-08-29 17:51 ` Alexey Baturo [this message] 2021-08-29 17:51 ` [PATCH v10 7/7] [RISCV_PM] Allow experimental J-ext to be turned on Alexey Baturo
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