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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, John.C.Harrison@Intel.com,
	matthew.brost@intel.com
Subject: [PATCH v5 16/25] drm/i915/guc: Flush G2H work queue during reset
Date: Wed,  1 Sep 2021 17:50:13 -0700	[thread overview]
Message-ID: <20210902005022.711767-17-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20210902005022.711767-1-daniele.ceraolospurio@intel.com>

From: Matthew Brost <matthew.brost@intel.com>

It isn't safe to scrub for missing G2H or continue with the reset until
all G2H processing is complete. Flush the G2H work queue during reset to
ensure it is done running. No need to call the IRQ handler directly
either as the scrubbing code can deal with any missing G2H.

Fixes: eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC interface")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c  | 18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index dcd7a09f8559..8509e827a8d0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -716,8 +716,6 @@ static void guc_flush_submissions(struct intel_guc *guc)
 
 void intel_guc_submission_reset_prepare(struct intel_guc *guc)
 {
-	int i;
-
 	if (unlikely(!guc_submission_initialized(guc))) {
 		/* Reset called during driver load? GuC not yet initialised! */
 		return;
@@ -733,20 +731,8 @@ void intel_guc_submission_reset_prepare(struct intel_guc *guc)
 
 	guc_flush_submissions(guc);
 
-	/*
-	 * Handle any outstanding G2Hs before reset. Call IRQ handler directly
-	 * each pass as interrupt have been disabled. We always scrub for
-	 * outstanding G2H as it is possible for outstanding_submission_g2h to
-	 * be incremented after the context state update.
-	 */
-	for (i = 0; i < 4 && atomic_read(&guc->outstanding_submission_g2h); ++i) {
-		intel_guc_to_host_event_handler(guc);
-#define wait_for_reset(guc, wait_var) \
-		intel_guc_wait_for_pending_msg(guc, wait_var, false, (HZ / 20))
-		do {
-			wait_for_reset(guc, &guc->outstanding_submission_g2h);
-		} while (!list_empty(&guc->ct.requests.incoming));
-	}
+	flush_work(&guc->ct.requests.worker);
+
 	scrub_guc_desc_for_outstanding_g2h(guc);
 }
 
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, John.C.Harrison@Intel.com,
	matthew.brost@intel.com
Subject: [Intel-gfx] [PATCH v5 16/25] drm/i915/guc: Flush G2H work queue during reset
Date: Wed,  1 Sep 2021 17:50:13 -0700	[thread overview]
Message-ID: <20210902005022.711767-17-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20210902005022.711767-1-daniele.ceraolospurio@intel.com>

From: Matthew Brost <matthew.brost@intel.com>

It isn't safe to scrub for missing G2H or continue with the reset until
all G2H processing is complete. Flush the G2H work queue during reset to
ensure it is done running. No need to call the IRQ handler directly
either as the scrubbing code can deal with any missing G2H.

Fixes: eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC interface")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c  | 18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index dcd7a09f8559..8509e827a8d0 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -716,8 +716,6 @@ static void guc_flush_submissions(struct intel_guc *guc)
 
 void intel_guc_submission_reset_prepare(struct intel_guc *guc)
 {
-	int i;
-
 	if (unlikely(!guc_submission_initialized(guc))) {
 		/* Reset called during driver load? GuC not yet initialised! */
 		return;
@@ -733,20 +731,8 @@ void intel_guc_submission_reset_prepare(struct intel_guc *guc)
 
 	guc_flush_submissions(guc);
 
-	/*
-	 * Handle any outstanding G2Hs before reset. Call IRQ handler directly
-	 * each pass as interrupt have been disabled. We always scrub for
-	 * outstanding G2H as it is possible for outstanding_submission_g2h to
-	 * be incremented after the context state update.
-	 */
-	for (i = 0; i < 4 && atomic_read(&guc->outstanding_submission_g2h); ++i) {
-		intel_guc_to_host_event_handler(guc);
-#define wait_for_reset(guc, wait_var) \
-		intel_guc_wait_for_pending_msg(guc, wait_var, false, (HZ / 20))
-		do {
-			wait_for_reset(guc, &guc->outstanding_submission_g2h);
-		} while (!list_empty(&guc->ct.requests.incoming));
-	}
+	flush_work(&guc->ct.requests.worker);
+
 	scrub_guc_desc_for_outstanding_g2h(guc);
 }
 
-- 
2.25.1


  parent reply	other threads:[~2021-09-02  0:53 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-02  0:49 [PATCH v5 00/25] Clean up GuC CI failures, simplify locking, and kernel DOC Daniele Ceraolo Spurio
2021-09-02  0:49 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:49 ` [PATCH v5 01/25] drm/i915/guc: Fix blocked context accounting Daniele Ceraolo Spurio
2021-09-02  0:49   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:49 ` [PATCH v5 02/25] drm/i915/guc: Fix outstanding G2H accounting Daniele Ceraolo Spurio
2021-09-02  0:49   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02 22:11   ` John Harrison
2021-09-02 22:11     ` [Intel-gfx] " John Harrison
2021-09-02  0:50 ` [PATCH v5 03/25] drm/i915/guc: Unwind context requests in reverse order Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 04/25] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 05/25] drm/i915/guc: Process all G2H message at once in work queue Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 06/25] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 07/25] Revert "drm/i915/gt: Propagate change in error status to children on unhold" Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-03 23:49   ` Daniele Ceraolo Spurio
2021-09-03 23:49     ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 08/25] drm/i915/guc: Kick tasklet after queuing a request Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 09/25] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 10/25] drm/i915/guc: Copy whole golden context, set engine state size of subset Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02 19:25   ` John Harrison
2021-09-02 19:25     ` [Intel-gfx] " John Harrison
2021-09-02  0:50 ` [Intel-gfx] [PATCH v5 11/25] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Daniele Ceraolo Spurio
2021-09-02  0:50   ` Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 12/25] drm/i915/guc: Take context ref when cancelling request Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [Intel-gfx] [PATCH v5 13/25] drm/i915/guc: Don't touch guc_state.sched_state without a lock Daniele Ceraolo Spurio
2021-09-02  0:50   ` Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 14/25] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [Intel-gfx] [PATCH v5 15/25] drm/i915: Allocate error capture in nowait context Daniele Ceraolo Spurio
2021-09-02  0:50   ` Daniele Ceraolo Spurio
2021-09-02  0:50 ` Daniele Ceraolo Spurio [this message]
2021-09-02  0:50   ` [Intel-gfx] [PATCH v5 16/25] drm/i915/guc: Flush G2H work queue during reset Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 17/25] drm/i915/guc: Release submit fence from an irq_work Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 18/25] drm/i915/guc: Move guc_blocked fence to struct guc_state Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 19/25] drm/i915/guc: Rework and simplify locking Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 20/25] drm/i915/guc: Proper xarray usage for contexts_lookup Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 21/25] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 22/25] drm/i915/guc: Move GuC priority fields in context under guc_active Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 23/25] drm/i915/guc: Move fields protected by guc->contexts_lock into sub structure Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 24/25] drm/i915/guc: Drop guc_active move everything into guc_state Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02  0:50 ` [PATCH v5 25/25] drm/i915/guc: Add GuC kernel doc Daniele Ceraolo Spurio
2021-09-02  0:50   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-02 17:01   ` John Harrison
2021-09-02 17:01     ` [Intel-gfx] " John Harrison
2021-09-02 17:15     ` Daniele Ceraolo Spurio
2021-09-02 17:15       ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-03 19:59   ` Daniele Ceraolo Spurio
2021-09-03 19:59     ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-08 23:38     ` John Harrison
2021-09-08 23:38       ` [Intel-gfx] " John Harrison
2021-09-02  1:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev8) Patchwork
2021-09-02  1:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-02  1:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-02  2:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-03 20:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev9) Patchwork
2021-09-03 20:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-03 20:42 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-09-04  0:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev10) Patchwork
2021-09-04  0:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-04  0:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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