From: Chia-Wei Wang <chiawei_wang@aspeedtech.com> To: <robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <lee.jones@linaro.org>, <osk@google.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>, <openbmc@lists.ozlabs.org> Subject: [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Date: Thu, 2 Sep 2021 10:18:14 +0800 [thread overview] Message-ID: <20210902021817.17506-2-chiawei_wang@aspeedtech.com> (raw) In-Reply-To: <20210902021817.17506-1-chiawei_wang@aspeedtech.com> Add the compatible string and the device tree description for the Aspeed AST25xx/AST26xx UART routing control. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> --- .../devicetree/bindings/mfd/aspeed-lpc.txt | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt index 936aa108eab4..45d44f812e5e 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt @@ -155,3 +155,25 @@ lpc_reset: reset-controller@98 { reg = <0x98 0x4>; #reset-cells = <1>; }; + +UART routing control +-------------------- + +The UART routing control manages the RX muxes among the UART controllers +and the I/O pins. This is typicall used for the Serial-Over-Lan (SOL) +service. + +Required properties: + + - compatible: One of: + "aspeed,ast2500-uart-routing"; + "aspeed,ast2600-uart-routing"; + + - reg: offset and length of the IP in the LPC memory region + +Example: + +uart_routing: uart-routing@98 { + compatible = "aspeed,ast2600-uart-routing"; + reg = <0x98 0x8>; +}; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Chia-Wei Wang <chiawei_wang@aspeedtech.com> To: <robh+dt@kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <lee.jones@linaro.org>, <osk@google.com>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>, <linux-kernel@vger.kernel.org>, <openbmc@lists.ozlabs.org> Subject: [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Date: Thu, 2 Sep 2021 10:18:14 +0800 [thread overview] Message-ID: <20210902021817.17506-2-chiawei_wang@aspeedtech.com> (raw) In-Reply-To: <20210902021817.17506-1-chiawei_wang@aspeedtech.com> Add the compatible string and the device tree description for the Aspeed AST25xx/AST26xx UART routing control. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> --- .../devicetree/bindings/mfd/aspeed-lpc.txt | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt index 936aa108eab4..45d44f812e5e 100644 --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt @@ -155,3 +155,25 @@ lpc_reset: reset-controller@98 { reg = <0x98 0x4>; #reset-cells = <1>; }; + +UART routing control +-------------------- + +The UART routing control manages the RX muxes among the UART controllers +and the I/O pins. This is typicall used for the Serial-Over-Lan (SOL) +service. + +Required properties: + + - compatible: One of: + "aspeed,ast2500-uart-routing"; + "aspeed,ast2600-uart-routing"; + + - reg: offset and length of the IP in the LPC memory region + +Example: + +uart_routing: uart-routing@98 { + compatible = "aspeed,ast2600-uart-routing"; + reg = <0x98 0x8>; +}; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-09-02 2:20 UTC|newest] Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-02 2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang 2021-09-02 2:18 ` Chia-Wei Wang 2021-09-02 2:18 ` Chia-Wei Wang [this message] 2021-09-02 2:18 ` [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Chia-Wei Wang 2021-09-07 18:46 ` Rob Herring 2021-09-07 18:46 ` Rob Herring 2021-09-07 18:46 ` Rob Herring 2021-09-08 5:06 ` ChiaWei Wang 2021-09-08 5:06 ` ChiaWei Wang 2021-09-08 5:06 ` ChiaWei Wang 2021-09-02 2:18 ` [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support Chia-Wei Wang 2021-09-02 2:18 ` Chia-Wei Wang 2021-09-02 2:25 ` ChiaWei Wang 2021-09-02 2:25 ` ChiaWei Wang 2021-09-02 2:25 ` ChiaWei Wang 2021-09-02 2:18 ` [PATCH v2 2/3] soc: aspeed: Add " Chia-Wei Wang 2021-09-02 2:18 ` Chia-Wei Wang 2021-09-02 2:18 ` [PATCH v2 3/3] ARM: dts: aspeed: Add uart routing to device tree Chia-Wei Wang 2021-09-02 2:18 ` Chia-Wei Wang 2021-09-08 9:42 ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Paul Fertser 2021-09-08 9:42 ` Paul Fertser 2021-09-08 9:42 ` Paul Fertser 2021-09-08 10:18 ` ChiaWei Wang 2021-09-08 10:18 ` ChiaWei Wang 2021-09-08 10:18 ` ChiaWei Wang 2021-09-08 10:52 ` Paul Fertser 2021-09-08 10:52 ` Paul Fertser 2021-09-08 10:52 ` Paul Fertser 2021-09-08 11:27 ` VUART compatibility (was: Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support) Paul Fertser 2021-09-08 11:27 ` Paul Fertser 2021-09-08 11:27 ` Paul Fertser 2021-09-08 13:19 ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Oskar Senft 2021-09-08 13:19 ` Oskar Senft 2021-09-08 13:19 ` Oskar Senft 2021-09-09 6:52 ` [External] " Lei Yu 2021-09-09 6:52 ` Lei Yu 2021-09-09 6:52 ` Lei Yu 2021-09-09 8:32 ` ChiaWei Wang 2021-09-09 8:32 ` ChiaWei Wang 2021-09-09 8:32 ` ChiaWei Wang
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