From: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Subject: [Intel-gfx] [PATCH V4 6/6] drm/i915/selftest: Remove Renderer class check for l3cc table read
Date: Fri, 3 Sep 2021 00:26:35 +0530 [thread overview]
Message-ID: <20210902185635.290538-7-ayaz.siddiqui@intel.com> (raw)
In-Reply-To: <20210902185635.290538-1-ayaz.siddiqui@intel.com>
Some platform like XEHPSVD does not have Renderer engines. since
read_l3cc_table() is guarded by renderer class due to that check
of L3CC table was not being performed on those platforms.
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_mocs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c
index 13d25bf2a94aa..c3a48a06c37ee 100644
--- a/drivers/gpu/drm/i915/gt/selftest_mocs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c
@@ -237,7 +237,7 @@ static int check_mocs_engine(struct live_mocs *arg,
offset = i915_ggtt_offset(vma);
if (!err)
err = read_mocs_table(rq, arg->mocs, &offset);
- if (!err && ce->engine->class == RENDER_CLASS)
+ if (!err)
err = read_l3cc_table(rq, arg->l3cc, &offset);
offset -= i915_ggtt_offset(vma);
GEM_BUG_ON(offset > PAGE_SIZE);
@@ -250,7 +250,7 @@ static int check_mocs_engine(struct live_mocs *arg,
vaddr = arg->vaddr;
if (!err)
err = check_mocs_table(ce->engine, arg->mocs, &vaddr);
- if (!err && ce->engine->class == RENDER_CLASS)
+ if (!err)
err = check_l3cc_table(ce->engine, arg->l3cc, &vaddr);
if (err)
return err;
--
2.26.2
next prev parent reply other threads:[~2021-09-02 19:00 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-02 18:56 [Intel-gfx] [PATCH V4 0/6] drm/i915/gt: Initialize unused MOCS entries to L3_WB Ayaz A Siddiqui
2021-09-02 18:56 ` [Intel-gfx] [PATCH V4 1/6] drm/i915/gt: Add support of mocs propagation Ayaz A Siddiqui
2021-09-02 20:19 ` Matt Roper
2021-09-02 18:56 ` [Intel-gfx] [PATCH V4 2/6] drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward Ayaz A Siddiqui
2021-09-02 20:35 ` Matt Roper
2021-09-02 22:59 ` Lucas De Marchi
2021-09-02 23:26 ` Matt Roper
2021-09-02 18:56 ` [Intel-gfx] [PATCH V4 3/6] drm/i915/gt: Set BLIT_CCTL reg to un-cached Ayaz A Siddiqui
2021-09-02 20:45 ` Matt Roper
2021-09-02 18:56 ` [Intel-gfx] [PATCH V4 4/6] drm/i915/gt: Initialize unused MOCS entries with device specific values Ayaz A Siddiqui
2021-09-02 20:51 ` Matt Roper
2021-09-02 18:56 ` [Intel-gfx] [PATCH V4 5/6] drm/i915/gt: Initialize L3CC table in mocs init Ayaz A Siddiqui
2021-09-02 21:01 ` Matt Roper
2021-09-02 18:56 ` Ayaz A Siddiqui [this message]
2021-09-02 21:07 ` [Intel-gfx] [PATCH V4 6/6] drm/i915/selftest: Remove Renderer class check for l3cc table read Matt Roper
2021-09-02 19:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB Patchwork
2021-09-02 20:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-09-03 5:21 ` Siddiqui, Ayaz A
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