* [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
@ 2021-09-28 17:08 ` Harry Wentland
0 siblings, 0 replies; 12+ messages in thread
From: Harry Wentland @ 2021-09-28 17:08 UTC (permalink / raw)
To: alexander.deucher, amd-gfx, jerry.zuo
Cc: jani.nikula, Sunpeng.Li, nathan, intel-gfx, dri-devel,
ville.syrjala, manasi.d.navare, christian.koenig, Xinhui.Pan,
sfr, linux-next, airlied, daniel.vetter, Harry Wentland
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
./include/drm/drm_dp_helper.h:1322:9: error: 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-Werror,-Wmacro-redefined]
^
./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note: previous definition is here
^
1 error generated.
v2: Add one missing endif
[How]
Guard all display driver defines with #ifndef for now. Once we pull
in the new definitions into amd-staging-drm-next we will follow
up and drop definitions from our driver and provide follow-up
header updates for any addition DP 2.0 definitions required
by our driver.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54 ++++++++++++++++++--
1 file changed, 49 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index a5e798b5da79..9de86ff5ef1b 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -860,28 +860,72 @@ struct psr_caps {
};
#if defined(CONFIG_DRM_AMD_DC_DCN)
+#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
#define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
+#endif
+#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
#define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
+#endif
+#ifndef DP_FEC_CAPABILITY_1
#define DP_FEC_CAPABILITY_1 0x091
+#endif
+#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
#define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
+#endif
+#ifndef DP_DSC_CONFIGURATION
#define DP_DSC_CONFIGURATION 0x161
+#endif
+#ifndef DP_PHY_SQUARE_PATTERN
#define DP_PHY_SQUARE_PATTERN 0x249
+#endif
+#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
#define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
+#endif
+#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
#define DP_128b_132b_TRAINING_AUX_RD_INTERVAL 0x2216
+#endif
+#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
#define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
+#endif
+#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
#define DP_TEST_264BIT_CUSTOM_PATTERN_263_256 0X2250
+#endif
+#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
#define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
+#endif
+#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
#define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0 0x2270
-# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 << 0)
-# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK (0b111 << 1)
-# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
-# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
-# define DP_DSC_DECODER_COUNT_SHIFT 5
+#endif
+#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
+#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 << 0)
+#endif
+#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
+#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK (0b111 << 1)
+#endif
+#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
+#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
+#endif
+#ifndef DP_DSC_DECODER_COUNT_MASK
+#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
+#endif
+#ifndef DP_DSC_DECODER_COUNT_SHIFT
+#define DP_DSC_DECODER_COUNT_SHIFT 5
+#endif
+#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
#define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
+#endif
+#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
#define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+#endif
+#ifndef DP_PHY_REPEATER_128b_132b_RATES
#define DP_PHY_REPEATER_128b_132b_RATES 0xF0007
+#endif
+#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
#define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1 0xF0022
+#endif
+#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
#define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
+#endif
/* TODO - Use DRM header to replace above once available */
union dp_main_line_channel_coding_cap {
--
2.33.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
@ 2021-09-28 17:08 ` Harry Wentland
0 siblings, 0 replies; 12+ messages in thread
From: Harry Wentland @ 2021-09-28 17:08 UTC (permalink / raw)
To: alexander.deucher, amd-gfx, jerry.zuo
Cc: jani.nikula, Sunpeng.Li, nathan, intel-gfx, dri-devel,
ville.syrjala, manasi.d.navare, christian.koenig, Xinhui.Pan,
sfr, linux-next, airlied, daniel.vetter, Harry Wentland
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
./include/drm/drm_dp_helper.h:1322:9: error: 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-Werror,-Wmacro-redefined]
^
./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note: previous definition is here
^
1 error generated.
v2: Add one missing endif
[How]
Guard all display driver defines with #ifndef for now. Once we pull
in the new definitions into amd-staging-drm-next we will follow
up and drop definitions from our driver and provide follow-up
header updates for any addition DP 2.0 definitions required
by our driver.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54 ++++++++++++++++++--
1 file changed, 49 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index a5e798b5da79..9de86ff5ef1b 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -860,28 +860,72 @@ struct psr_caps {
};
#if defined(CONFIG_DRM_AMD_DC_DCN)
+#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
#define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
+#endif
+#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
#define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
+#endif
+#ifndef DP_FEC_CAPABILITY_1
#define DP_FEC_CAPABILITY_1 0x091
+#endif
+#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
#define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
+#endif
+#ifndef DP_DSC_CONFIGURATION
#define DP_DSC_CONFIGURATION 0x161
+#endif
+#ifndef DP_PHY_SQUARE_PATTERN
#define DP_PHY_SQUARE_PATTERN 0x249
+#endif
+#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
#define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
+#endif
+#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
#define DP_128b_132b_TRAINING_AUX_RD_INTERVAL 0x2216
+#endif
+#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
#define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
+#endif
+#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
#define DP_TEST_264BIT_CUSTOM_PATTERN_263_256 0X2250
+#endif
+#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
#define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
+#endif
+#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
#define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0 0x2270
-# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 << 0)
-# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK (0b111 << 1)
-# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
-# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
-# define DP_DSC_DECODER_COUNT_SHIFT 5
+#endif
+#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
+#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 << 0)
+#endif
+#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
+#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK (0b111 << 1)
+#endif
+#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
+#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
+#endif
+#ifndef DP_DSC_DECODER_COUNT_MASK
+#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
+#endif
+#ifndef DP_DSC_DECODER_COUNT_SHIFT
+#define DP_DSC_DECODER_COUNT_SHIFT 5
+#endif
+#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
#define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
+#endif
+#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
#define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
+#endif
+#ifndef DP_PHY_REPEATER_128b_132b_RATES
#define DP_PHY_REPEATER_128b_132b_RATES 0xF0007
+#endif
+#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
#define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1 0xF0022
+#endif
+#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
#define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
+#endif
/* TODO - Use DRM header to replace above once available */
union dp_main_line_channel_coding_cap {
--
2.33.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* RE: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-28 17:08 ` [Intel-gfx] " Harry Wentland
@ 2021-09-28 17:41 ` Zuo, Jerry
-1 siblings, 0 replies; 12+ messages in thread
From: Zuo, Jerry @ 2021-09-28 17:41 UTC (permalink / raw)
To: Wentland, Harry, Deucher, Alexander, amd-gfx
Cc: jani.nikula, Li, Sun peng (Leo),
nathan, intel-gfx, dri-devel, ville.syrjala, manasi.d.navare,
Koenig, Christian, Pan, Xinhui, sfr, linux-next, airlied,
daniel.vetter, Wentland, Harry
[AMD Official Use Only]
> -----Original Message-----
> From: Harry Wentland <harry.wentland@amd.com>
> Sent: September 28, 2021 1:08 PM
> To: Deucher, Alexander <Alexander.Deucher@amd.com>; amd-
> gfx@lists.freedesktop.org; Zuo, Jerry <Jerry.Zuo@amd.com>
> Cc: jani.nikula@intel.com; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>;
> nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> manasi.d.navare@intel.com; Koenig, Christian <Christian.Koenig@amd.com>;
> Pan, Xinhui <Xinhui.Pan@amd.com>; sfr@canb.auug.org.au; linux-
> next@vger.kernel.org; airlied@gmail.com; daniel.vetter@ffwll.ch; Wentland,
> Harry <Harry.Wentland@amd.com>
> Subject: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not
> already defined
>
> [Why]
> For some reason we're defining DP 2.0 definitions inside our driver. Now that
> patches to introduce relevant definitions are slated to be merged into drm-
> next this is causing conflicts.
>
> In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
> ./include/drm/drm_dp_helper.h:1322:9: error:
> 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-
> Werror,-Wmacro-redefined]
> ^
> ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note:
> previous definition is here
> ^
> 1 error generated.
>
> v2: Add one missing endif
>
> [How]
> Guard all display driver defines with #ifndef for now. Once we pull in the new
> definitions into amd-staging-drm-next we will follow up and drop definitions
> from our driver and provide follow-up header updates for any addition DP
> 2.0 definitions required by our driver.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54
> ++++++++++++++++++--
> 1 file changed, 49 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> index a5e798b5da79..9de86ff5ef1b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> @@ -860,28 +860,72 @@ struct psr_caps {
> };
>
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
> #define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
> +#endif
> +#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
> #define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
> +#endif
> +#ifndef DP_FEC_CAPABILITY_1
> #define DP_FEC_CAPABILITY_1 0x091
> +#endif
> +#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
> +#endif
> +#ifndef DP_DSC_CONFIGURATION
> #define DP_DSC_CONFIGURATION 0x161
> +#endif
> +#ifndef DP_PHY_SQUARE_PATTERN
> #define DP_PHY_SQUARE_PATTERN 0x249
> +#endif
> +#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
> #define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> 0x2216
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
> #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> 0X2250
> +#endif
> +#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
> #define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
> +#endif
> +#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> #define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> 0x2270
> -# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> -# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> -# define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
> +#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_MASK
> +#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_SHIFT
> +#define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
> #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
> #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
> +#endif
> +#ifndef DP_PHY_REPEATER_128b_132b_RATES
> #define DP_PHY_REPEATER_128b_132b_RATES
> 0xF0007
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> 0xF0022
> +#endif
> +#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
> #define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
> +#endif
> /* TODO - Use DRM header to replace above once available */
>
> union dp_main_line_channel_coding_cap {
> --
> 2.33.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
@ 2021-09-28 17:41 ` Zuo, Jerry
0 siblings, 0 replies; 12+ messages in thread
From: Zuo, Jerry @ 2021-09-28 17:41 UTC (permalink / raw)
To: Wentland, Harry, Deucher, Alexander, amd-gfx
Cc: jani.nikula, Li, Sun peng (Leo),
nathan, intel-gfx, dri-devel, ville.syrjala, manasi.d.navare,
Koenig, Christian, Pan, Xinhui, sfr, linux-next, airlied,
daniel.vetter, Wentland, Harry
[AMD Official Use Only]
> -----Original Message-----
> From: Harry Wentland <harry.wentland@amd.com>
> Sent: September 28, 2021 1:08 PM
> To: Deucher, Alexander <Alexander.Deucher@amd.com>; amd-
> gfx@lists.freedesktop.org; Zuo, Jerry <Jerry.Zuo@amd.com>
> Cc: jani.nikula@intel.com; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>;
> nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> manasi.d.navare@intel.com; Koenig, Christian <Christian.Koenig@amd.com>;
> Pan, Xinhui <Xinhui.Pan@amd.com>; sfr@canb.auug.org.au; linux-
> next@vger.kernel.org; airlied@gmail.com; daniel.vetter@ffwll.ch; Wentland,
> Harry <Harry.Wentland@amd.com>
> Subject: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not
> already defined
>
> [Why]
> For some reason we're defining DP 2.0 definitions inside our driver. Now that
> patches to introduce relevant definitions are slated to be merged into drm-
> next this is causing conflicts.
>
> In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
> ./include/drm/drm_dp_helper.h:1322:9: error:
> 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-
> Werror,-Wmacro-redefined]
> ^
> ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note:
> previous definition is here
> ^
> 1 error generated.
>
> v2: Add one missing endif
>
> [How]
> Guard all display driver defines with #ifndef for now. Once we pull in the new
> definitions into amd-staging-drm-next we will follow up and drop definitions
> from our driver and provide follow-up header updates for any addition DP
> 2.0 definitions required by our driver.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54
> ++++++++++++++++++--
> 1 file changed, 49 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> index a5e798b5da79..9de86ff5ef1b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> @@ -860,28 +860,72 @@ struct psr_caps {
> };
>
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
> #define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
> +#endif
> +#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
> #define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
> +#endif
> +#ifndef DP_FEC_CAPABILITY_1
> #define DP_FEC_CAPABILITY_1 0x091
> +#endif
> +#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
> +#endif
> +#ifndef DP_DSC_CONFIGURATION
> #define DP_DSC_CONFIGURATION 0x161
> +#endif
> +#ifndef DP_PHY_SQUARE_PATTERN
> #define DP_PHY_SQUARE_PATTERN 0x249
> +#endif
> +#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
> #define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> 0x2216
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
> #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> 0X2250
> +#endif
> +#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
> #define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
> +#endif
> +#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> #define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> 0x2270
> -# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> -# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> -# define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
> +#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_MASK
> +#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_SHIFT
> +#define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
> #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
> #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
> +#endif
> +#ifndef DP_PHY_REPEATER_128b_132b_RATES
> #define DP_PHY_REPEATER_128b_132b_RATES
> 0xF0007
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> 0xF0022
> +#endif
> +#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
> #define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
> +#endif
> /* TODO - Use DRM header to replace above once available */
>
> union dp_main_line_channel_coding_cap {
> --
> 2.33.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-28 17:08 ` [Intel-gfx] " Harry Wentland
(?)
(?)
@ 2021-09-28 18:34 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-09-28 18:34 UTC (permalink / raw)
To: Harry Wentland; +Cc: intel-gfx
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b1d56d1bac26 drm/amd/display: Only define DP 2.0 symbols if not already defined
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#14:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
total: 0 errors, 1 warnings, 0 checks, 77 lines checked
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-28 17:08 ` [Intel-gfx] " Harry Wentland
` (2 preceding siblings ...)
(?)
@ 2021-09-28 18:37 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-09-28 18:37 UTC (permalink / raw)
To: Harry Wentland; +Cc: intel-gfx
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
-
-
-
-
-
- #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
- #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
- #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
- #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
- #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
- #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xf0006 /* 2.0 */
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: this was the original definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: warning: preprocessor token DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER redefined
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
-./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881: note: this is the location of the previous definition
-./drivers/gpu/drm/amd/amdgpu/../d
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-28 17:08 ` [Intel-gfx] " Harry Wentland
` (3 preceding siblings ...)
(?)
@ 2021-09-28 19:04 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-09-28 19:04 UTC (permalink / raw)
To: Harry Wentland; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5745 bytes --]
== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655 -> Patchwork_21178
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/index.html
Known issues
------------
Here are the changes found in Patchwork_21178 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-sdma:
- fi-kbl-7500u: NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-7500u/igt@amdgpu/amd_basic@cs-sdma.html
* igt@amdgpu/amd_basic@semaphore:
- fi-bsw-nick: NOTRUN -> [SKIP][2] ([fdo#109271]) +17 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-bsw-nick/igt@amdgpu/amd_basic@semaphore.html
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600: NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271]) +8 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][6] ([i915#1886] / [i915#2291])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-7500u: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#533])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-7500u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [INCOMPLETE][10] ([i915#3921]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-nick: [DMESG-FAIL][12] ([i915#2927] / [i915#3428]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-kbl-7500u: [FAIL][14] ([i915#1161]) -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
#### Warnings ####
* igt@kms_chamelium@vga-hpd-fast:
- fi-kbl-7500u: [{ABORT}][16] ([i915#1814]) -> [SKIP][17] ([fdo#109271])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/fi-kbl-7500u/igt@kms_chamelium@vga-hpd-fast.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/fi-kbl-7500u/igt@kms_chamelium@vga-hpd-fast.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1161]: https://gitlab.freedesktop.org/drm/intel/issues/1161
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
[i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (45 -> 37)
------------------------------
Additional (1): fi-kbl-soraka
Missing (9): fi-ilk-m540 bat-adls-5 bat-dg1-6 fi-hsw-4200u fi-bsw-cyan bat-adlp-4 fi-ctg-p8600 bat-jsl-2 bat-jsl-1
Build changes
-------------
* Linux: CI_DRM_10655 -> Patchwork_21178
CI-20190529: 20190529
CI_DRM_10655: 88d6ecae86a7bb32e8bf2bd233f7f9f9c8bd7abc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6226: 18278534c085c35adcf62f158a8d5356e5496f8d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21178: b1d56d1bac267954b8bcd7c4cd4dceac87ed8677 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b1d56d1bac26 drm/amd/display: Only define DP 2.0 symbols if not already defined
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/index.html
[-- Attachment #2: Type: text/html, Size: 7253 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-28 17:08 ` [Intel-gfx] " Harry Wentland
` (4 preceding siblings ...)
(?)
@ 2021-09-28 21:07 ` Patchwork
-1 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2021-09-28 21:07 UTC (permalink / raw)
To: Harry Wentland; +Cc: intel-gfx
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== Series Details ==
Series: drm/amd/display: Only define DP 2.0 symbols if not already defined
URL : https://patchwork.freedesktop.org/series/95164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10655_full -> Patchwork_21178_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_21178_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@chamelium:
- shard-iclb: NOTRUN -> [SKIP][1] ([fdo#111827])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@feature_discovery@chamelium.html
* igt@gem_ctx_param@set-priority-not-supported:
- shard-iclb: NOTRUN -> [SKIP][2] ([fdo#109314])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@gem_ctx_param@set-priority-not-supported.html
* igt@gem_ctx_persistence@smoketest:
- shard-iclb: [PASS][3] -> [FAIL][4] ([i915#2896])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb2/igt@gem_ctx_persistence@smoketest.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb4/igt@gem_ctx_persistence@smoketest.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][5] -> [TIMEOUT][6] ([i915#2369] / [i915#3063] / [i915#3648])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-tglb8/igt@gem_eio@unwedge-stress.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb5/igt@gem_eio@unwedge-stress.html
- shard-iclb: [PASS][7] -> [TIMEOUT][8] ([i915#2369] / [i915#2481] / [i915#3070])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb1/igt@gem_eio@unwedge-stress.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb5/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2846])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-kbl1/igt@gem_exec_fair@basic-deadline.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl4/igt@gem_exec_fair@basic-deadline.html
- shard-apl: NOTRUN -> [FAIL][11] ([i915#2846])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: [PASS][12] -> [FAIL][13] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-kbl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][14] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_params@dr1-dirt:
- shard-glk: [PASS][17] -> [DMESG-WARN][18] ([i915#118] / [i915#95]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-glk5/igt@gem_exec_params@dr1-dirt.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@gem_exec_params@dr1-dirt.html
* igt@gem_exec_params@no-bsd:
- shard-tglb: NOTRUN -> [SKIP][19] ([fdo#109283])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@gem_exec_params@no-bsd.html
* igt@gem_exec_params@secure-non-root:
- shard-tglb: NOTRUN -> [SKIP][20] ([fdo#112283])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@gem_exec_params@secure-non-root.html
* igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-snb: [PASS][21] -> [DMESG-FAIL][22] ([i915#4123])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-snb2/igt@gem_ppgtt@blt-vs-render-ctxn.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-snb7/igt@gem_ppgtt@blt-vs-render-ctxn.html
* igt@gem_pwrite@basic-exhaustion:
- shard-kbl: NOTRUN -> [WARN][23] ([i915#2658])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl3/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@input-checking:
- shard-snb: NOTRUN -> [DMESG-WARN][24] ([i915#3002])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-snb2/igt@gem_userptr_blits@input-checking.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-iclb: NOTRUN -> [SKIP][25] ([i915#3297])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@gem_userptr_blits@unsync-overlap.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][26] -> [DMESG-WARN][27] ([i915#180])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl1/igt@gem_workarounds@suspend-resume-context.html
* igt@gen7_exec_parse@basic-allocation:
- shard-glk: NOTRUN -> [SKIP][28] ([fdo#109271]) +33 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@gen7_exec_parse@basic-allocation.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][29] -> [DMESG-WARN][30] ([i915#1436] / [i915#716])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl8/igt@gen9_exec_parse@allowed-single.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl4/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@unaligned-jump:
- shard-tglb: NOTRUN -> [SKIP][31] ([i915#2856])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@gen9_exec_parse@unaligned-jump.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#658]) +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_rpm@dpms-non-lpsp:
- shard-iclb: NOTRUN -> [SKIP][33] ([fdo#110892])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@i915_pm_rpm@dpms-non-lpsp.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][34] ([fdo#110725] / [fdo#111614])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][35] ([fdo#111614])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-kbl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-glk: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-iclb: NOTRUN -> [SKIP][38] ([fdo#110723])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3777])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_joiner@invalid-modeset:
- shard-tglb: NOTRUN -> [SKIP][40] ([i915#2705])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +11 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl1/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][43] ([i915#3689] / [i915#3886])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +4 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#3689]) +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs.html
* igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs:
- shard-apl: NOTRUN -> [SKIP][46] ([fdo#109271]) +136 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs.html
* igt@kms_chamelium@dp-crc-single:
- shard-iclb: NOTRUN -> [SKIP][47] ([fdo#109284] / [fdo#111827]) +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_chamelium@dp-crc-single.html
* igt@kms_chamelium@hdmi-hpd-storm:
- shard-kbl: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +19 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl1/igt@kms_chamelium@hdmi-hpd-storm.html
* igt@kms_chamelium@hdmi-mode-timings:
- shard-snb: NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +9 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-snb5/igt@kms_chamelium@hdmi-mode-timings.html
* igt@kms_chamelium@vga-edid-read:
- shard-apl: NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +9 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl3/igt@kms_chamelium@vga-edid-read.html
* igt@kms_color@pipe-b-ctm-red-to-blue:
- shard-skl: [PASS][51] -> [DMESG-WARN][52] ([i915#1982])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl1/igt@kms_color@pipe-b-ctm-red-to-blue.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl5/igt@kms_color@pipe-b-ctm-red-to-blue.html
* igt@kms_color@pipe-d-ctm-0-25:
- shard-iclb: NOTRUN -> [SKIP][53] ([fdo#109278] / [i915#1149])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_color@pipe-d-ctm-0-25.html
* igt@kms_color_chamelium@pipe-a-ctm-green-to-red:
- shard-glk: NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +3 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@kms_color_chamelium@pipe-a-ctm-green-to-red.html
* igt@kms_color_chamelium@pipe-c-ctm-0-25:
- shard-tglb: NOTRUN -> [SKIP][55] ([fdo#109284] / [fdo#111827]) +5 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_color_chamelium@pipe-c-ctm-0-25.html
* igt@kms_content_protection@atomic:
- shard-kbl: NOTRUN -> [TIMEOUT][56] ([i915#1319]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl4/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-tglb: NOTRUN -> [SKIP][57] ([i915#3116]) +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@mei_interface:
- shard-tglb: NOTRUN -> [SKIP][58] ([fdo#111828])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_content_protection@mei_interface.html
* igt@kms_cursor_crc@pipe-a-cursor-32x10-random:
- shard-tglb: NOTRUN -> [SKIP][59] ([i915#3359])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-32x10-random.html
* igt@kms_cursor_crc@pipe-d-cursor-512x170-offscreen:
- shard-tglb: NOTRUN -> [SKIP][60] ([fdo#109279] / [i915#3359]) +3 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_cursor_crc@pipe-d-cursor-512x170-offscreen.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][61] -> [FAIL][62] ([i915#2346])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: NOTRUN -> [INCOMPLETE][63] ([i915#180] / [i915#1982])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-skl: NOTRUN -> [SKIP][64] ([fdo#109271])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-iclb: NOTRUN -> [SKIP][65] ([fdo#109274]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [PASS][66] -> [FAIL][67] ([i915#79])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: NOTRUN -> [DMESG-WARN][68] ([i915#180]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl3/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_flip@flip-vs-suspend@b-edp1:
- shard-skl: [PASS][69] -> [INCOMPLETE][70] ([i915#198])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl9/igt@kms_flip@flip-vs-suspend@b-edp1.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl9/igt@kms_flip@flip-vs-suspend@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite:
- shard-snb: NOTRUN -> [SKIP][71] ([fdo#109271]) +253 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-snb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-iclb: NOTRUN -> [SKIP][72] ([fdo#109280]) +5 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt:
- shard-tglb: NOTRUN -> [SKIP][73] ([fdo#111825]) +21 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-tglb: [PASS][74] -> [INCOMPLETE][75] ([i915#456])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-tglb2/igt@kms_frontbuffer_tracking@psr-suspend.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb7/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][76] -> [FAIL][77] ([i915#1188]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl6/igt@kms_hdr@bpc-switch-dpms.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#533])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-kbl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#533]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl1/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-glk: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#533])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][81] -> [DMESG-WARN][82] ([i915#180])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-apl: NOTRUN -> [FAIL][83] ([fdo#108145] / [i915#265])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl2/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-basic:
- shard-kbl: NOTRUN -> [FAIL][84] ([fdo#108145] / [i915#265]) +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-d-constant-alpha-max:
- shard-iclb: NOTRUN -> [SKIP][85] ([fdo#109278]) +4 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_plane_alpha_blend@pipe-d-constant-alpha-max.html
* igt@kms_plane_lowres@pipe-b-tiling-none:
- shard-tglb: NOTRUN -> [SKIP][86] ([i915#3536]) +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-none.html
* igt@kms_plane_lowres@pipe-d-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][87] ([fdo#112054]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_plane_lowres@pipe-d-tiling-yf.html
* igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
- shard-apl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2733])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl2/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html
* igt@kms_prime@basic-crc@first-to-second:
- shard-tglb: NOTRUN -> [SKIP][89] ([i915#1836])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_prime@basic-crc@first-to-second.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
- shard-kbl: NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#658]) +4 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
- shard-iclb: NOTRUN -> [SKIP][91] ([i915#658])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
- shard-tglb: NOTRUN -> [SKIP][92] ([i915#2920])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-glk: NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#658])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-tglb: NOTRUN -> [FAIL][94] ([i915#132] / [i915#3467])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][95] -> [SKIP][96] ([fdo#109441]) +1 similar issue
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb5/igt@kms_psr@psr2_primary_page_flip.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-tglb: NOTRUN -> [SKIP][97] ([fdo#111615]) +4 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][98] ([IGT#2])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@kms_sysfs_edid_timing.html
* igt@kms_writeback@writeback-fb-id:
- shard-tglb: NOTRUN -> [SKIP][99] ([i915#2437])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_writeback@writeback-fb-id.html
* igt@prime_nv_pcopy@test2:
- shard-kbl: NOTRUN -> [SKIP][100] ([fdo#109271]) +212 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl1/igt@prime_nv_pcopy@test2.html
* igt@prime_nv_pcopy@test3_2:
- shard-tglb: NOTRUN -> [SKIP][101] ([fdo#109291])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@prime_nv_pcopy@test3_2.html
* igt@prime_vgem@basic-userptr:
- shard-tglb: NOTRUN -> [SKIP][102] ([i915#3301])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@prime_vgem@basic-userptr.html
* igt@prime_vgem@fence-read-hang:
- shard-tglb: NOTRUN -> [SKIP][103] ([fdo#109295])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@prime_vgem@fence-read-hang.html
* igt@sysfs_clients@create:
- shard-glk: NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#2994])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@sysfs_clients@create.html
* igt@sysfs_clients@fair-0:
- shard-apl: NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#2994]) +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl8/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@sema-25:
- shard-tglb: NOTRUN -> [SKIP][106] ([i915#2994]) +1 similar issue
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@sysfs_clients@sema-25.html
* igt@sysfs_clients@split-50:
- shard-kbl: NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#2994]) +4 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl3/igt@sysfs_clients@split-50.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [FAIL][108] ([i915#2842]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-apl3/igt@gem_exec_fair@basic-none@vcs0.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl7/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][110] ([i915#2842]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-tglb8/igt@gem_exec_fair@basic-pace-share@rcs0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-iclb: [FAIL][112] ([i915#2842]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb6/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_parallel@fds@vecs0:
- shard-iclb: [INCOMPLETE][114] ([i915#1895]) -> [PASS][115]
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb7/igt@gem_exec_parallel@fds@vecs0.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@gem_exec_parallel@fds@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][116] ([i915#2190]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-tglb7/igt@gem_huc_copy@huc-copy.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb3/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_offset@bad-flags:
- shard-glk: [DMESG-WARN][118] ([i915#118] / [i915#95]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-glk5/igt@gem_mmap_offset@bad-flags.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-glk7/igt@gem_mmap_offset@bad-flags.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [FAIL][120] ([i915#454]) -> [PASS][121] +1 similar issue
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb1/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_color@pipe-c-ctm-0-25:
- shard-skl: [DMESG-WARN][122] ([i915#1982]) -> [PASS][123] +2 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl6/igt@kms_color@pipe-c-ctm-0-25.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl2/igt@kms_color@pipe-c-ctm-0-25.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-tglb: [INCOMPLETE][124] ([i915#2411] / [i915#4173] / [i915#456]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-tglb7/igt@kms_fbcon_fbt@fbc-suspend.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-tglb8/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [FAIL][126] ([i915#2122]) -> [PASS][127] +2 similar issues
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile:
- shard-iclb: [SKIP][128] ([i915#3701]) -> [PASS][129] +1 similar issue
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-iclb7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][130] ([i915#180]) -> [PASS][131] +9 similar issues
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [FAIL][132] ([i915#1188]) -> [PASS][133]
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl4/igt@kms_hdr@bpc-switch.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl10/igt@kms_hdr@bpc-switch.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [DMESG-WARN][134] ([i915#180]) -> [PASS][135] +1 similar issue
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][136] ([fdo#108145] / [i915#265]) -> [PASS][137] +3 similar issues
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10655/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb:
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21178/index.html
[-- Attachment #2: Type: text/html, Size: 33774 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-28 17:41 ` [Intel-gfx] " Zuo, Jerry
@ 2021-09-29 3:58 ` Navare, Manasi D
-1 siblings, 0 replies; 12+ messages in thread
From: Navare, Manasi D @ 2021-09-29 3:58 UTC (permalink / raw)
To: Zuo, Jerry, Wentland, Harry, Deucher, Alexander, amd-gfx
Cc: Nikula, Jani, Li, Sun peng (Leo),
nathan, intel-gfx, dri-devel, ville.syrjala, Koenig, Christian,
Pan, Xinhui, sfr, linux-next, airlied, daniel.vetter, Wentland,
Harry
We have merged such DRM definition dependencies previously through a topic branch in order to avoid redefining inside the driver.
But yes guarding this with ifdef is good.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
-----Original Message-----
From: Zuo, Jerry <Jerry.Zuo@amd.com>
Sent: Tuesday, September 28, 2021 11:11 PM
To: Wentland, Harry <Harry.Wentland@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Nikula, Jani <jani.nikula@intel.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Navare, Manasi D <manasi.d.navare@intel.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; sfr@canb.auug.org.au; linux-next@vger.kernel.org; airlied@gmail.com; daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
Subject: RE: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
[AMD Official Use Only]
> -----Original Message-----
> From: Harry Wentland <harry.wentland@amd.com>
> Sent: September 28, 2021 1:08 PM
> To: Deucher, Alexander <Alexander.Deucher@amd.com>; amd-
> gfx@lists.freedesktop.org; Zuo, Jerry <Jerry.Zuo@amd.com>
> Cc: jani.nikula@intel.com; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>;
> nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> manasi.d.navare@intel.com; Koenig, Christian
> <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>;
> sfr@canb.auug.org.au; linux- next@vger.kernel.org; airlied@gmail.com;
> daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
> Subject: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not
> already defined
>
> [Why]
> For some reason we're defining DP 2.0 definitions inside our driver.
> Now that patches to introduce relevant definitions are slated to be
> merged into drm- next this is causing conflicts.
>
> In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
> ./include/drm/drm_dp_helper.h:1322:9: error:
> 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-
> Werror,-Wmacro-redefined]
> ^
> ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note:
> previous definition is here
> ^
> 1 error generated.
>
> v2: Add one missing endif
>
> [How]
> Guard all display driver defines with #ifndef for now. Once we pull in
> the new definitions into amd-staging-drm-next we will follow up and
> drop definitions from our driver and provide follow-up header updates
> for any addition DP
> 2.0 definitions required by our driver.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54
> ++++++++++++++++++--
> 1 file changed, 49 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> index a5e798b5da79..9de86ff5ef1b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> @@ -860,28 +860,72 @@ struct psr_caps { };
>
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
> #define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
> +#endif
> +#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
> #define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
> +#endif
> +#ifndef DP_FEC_CAPABILITY_1
> #define DP_FEC_CAPABILITY_1 0x091
> +#endif
> +#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
> +#endif
> +#ifndef DP_DSC_CONFIGURATION
> #define DP_DSC_CONFIGURATION 0x161
> +#endif
> +#ifndef DP_PHY_SQUARE_PATTERN
> #define DP_PHY_SQUARE_PATTERN 0x249
> +#endif
> +#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
> #define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> 0x2216
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
> #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> 0X2250
> +#endif
> +#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
> #define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
> +#endif
> +#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> #define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> 0x2270
> -# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> -# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> -# define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
> +#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_MASK
> +#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_SHIFT
> +#define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
> #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
> #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
> +#endif
> +#ifndef DP_PHY_REPEATER_128b_132b_RATES
> #define DP_PHY_REPEATER_128b_132b_RATES
> 0xF0007
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> 0xF0022
> +#endif
> +#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
> #define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
> +#endif
> /* TODO - Use DRM header to replace above once available */
>
> union dp_main_line_channel_coding_cap {
> --
> 2.33.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
@ 2021-09-29 3:58 ` Navare, Manasi D
0 siblings, 0 replies; 12+ messages in thread
From: Navare, Manasi D @ 2021-09-29 3:58 UTC (permalink / raw)
To: Zuo, Jerry, Wentland, Harry, Deucher, Alexander, amd-gfx
Cc: Nikula, Jani, Li, Sun peng (Leo),
nathan, intel-gfx, dri-devel, ville.syrjala, Koenig, Christian,
Pan, Xinhui, sfr, linux-next, airlied, daniel.vetter, Wentland,
Harry
We have merged such DRM definition dependencies previously through a topic branch in order to avoid redefining inside the driver.
But yes guarding this with ifdef is good.
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
-----Original Message-----
From: Zuo, Jerry <Jerry.Zuo@amd.com>
Sent: Tuesday, September 28, 2021 11:11 PM
To: Wentland, Harry <Harry.Wentland@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Nikula, Jani <jani.nikula@intel.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Navare, Manasi D <manasi.d.navare@intel.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; sfr@canb.auug.org.au; linux-next@vger.kernel.org; airlied@gmail.com; daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
Subject: RE: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
[AMD Official Use Only]
> -----Original Message-----
> From: Harry Wentland <harry.wentland@amd.com>
> Sent: September 28, 2021 1:08 PM
> To: Deucher, Alexander <Alexander.Deucher@amd.com>; amd-
> gfx@lists.freedesktop.org; Zuo, Jerry <Jerry.Zuo@amd.com>
> Cc: jani.nikula@intel.com; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>;
> nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> manasi.d.navare@intel.com; Koenig, Christian
> <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>;
> sfr@canb.auug.org.au; linux- next@vger.kernel.org; airlied@gmail.com;
> daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
> Subject: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not
> already defined
>
> [Why]
> For some reason we're defining DP 2.0 definitions inside our driver.
> Now that patches to introduce relevant definitions are slated to be
> merged into drm- next this is causing conflicts.
>
> In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
> In file included
> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
> ./include/drm/drm_dp_helper.h:1322:9: error:
> 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-
> Werror,-Wmacro-redefined]
> ^
> ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note:
> previous definition is here
> ^
> 1 error generated.
>
> v2: Add one missing endif
>
> [How]
> Guard all display driver defines with #ifndef for now. Once we pull in
> the new definitions into amd-staging-drm-next we will follow up and
> drop definitions from our driver and provide follow-up header updates
> for any addition DP
> 2.0 definitions required by our driver.
>
> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54
> ++++++++++++++++++--
> 1 file changed, 49 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> index a5e798b5da79..9de86ff5ef1b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
> @@ -860,28 +860,72 @@ struct psr_caps { };
>
> #if defined(CONFIG_DRM_AMD_DC_DCN)
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
> #define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
> +#endif
> +#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
> #define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
> +#endif
> +#ifndef DP_FEC_CAPABILITY_1
> #define DP_FEC_CAPABILITY_1 0x091
> +#endif
> +#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
> +#endif
> +#ifndef DP_DSC_CONFIGURATION
> #define DP_DSC_CONFIGURATION 0x161
> +#endif
> +#ifndef DP_PHY_SQUARE_PATTERN
> #define DP_PHY_SQUARE_PATTERN 0x249
> +#endif
> +#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
> #define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL
> 0x2216
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
> #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
> +#endif
> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256
> 0X2250
> +#endif
> +#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
> #define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
> +#endif
> +#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> #define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
> 0x2270
> -# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> -# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> -# define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
> +#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
> 0)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
> (0b111 << 1)
> +#endif
> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_MASK
> +#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
> +#endif
> +#ifndef DP_DSC_DECODER_COUNT_SHIFT
> +#define DP_DSC_DECODER_COUNT_SHIFT 5
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
> #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
> +#endif
> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
> #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
> +#endif
> +#ifndef DP_PHY_REPEATER_128b_132b_RATES
> #define DP_PHY_REPEATER_128b_132b_RATES
> 0xF0007
> +#endif
> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
> 0xF0022
> +#endif
> +#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
> #define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
> +#endif
> /* TODO - Use DRM header to replace above once available */
>
> union dp_main_line_channel_coding_cap {
> --
> 2.33.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
2021-09-29 3:58 ` [Intel-gfx] " Navare, Manasi D
@ 2021-09-29 13:48 ` Harry Wentland
-1 siblings, 0 replies; 12+ messages in thread
From: Harry Wentland @ 2021-09-29 13:48 UTC (permalink / raw)
To: Navare, Manasi D, Zuo, Jerry, Deucher, Alexander, amd-gfx
Cc: Nikula, Jani, Li, Sun peng (Leo),
nathan, intel-gfx, dri-devel, ville.syrjala, Koenig, Christian,
Pan, Xinhui, sfr, linux-next, airlied, daniel.vetter
On 2021-09-28 23:58, Navare, Manasi D wrote:
> [AMD Official Use Only]
>
> We have merged such DRM definition dependencies previously through a topic branch in order to avoid redefining inside the driver.
> But yes guarding this with ifdef is good.
>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
>
Ah, I merged it already. But thanks for your review.
I agree these are better defined in drm headers, with a preparatory
patch if needed by the driver. We're working on cleaning it up and
dropping the driver defines.
Harry
> Manasi
>
> -----Original Message-----
> From: Zuo, Jerry <Jerry.Zuo@amd.com>
> Sent: Tuesday, September 28, 2021 11:11 PM
> To: Wentland, Harry <Harry.Wentland@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; amd-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Navare, Manasi D <manasi.d.navare@intel.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; sfr@canb.auug.org.au; linux-next@vger.kernel.org; airlied@gmail.com; daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
> Subject: RE: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
>
> [AMD Official Use Only]
>
>> -----Original Message-----
>> From: Harry Wentland <harry.wentland@amd.com>
>> Sent: September 28, 2021 1:08 PM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>; amd-
>> gfx@lists.freedesktop.org; Zuo, Jerry <Jerry.Zuo@amd.com>
>> Cc: jani.nikula@intel.com; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>;
>> nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-
>> devel@lists.freedesktop.org; ville.syrjala@linux.intel.com;
>> manasi.d.navare@intel.com; Koenig, Christian
>> <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>;
>> sfr@canb.auug.org.au; linux- next@vger.kernel.org; airlied@gmail.com;
>> daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
>> Subject: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not
>> already defined
>>
>> [Why]
>> For some reason we're defining DP 2.0 definitions inside our driver.
>> Now that patches to introduce relevant definitions are slated to be
>> merged into drm- next this is causing conflicts.
>>
>> In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
>> In file included
>> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
>> In file included
>> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
>> ./include/drm/drm_dp_helper.h:1322:9: error:
>> 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-
>> Werror,-Wmacro-redefined]
>> ^
>> ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note:
>> previous definition is here
>> ^
>> 1 error generated.
>>
>> v2: Add one missing endif
>>
>> [How]
>> Guard all display driver defines with #ifndef for now. Once we pull in
>> the new definitions into amd-staging-drm-next we will follow up and
>> drop definitions from our driver and provide follow-up header updates
>> for any addition DP
>> 2.0 definitions required by our driver.
>>
>> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
>
> Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
>
>> ---
>> drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54
>> ++++++++++++++++++--
>> 1 file changed, 49 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> index a5e798b5da79..9de86ff5ef1b 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> @@ -860,28 +860,72 @@ struct psr_caps { };
>>
>> #if defined(CONFIG_DRM_AMD_DC_DCN)
>> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
>> #define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
>> +#endif
>> +#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
>> #define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
>> +#endif
>> +#ifndef DP_FEC_CAPABILITY_1
>> #define DP_FEC_CAPABILITY_1 0x091
>> +#endif
>> +#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
>> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
>> +#endif
>> +#ifndef DP_DSC_CONFIGURATION
>> #define DP_DSC_CONFIGURATION 0x161
>> +#endif
>> +#ifndef DP_PHY_SQUARE_PATTERN
>> #define DP_PHY_SQUARE_PATTERN 0x249
>> +#endif
>> +#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
>> #define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
>> +#endif
>> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
>> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL
>> 0x2216
>> +#endif
>> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
>> #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
>> +#endif
>> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
>> #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256
>> 0X2250
>> +#endif
>> +#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
>> #define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
>> +#endif
>> +#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
>> #define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
>> 0x2270
>> -# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
>> 0)
>> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
>> (0b111 << 1)
>> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
>> -# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
>> -# define DP_DSC_DECODER_COUNT_SHIFT 5
>> +#endif
>> +#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
>> +#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
>> 0)
>> +#endif
>> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
>> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
>> (0b111 << 1)
>> +#endif
>> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
>> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
>> +#endif
>> +#ifndef DP_DSC_DECODER_COUNT_MASK
>> +#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
>> +#endif
>> +#ifndef DP_DSC_DECODER_COUNT_SHIFT
>> +#define DP_DSC_DECODER_COUNT_SHIFT 5
>> +#endif
>> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
>> #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
>> +#endif
>> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
>> #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
>> +#endif
>> +#ifndef DP_PHY_REPEATER_128b_132b_RATES
>> #define DP_PHY_REPEATER_128b_132b_RATES
>> 0xF0007
>> +#endif
>> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
>> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
>> 0xF0022
>> +#endif
>> +#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
>> #define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
>> +#endif
>> /* TODO - Use DRM header to replace above once available */
>>
>> union dp_main_line_channel_coding_cap {
>> --
>> 2.33.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
@ 2021-09-29 13:48 ` Harry Wentland
0 siblings, 0 replies; 12+ messages in thread
From: Harry Wentland @ 2021-09-29 13:48 UTC (permalink / raw)
To: Navare, Manasi D, Zuo, Jerry, Deucher, Alexander, amd-gfx
Cc: Nikula, Jani, Li, Sun peng (Leo),
nathan, intel-gfx, dri-devel, ville.syrjala, Koenig, Christian,
Pan, Xinhui, sfr, linux-next, airlied, daniel.vetter
On 2021-09-28 23:58, Navare, Manasi D wrote:
> [AMD Official Use Only]
>
> We have merged such DRM definition dependencies previously through a topic branch in order to avoid redefining inside the driver.
> But yes guarding this with ifdef is good.
>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
>
Ah, I merged it already. But thanks for your review.
I agree these are better defined in drm headers, with a preparatory
patch if needed by the driver. We're working on cleaning it up and
dropping the driver defines.
Harry
> Manasi
>
> -----Original Message-----
> From: Zuo, Jerry <Jerry.Zuo@amd.com>
> Sent: Tuesday, September 28, 2021 11:11 PM
> To: Wentland, Harry <Harry.Wentland@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; amd-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>; nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Navare, Manasi D <manasi.d.navare@intel.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; sfr@canb.auug.org.au; linux-next@vger.kernel.org; airlied@gmail.com; daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
> Subject: RE: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined
>
> [AMD Official Use Only]
>
>> -----Original Message-----
>> From: Harry Wentland <harry.wentland@amd.com>
>> Sent: September 28, 2021 1:08 PM
>> To: Deucher, Alexander <Alexander.Deucher@amd.com>; amd-
>> gfx@lists.freedesktop.org; Zuo, Jerry <Jerry.Zuo@amd.com>
>> Cc: jani.nikula@intel.com; Li, Sun peng (Leo) <Sunpeng.Li@amd.com>;
>> nathan@kernel.org; intel-gfx@lists.freedesktop.org; dri-
>> devel@lists.freedesktop.org; ville.syrjala@linux.intel.com;
>> manasi.d.navare@intel.com; Koenig, Christian
>> <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>;
>> sfr@canb.auug.org.au; linux- next@vger.kernel.org; airlied@gmail.com;
>> daniel.vetter@ffwll.ch; Wentland, Harry <Harry.Wentland@amd.com>
>> Subject: [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not
>> already defined
>>
>> [Why]
>> For some reason we're defining DP 2.0 definitions inside our driver.
>> Now that patches to introduce relevant definitions are slated to be
>> merged into drm- next this is causing conflicts.
>>
>> In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
>> In file included
>> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
>> In file included
>> from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
>> ./include/drm/drm_dp_helper.h:1322:9: error:
>> 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-
>> Werror,-Wmacro-redefined]
>> ^
>> ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note:
>> previous definition is here
>> ^
>> 1 error generated.
>>
>> v2: Add one missing endif
>>
>> [How]
>> Guard all display driver defines with #ifndef for now. Once we pull in
>> the new definitions into amd-staging-drm-next we will follow up and
>> drop definitions from our driver and provide follow-up header updates
>> for any addition DP
>> 2.0 definitions required by our driver.
>>
>> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
>
> Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
>
>> ---
>> drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54
>> ++++++++++++++++++--
>> 1 file changed, 49 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> index a5e798b5da79..9de86ff5ef1b 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
>> @@ -860,28 +860,72 @@ struct psr_caps { };
>>
>> #if defined(CONFIG_DRM_AMD_DC_DCN)
>> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_CAP
>> #define DP_MAIN_LINK_CHANNEL_CODING_CAP 0x006
>> +#endif
>> +#ifndef DP_SINK_VIDEO_FALLBACK_FORMATS
>> #define DP_SINK_VIDEO_FALLBACK_FORMATS 0x020
>> +#endif
>> +#ifndef DP_FEC_CAPABILITY_1
>> #define DP_FEC_CAPABILITY_1 0x091
>> +#endif
>> +#ifndef DP_DFP_CAPABILITY_EXTENSION_SUPPORT
>> #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT 0x0A3
>> +#endif
>> +#ifndef DP_DSC_CONFIGURATION
>> #define DP_DSC_CONFIGURATION 0x161
>> +#endif
>> +#ifndef DP_PHY_SQUARE_PATTERN
>> #define DP_PHY_SQUARE_PATTERN 0x249
>> +#endif
>> +#ifndef DP_128b_132b_SUPPORTED_LINK_RATES
>> #define DP_128b_132b_SUPPORTED_LINK_RATES 0x2215
>> +#endif
>> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL
>> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL
>> 0x2216
>> +#endif
>> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_7_0
>> #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0X2230
>> +#endif
>> +#ifndef DP_TEST_264BIT_CUSTOM_PATTERN_263_256
>> #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256
>> 0X2250
>> +#endif
>> +#ifndef DP_DSC_SUPPORT_AND_DECODER_COUNT
>> #define DP_DSC_SUPPORT_AND_DECODER_COUNT 0x2260
>> +#endif
>> +#ifndef DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
>> #define DP_DSC_MAX_SLICE_COUNT_AND_AGGREGATION_0
>> 0x2270
>> -# define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
>> 0)
>> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
>> (0b111 << 1)
>> -# define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
>> -# define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
>> -# define DP_DSC_DECODER_COUNT_SHIFT 5
>> +#endif
>> +#ifndef DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK
>> +#define DP_DSC_DECODER_0_MAXIMUM_SLICE_COUNT_MASK (1 <<
>> 0)
>> +#endif
>> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
>> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_MASK
>> (0b111 << 1)
>> +#endif
>> +#ifndef DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT
>> +#define DP_DSC_DECODER_0_AGGREGATION_SUPPORT_SHIFT 1
>> +#endif
>> +#ifndef DP_DSC_DECODER_COUNT_MASK
>> +#define DP_DSC_DECODER_COUNT_MASK (0b111 << 5)
>> +#endif
>> +#ifndef DP_DSC_DECODER_COUNT_SHIFT
>> +#define DP_DSC_DECODER_COUNT_SHIFT 5
>> +#endif
>> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_SET
>> #define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108
>> +#endif
>> +#ifndef DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER
>> #define DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER 0xF0006
>> +#endif
>> +#ifndef DP_PHY_REPEATER_128b_132b_RATES
>> #define DP_PHY_REPEATER_128b_132b_RATES
>> 0xF0007
>> +#endif
>> +#ifndef DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
>> #define DP_128b_132b_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1
>> 0xF0022
>> +#endif
>> +#ifndef DP_INTRA_HOP_AUX_REPLY_INDICATION
>> #define DP_INTRA_HOP_AUX_REPLY_INDICATION (1 << 3)
>> +#endif
>> /* TODO - Use DRM header to replace above once available */
>>
>> union dp_main_line_channel_coding_cap {
>> --
>> 2.33.0
>
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2021-09-29 13:48 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-28 17:08 [PATCH v2] drm/amd/display: Only define DP 2.0 symbols if not already defined Harry Wentland
2021-09-28 17:08 ` [Intel-gfx] " Harry Wentland
2021-09-28 17:41 ` Zuo, Jerry
2021-09-28 17:41 ` [Intel-gfx] " Zuo, Jerry
2021-09-29 3:58 ` Navare, Manasi D
2021-09-29 3:58 ` [Intel-gfx] " Navare, Manasi D
2021-09-29 13:48 ` Harry Wentland
2021-09-29 13:48 ` [Intel-gfx] " Harry Wentland
2021-09-28 18:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-09-28 18:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-28 19:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-28 21:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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