From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net> To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: "Linus Walleij" <linus.walleij@linaro.org>, "Rob Herring" <robh+dt@kernel.org>, openbmc@lists.ozlabs.org, "Tomer Maimon" <tmaimon77@gmail.com>, "Joel Stanley" <joel@jms.id.au>, linux-kernel@vger.kernel.org, "Andy Shevchenko" <andy.shevchenko@gmail.com>, "Avi Fishman" <avifishman70@gmail.com>, "Tali Perry" <tali.perry1@gmail.com>, "Patrick Venture" <venture@google.com>, "Nancy Yuen" <yuenn@google.com>, "Benjamin Fair" <benjaminfair@google.com>, "Jonathan Neuschäfer" <j.neuschaefer@gmx.net> Subject: [PATCH v3 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Date: Fri, 24 Dec 2021 21:09:27 +0100 [thread overview] Message-ID: <20211224200935.93817-2-j.neuschaefer@gmx.net> (raw) In-Reply-To: <20211224200935.93817-1-j.neuschaefer@gmx.net> A nuvoton,*-gcr node is present in nuvoton-common-npcm7xx.dtsi and will be added to nuvoton-wpcm450.dtsi. It is necessary for the NPCM7xx and WPCM450 pinctrl drivers, and may later be used to retrieve SoC model and version information. This patch adds a binding to describe this node. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> --- v3: - Make a few changes suggested by Rob Herring - Change name of mux-controller node to appease the linter v2: - https://lore.kernel.org/lkml/20211207210823.1975632-2-j.neuschaefer@gmx.net/ - Rename node in example to syscon@800000 - Add subnode to example v1: - https://lore.kernel.org/lkml/20210602120329.2444672-2-j.neuschaefer@gmx.net/ --- .../bindings/arm/npcm/nuvoton,gcr.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml diff --git a/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml new file mode 100644 index 0000000000000..fcb211add7d37 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Global Control Registers block in Nuvoton SoCs + +maintainers: + - Jonathan Neuschäfer <j.neuschaefer@gmx.net> + +description: + The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs + that expose misc functionality such as chip model and version information or + pinmux settings. + +properties: + compatible: + items: + - enum: + - nuvoton,wpcm450-gcr + - nuvoton,npcm750-gcr + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + gcr: syscon@800000 { + compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd"; + reg = <0x800000 0x1000>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x38 0x07>; + idle-states = <2>; + }; + }; -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net> To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: "Tomer Maimon" <tmaimon77@gmail.com>, "Avi Fishman" <avifishman70@gmail.com>, "Patrick Venture" <venture@google.com>, "Linus Walleij" <linus.walleij@linaro.org>, linux-kernel@vger.kernel.org, "Tali Perry" <tali.perry1@gmail.com>, "Andy Shevchenko" <andy.shevchenko@gmail.com>, "Rob Herring" <robh+dt@kernel.org>, "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>, openbmc@lists.ozlabs.org, "Benjamin Fair" <benjaminfair@google.com> Subject: [PATCH v3 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Date: Fri, 24 Dec 2021 21:09:27 +0100 [thread overview] Message-ID: <20211224200935.93817-2-j.neuschaefer@gmx.net> (raw) In-Reply-To: <20211224200935.93817-1-j.neuschaefer@gmx.net> A nuvoton,*-gcr node is present in nuvoton-common-npcm7xx.dtsi and will be added to nuvoton-wpcm450.dtsi. It is necessary for the NPCM7xx and WPCM450 pinctrl drivers, and may later be used to retrieve SoC model and version information. This patch adds a binding to describe this node. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> --- v3: - Make a few changes suggested by Rob Herring - Change name of mux-controller node to appease the linter v2: - https://lore.kernel.org/lkml/20211207210823.1975632-2-j.neuschaefer@gmx.net/ - Rename node in example to syscon@800000 - Add subnode to example v1: - https://lore.kernel.org/lkml/20210602120329.2444672-2-j.neuschaefer@gmx.net/ --- .../bindings/arm/npcm/nuvoton,gcr.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml diff --git a/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml new file mode 100644 index 0000000000000..fcb211add7d37 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Global Control Registers block in Nuvoton SoCs + +maintainers: + - Jonathan Neuschäfer <j.neuschaefer@gmx.net> + +description: + The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs + that expose misc functionality such as chip model and version information or + pinmux settings. + +properties: + compatible: + items: + - enum: + - nuvoton,wpcm450-gcr + - nuvoton,npcm750-gcr + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + gcr: syscon@800000 { + compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd"; + reg = <0x800000 0x1000>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x38 0x07>; + idle-states = <2>; + }; + }; -- 2.30.2
next prev parent reply other threads:[~2021-12-24 20:10 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-24 20:09 [PATCH v3 0/9] Nuvoton WPCM450 pinctrl and GPIO driver Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer [this message] 2021-12-24 20:09 ` [PATCH v3 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Jonathan Neuschäfer 2022-01-04 22:07 ` Rob Herring 2022-01-04 22:07 ` Rob Herring 2021-12-24 20:09 ` [PATCH v3 2/9] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 3/9] ARM: dts: wpcm450: Add global control registers (GCR) node Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 4/9] dt-bindings: pinctrl: Add Nuvoton WPCM450 Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2022-01-04 22:12 ` Rob Herring 2022-01-04 22:12 ` Rob Herring 2022-01-05 14:40 ` Jonathan Neuschäfer 2022-01-05 14:40 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 5/9] pinctrl: nuvoton: Add driver for WPCM450 Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 21:15 ` Andy Shevchenko 2021-12-24 21:15 ` Andy Shevchenko 2022-01-05 14:24 ` Jonathan Neuschäfer 2022-01-05 14:24 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 6/9] ARM: dts: wpcm450: Add pinctrl and GPIO nodes Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 7/9] ARM: dts: wpcm450: Add pin functions Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 8/9] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer 2021-12-24 20:09 ` [PATCH v3 9/9] ARM: dts: wpcm450: Add pinmux information to UART0 Jonathan Neuschäfer 2021-12-24 20:09 ` Jonathan Neuschäfer
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