* [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Hi,
Not tested on hardware, so please kindly test.
Bindings maintainers might need checking - taken from git log.
Changes since v2
================
1. Do not deprecate freq-table-hz, but instead update dtschema to accept
uint32-matrix. See:
https://github.com/devicetree-org/dt-schema/pull/69
2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
3. Add tags.
4. Change maintainer of qcom,ufs.
Changes since v1
================
1. Make freq-table as matrix of tuples (Nishanth).
2. New patches: convert all bindings and fix up DTS files.
3. Several minor fixes in UFS bindings.
Dependencies
============
None dependencies. The DTS patches can go independently via respective
maintainers. The dt-bindings patches could go via UFS tree.
Best regards,
Krzysztof
Krzysztof Kozlowski (12):
dt-bindings: ufs: add common platform bindings
dt-bindings: ufs: samsung,exynos-ufs: use common bindings
dt-bindings: ufs: cdns,ufshc: convert to dtschema
dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
dt-bindings: ufs: qcom,ufs: convert to dtschema
dt-bindings: ufs: hisilicon,ufs: convert to dtschema
dt-bindings: ufs: mediatek,ufs: convert to dtschema
dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
arm64: dts: qcom: msm8996: drop unsupported UFS
vddp-ref-clk-max-microamp
arm64: dts: qcom: msm8996: correct UFS compatible
arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++
.../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++
.../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
.../bindings/ufs/samsung,exynos-ufs.yaml | 13 +-
.../bindings/ufs/snps,tc-dwc-g210.yaml | 51 ++++
.../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 --
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
.../devicetree/bindings/ufs/ufs-common.yaml | 82 ++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---
.../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ----
.../devicetree/bindings/ufs/ufs-qcom.txt | 63 -----
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
MAINTAINERS | 1 +
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 +-
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
.../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 -
20 files changed, 614 insertions(+), 320 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
--
2.32.0
^ permalink raw reply [flat|nested] 61+ messages in thread
* [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Hi,
Not tested on hardware, so please kindly test.
Bindings maintainers might need checking - taken from git log.
Changes since v2
================
1. Do not deprecate freq-table-hz, but instead update dtschema to accept
uint32-matrix. See:
https://github.com/devicetree-org/dt-schema/pull/69
2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
3. Add tags.
4. Change maintainer of qcom,ufs.
Changes since v1
================
1. Make freq-table as matrix of tuples (Nishanth).
2. New patches: convert all bindings and fix up DTS files.
3. Several minor fixes in UFS bindings.
Dependencies
============
None dependencies. The DTS patches can go independently via respective
maintainers. The dt-bindings patches could go via UFS tree.
Best regards,
Krzysztof
Krzysztof Kozlowski (12):
dt-bindings: ufs: add common platform bindings
dt-bindings: ufs: samsung,exynos-ufs: use common bindings
dt-bindings: ufs: cdns,ufshc: convert to dtschema
dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
dt-bindings: ufs: qcom,ufs: convert to dtschema
dt-bindings: ufs: hisilicon,ufs: convert to dtschema
dt-bindings: ufs: mediatek,ufs: convert to dtschema
dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
arm64: dts: qcom: msm8996: drop unsupported UFS
vddp-ref-clk-max-microamp
arm64: dts: qcom: msm8996: correct UFS compatible
arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++
.../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++
.../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
.../bindings/ufs/samsung,exynos-ufs.yaml | 13 +-
.../bindings/ufs/snps,tc-dwc-g210.yaml | 51 ++++
.../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 --
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
.../devicetree/bindings/ufs/ufs-common.yaml | 82 ++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---
.../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ----
.../devicetree/bindings/ufs/ufs-qcom.txt | 63 -----
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
MAINTAINERS | 1 +
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 +-
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
.../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 -
20 files changed, 614 insertions(+), 320 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Hi,
Not tested on hardware, so please kindly test.
Bindings maintainers might need checking - taken from git log.
Changes since v2
================
1. Do not deprecate freq-table-hz, but instead update dtschema to accept
uint32-matrix. See:
https://github.com/devicetree-org/dt-schema/pull/69
2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
3. Add tags.
4. Change maintainer of qcom,ufs.
Changes since v1
================
1. Make freq-table as matrix of tuples (Nishanth).
2. New patches: convert all bindings and fix up DTS files.
3. Several minor fixes in UFS bindings.
Dependencies
============
None dependencies. The DTS patches can go independently via respective
maintainers. The dt-bindings patches could go via UFS tree.
Best regards,
Krzysztof
Krzysztof Kozlowski (12):
dt-bindings: ufs: add common platform bindings
dt-bindings: ufs: samsung,exynos-ufs: use common bindings
dt-bindings: ufs: cdns,ufshc: convert to dtschema
dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
dt-bindings: ufs: qcom,ufs: convert to dtschema
dt-bindings: ufs: hisilicon,ufs: convert to dtschema
dt-bindings: ufs: mediatek,ufs: convert to dtschema
dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
arm64: dts: qcom: msm8996: drop unsupported UFS
vddp-ref-clk-max-microamp
arm64: dts: qcom: msm8996: correct UFS compatible
arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++
.../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++
.../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
.../bindings/ufs/samsung,exynos-ufs.yaml | 13 +-
.../bindings/ufs/snps,tc-dwc-g210.yaml | 51 ++++
.../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 --
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
.../devicetree/bindings/ufs/ufs-common.yaml | 82 ++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---
.../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ----
.../devicetree/bindings/ufs/ufs-qcom.txt | 63 -----
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
MAINTAINERS | 1 +
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 +-
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
.../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 -
20 files changed, 614 insertions(+), 320 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Add bindings for common parts (platform) of Universal Flash Storage
(UFS) Host Controllers in dtschema format.
Include also the bindings directory in the UFS maintainers entry.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../devicetree/bindings/ufs/ufs-common.yaml | 82 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 83 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
new file mode 100644
index 000000000000..47a4e9e1a775
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/ufs-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common properties for Universal Flash Storage (UFS) Host Controllers
+
+maintainers:
+ - Alim Akhtar <alim.akhtar@samsung.com>
+ - Avri Altman <avri.altman@wdc.com>
+
+properties:
+ clocks: true
+
+ clock-names: true
+
+ freq-table-hz:
+ items:
+ items:
+ - description: Minimum frequency for given clock in Hz
+ - description: Maximum frequency for given clock in Hz
+ description: |
+ Array of <min max> operating frequencies in Hz stored in the same order
+ as the clocks property. If this property is not defined or a value in the
+ array is "0" then it is assumed that the frequency is set by the parent
+ clock or a fixed rate clock source.
+
+ interrupts:
+ maxItems: 1
+
+ lanes-per-direction:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2]
+ default: 2
+ description:
+ Number of lanes available per direction. Note that it is assume same
+ number of lanes is used both directions at once.
+
+ vdd-hba-supply:
+ description:
+ Phandle to UFS host controller supply regulator node.
+
+ vcc-supply:
+ description:
+ Phandle to VCC supply regulator node.
+
+ vccq-supply:
+ description:
+ Phandle to VCCQ supply regulator node.
+
+ vccq2-supply:
+ description:
+ Phandle to VCCQ2 supply regulator node.
+
+ vcc-supply-1p8:
+ type: boolean
+ description:
+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This
+ boolean property when set, specifies to use low voltage range of
+ 1.7-1.95V. Note for external UFS cards this property is invalid and valid
+ VCC range is always 2.7-3.6V.
+
+ vcc-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCC supply.
+
+ vccq-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ supply.
+
+ vccq2-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ2 supply.
+
+dependencies:
+ freq-table-hz: [ 'clocks' ]
+
+required:
+ - interrupts
+
+additionalProperties: true
diff --git a/MAINTAINERS b/MAINTAINERS
index d7ea92ce1b1d..ef16268b6ca6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20100,6 +20100,7 @@ R: Alim Akhtar <alim.akhtar@samsung.com>
R: Avri Altman <avri.altman@wdc.com>
L: linux-scsi@vger.kernel.org
S: Supported
+F: Documentation/devicetree/bindings/ufs/
F: Documentation/scsi/ufs.rst
F: drivers/scsi/ufs/
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Add bindings for common parts (platform) of Universal Flash Storage
(UFS) Host Controllers in dtschema format.
Include also the bindings directory in the UFS maintainers entry.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../devicetree/bindings/ufs/ufs-common.yaml | 82 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 83 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
new file mode 100644
index 000000000000..47a4e9e1a775
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/ufs-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common properties for Universal Flash Storage (UFS) Host Controllers
+
+maintainers:
+ - Alim Akhtar <alim.akhtar@samsung.com>
+ - Avri Altman <avri.altman@wdc.com>
+
+properties:
+ clocks: true
+
+ clock-names: true
+
+ freq-table-hz:
+ items:
+ items:
+ - description: Minimum frequency for given clock in Hz
+ - description: Maximum frequency for given clock in Hz
+ description: |
+ Array of <min max> operating frequencies in Hz stored in the same order
+ as the clocks property. If this property is not defined or a value in the
+ array is "0" then it is assumed that the frequency is set by the parent
+ clock or a fixed rate clock source.
+
+ interrupts:
+ maxItems: 1
+
+ lanes-per-direction:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2]
+ default: 2
+ description:
+ Number of lanes available per direction. Note that it is assume same
+ number of lanes is used both directions at once.
+
+ vdd-hba-supply:
+ description:
+ Phandle to UFS host controller supply regulator node.
+
+ vcc-supply:
+ description:
+ Phandle to VCC supply regulator node.
+
+ vccq-supply:
+ description:
+ Phandle to VCCQ supply regulator node.
+
+ vccq2-supply:
+ description:
+ Phandle to VCCQ2 supply regulator node.
+
+ vcc-supply-1p8:
+ type: boolean
+ description:
+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This
+ boolean property when set, specifies to use low voltage range of
+ 1.7-1.95V. Note for external UFS cards this property is invalid and valid
+ VCC range is always 2.7-3.6V.
+
+ vcc-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCC supply.
+
+ vccq-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ supply.
+
+ vccq2-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ2 supply.
+
+dependencies:
+ freq-table-hz: [ 'clocks' ]
+
+required:
+ - interrupts
+
+additionalProperties: true
diff --git a/MAINTAINERS b/MAINTAINERS
index d7ea92ce1b1d..ef16268b6ca6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20100,6 +20100,7 @@ R: Alim Akhtar <alim.akhtar@samsung.com>
R: Avri Altman <avri.altman@wdc.com>
L: linux-scsi@vger.kernel.org
S: Supported
+F: Documentation/devicetree/bindings/ufs/
F: Documentation/scsi/ufs.rst
F: drivers/scsi/ufs/
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Add bindings for common parts (platform) of Universal Flash Storage
(UFS) Host Controllers in dtschema format.
Include also the bindings directory in the UFS maintainers entry.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
.../devicetree/bindings/ufs/ufs-common.yaml | 82 +++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 83 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
new file mode 100644
index 000000000000..47a4e9e1a775
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/ufs-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common properties for Universal Flash Storage (UFS) Host Controllers
+
+maintainers:
+ - Alim Akhtar <alim.akhtar@samsung.com>
+ - Avri Altman <avri.altman@wdc.com>
+
+properties:
+ clocks: true
+
+ clock-names: true
+
+ freq-table-hz:
+ items:
+ items:
+ - description: Minimum frequency for given clock in Hz
+ - description: Maximum frequency for given clock in Hz
+ description: |
+ Array of <min max> operating frequencies in Hz stored in the same order
+ as the clocks property. If this property is not defined or a value in the
+ array is "0" then it is assumed that the frequency is set by the parent
+ clock or a fixed rate clock source.
+
+ interrupts:
+ maxItems: 1
+
+ lanes-per-direction:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2]
+ default: 2
+ description:
+ Number of lanes available per direction. Note that it is assume same
+ number of lanes is used both directions at once.
+
+ vdd-hba-supply:
+ description:
+ Phandle to UFS host controller supply regulator node.
+
+ vcc-supply:
+ description:
+ Phandle to VCC supply regulator node.
+
+ vccq-supply:
+ description:
+ Phandle to VCCQ supply regulator node.
+
+ vccq2-supply:
+ description:
+ Phandle to VCCQ2 supply regulator node.
+
+ vcc-supply-1p8:
+ type: boolean
+ description:
+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This
+ boolean property when set, specifies to use low voltage range of
+ 1.7-1.95V. Note for external UFS cards this property is invalid and valid
+ VCC range is always 2.7-3.6V.
+
+ vcc-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCC supply.
+
+ vccq-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ supply.
+
+ vccq2-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ2 supply.
+
+dependencies:
+ freq-table-hz: [ 'clocks' ]
+
+required:
+ - interrupts
+
+additionalProperties: true
diff --git a/MAINTAINERS b/MAINTAINERS
index d7ea92ce1b1d..ef16268b6ca6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20100,6 +20100,7 @@ R: Alim Akhtar <alim.akhtar@samsung.com>
R: Avri Altman <avri.altman@wdc.com>
L: linux-scsi@vger.kernel.org
S: Supported
+F: Documentation/devicetree/bindings/ufs/
F: Documentation/scsi/ufs.rst
F: drivers/scsi/ufs/
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common bindings
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Use common UFS bindings in Samsung Exynos UFS to cover generic/common
properties in DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index 95ac1c18334d..c949eb617313 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -11,12 +11,11 @@ maintainers:
description: |
Each Samsung UFS host controller instance should have its own node.
- This binding define Samsung specific binding other then what is used
- in the common ufshcd bindings
- [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
-properties:
+allOf:
+ - $ref: ufs-common.yaml
+properties:
compatible:
enum:
- samsung,exynos7-ufs
@@ -47,9 +46,6 @@ properties:
- const: core_clk
- const: sclk_unipro_main
- interrupts:
- maxItems: 1
-
phys:
maxItems: 1
@@ -67,13 +63,12 @@ properties:
required:
- compatible
- reg
- - interrupts
- phys
- phy-names
- clocks
- clock-names
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 02/12] dt-bindings: ufs: samsung, exynos-ufs: use common bindings
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Use common UFS bindings in Samsung Exynos UFS to cover generic/common
properties in DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index 95ac1c18334d..c949eb617313 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -11,12 +11,11 @@ maintainers:
description: |
Each Samsung UFS host controller instance should have its own node.
- This binding define Samsung specific binding other then what is used
- in the common ufshcd bindings
- [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
-properties:
+allOf:
+ - $ref: ufs-common.yaml
+properties:
compatible:
enum:
- samsung,exynos7-ufs
@@ -47,9 +46,6 @@ properties:
- const: core_clk
- const: sclk_unipro_main
- interrupts:
- maxItems: 1
-
phys:
maxItems: 1
@@ -67,13 +63,12 @@ properties:
required:
- compatible
- reg
- - interrupts
- phys
- phy-names
- clocks
- clock-names
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 02/12] dt-bindings: ufs: samsung, exynos-ufs: use common bindings
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Use common UFS bindings in Samsung Exynos UFS to cover generic/common
properties in DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index 95ac1c18334d..c949eb617313 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -11,12 +11,11 @@ maintainers:
description: |
Each Samsung UFS host controller instance should have its own node.
- This binding define Samsung specific binding other then what is used
- in the common ufshcd bindings
- [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
-properties:
+allOf:
+ - $ref: ufs-common.yaml
+properties:
compatible:
enum:
- samsung,exynos7-ufs
@@ -47,9 +46,6 @@ properties:
- const: core_clk
- const: sclk_unipro_main
- interrupts:
- maxItems: 1
-
phys:
maxItems: 1
@@ -67,13 +63,12 @@ properties:
required:
- compatible
- reg
- - interrupts
- phys
- phy-names
- clocks
- clock-names
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
3 files changed, 71 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
deleted file mode 100644
index 02347b017abd..000000000000
--- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-* Cadence Universal Flash Storage (UFS) Controller
-
-UFS nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-Please see the ufshcd-pltfrm.txt for a list of all available properties.
-
-Required properties:
-- compatible : Compatible list, contains one of the following controllers:
- "cdns,ufshc" - Generic CDNS HCI,
- "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
- complemented with the JEDEC version:
- "jedec,ufs-2.0"
-
-- reg : Address and length of the UFS register set.
-- interrupts : One interrupt mapping.
-- freq-table-hz : Clock frequency table.
- See the ufshcd-pltfrm.txt for details.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "core_clk" is mandatory.
- Depending on a type of a PHY,
- the "phy_clk" clock can also be added, if needed.
-
-Example:
- ufs@fd030000 {
- compatible = "cdns,ufshc", "jedec,ufs-2.0";
- reg = <0xfd030000 0x10000>;
- interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <0 0>, <0 0>;
- clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
- clock-names = "core_clk", "phy_clk";
- };
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
new file mode 100644
index 000000000000..d227dea368be
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Jan Kotas <jank@cadence.com>
+
+# Select only our matches, not all jedec,ufs-2.0
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cdns,ufshc
+ - cdns,ufshc-m31-16nm
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - cdns,ufshc
+ # CDNS UFS HC + M31 16nm PHY
+ - cdns,ufshc-m31-16nm
+ - const: jedec,ufs-2.0
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core_clk
+ - const: phy_clk
+ - const: ref_clk
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ufs@fd030000 {
+ compatible = "cdns,ufshc", "jedec,ufs-2.0";
+ reg = <0xfd030000 0x10000>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ freq-table-hz = <0 0>, <0 0>;
+ clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
+ clock-names = "core_clk", "phy_clk";
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
index 4d13e6bc1c50..c5eca7735f76 100644
--- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
@@ -47,11 +47,10 @@ required:
patternProperties:
"^ufs@[0-9a-f]+$":
- type: object
+ $ref: cdns,ufshc.yaml
description: |
- Cadence UFS controller node must be the child node. Refer
- Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding
- documentation of child node
+ Cadence UFS controller node must be the child node.
+ unevaluatedProperties: false
additionalProperties: false
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
3 files changed, 71 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
deleted file mode 100644
index 02347b017abd..000000000000
--- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-* Cadence Universal Flash Storage (UFS) Controller
-
-UFS nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-Please see the ufshcd-pltfrm.txt for a list of all available properties.
-
-Required properties:
-- compatible : Compatible list, contains one of the following controllers:
- "cdns,ufshc" - Generic CDNS HCI,
- "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
- complemented with the JEDEC version:
- "jedec,ufs-2.0"
-
-- reg : Address and length of the UFS register set.
-- interrupts : One interrupt mapping.
-- freq-table-hz : Clock frequency table.
- See the ufshcd-pltfrm.txt for details.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "core_clk" is mandatory.
- Depending on a type of a PHY,
- the "phy_clk" clock can also be added, if needed.
-
-Example:
- ufs@fd030000 {
- compatible = "cdns,ufshc", "jedec,ufs-2.0";
- reg = <0xfd030000 0x10000>;
- interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <0 0>, <0 0>;
- clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
- clock-names = "core_clk", "phy_clk";
- };
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
new file mode 100644
index 000000000000..d227dea368be
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Jan Kotas <jank@cadence.com>
+
+# Select only our matches, not all jedec,ufs-2.0
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cdns,ufshc
+ - cdns,ufshc-m31-16nm
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - cdns,ufshc
+ # CDNS UFS HC + M31 16nm PHY
+ - cdns,ufshc-m31-16nm
+ - const: jedec,ufs-2.0
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core_clk
+ - const: phy_clk
+ - const: ref_clk
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ufs@fd030000 {
+ compatible = "cdns,ufshc", "jedec,ufs-2.0";
+ reg = <0xfd030000 0x10000>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ freq-table-hz = <0 0>, <0 0>;
+ clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
+ clock-names = "core_clk", "phy_clk";
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
index 4d13e6bc1c50..c5eca7735f76 100644
--- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
@@ -47,11 +47,10 @@ required:
patternProperties:
"^ufs@[0-9a-f]+$":
- type: object
+ $ref: cdns,ufshc.yaml
description: |
- Cadence UFS controller node must be the child node. Refer
- Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding
- documentation of child node
+ Cadence UFS controller node must be the child node.
+ unevaluatedProperties: false
additionalProperties: false
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
3 files changed, 71 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
deleted file mode 100644
index 02347b017abd..000000000000
--- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-* Cadence Universal Flash Storage (UFS) Controller
-
-UFS nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-Please see the ufshcd-pltfrm.txt for a list of all available properties.
-
-Required properties:
-- compatible : Compatible list, contains one of the following controllers:
- "cdns,ufshc" - Generic CDNS HCI,
- "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
- complemented with the JEDEC version:
- "jedec,ufs-2.0"
-
-- reg : Address and length of the UFS register set.
-- interrupts : One interrupt mapping.
-- freq-table-hz : Clock frequency table.
- See the ufshcd-pltfrm.txt for details.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "core_clk" is mandatory.
- Depending on a type of a PHY,
- the "phy_clk" clock can also be added, if needed.
-
-Example:
- ufs@fd030000 {
- compatible = "cdns,ufshc", "jedec,ufs-2.0";
- reg = <0xfd030000 0x10000>;
- interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <0 0>, <0 0>;
- clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
- clock-names = "core_clk", "phy_clk";
- };
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
new file mode 100644
index 000000000000..d227dea368be
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Jan Kotas <jank@cadence.com>
+
+# Select only our matches, not all jedec,ufs-2.0
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - cdns,ufshc
+ - cdns,ufshc-m31-16nm
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - cdns,ufshc
+ # CDNS UFS HC + M31 16nm PHY
+ - cdns,ufshc-m31-16nm
+ - const: jedec,ufs-2.0
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core_clk
+ - const: phy_clk
+ - const: ref_clk
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ufs@fd030000 {
+ compatible = "cdns,ufshc", "jedec,ufs-2.0";
+ reg = <0xfd030000 0x10000>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ freq-table-hz = <0 0>, <0 0>;
+ clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
+ clock-names = "core_clk", "phy_clk";
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
index 4d13e6bc1c50..c5eca7735f76 100644
--- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
@@ -47,11 +47,10 @@ required:
patternProperties:
"^ufs@[0-9a-f]+$":
- type: object
+ $ref: cdns,ufshc.yaml
description: |
- Cadence UFS controller node must be the child node. Refer
- Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding
- documentation of child node
+ Cadence UFS controller node must be the child node.
+ unevaluatedProperties: false
additionalProperties: false
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 04/12] dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
The Qualcomm UFS PHY bindings are documented in
bindings/phy/qcom,qmp-phy.yaml and the compatibles from separate file
bindings/ufs/ufs-qcom.txt are not used at all.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/ufs-qcom.txt | 63 -------------------
1 file changed, 63 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
deleted file mode 100644
index fd59f93e9556..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY
-
-UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro.
-Each UFS PHY node should have its own node.
-
-To bind UFS PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS PHY node.
-
-Required properties:
-- compatible : compatible list, contains one of the following -
- "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy,
- "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy,
- "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy
- present on MSM8996 chipset.
-- reg : should contain PHY register address space (mandatory),
-- reg-names : indicates various resources passed to driver (via reg proptery) by name.
- Required "reg-names" is "phy_mem".
-- #phy-cells : This property shall be set to 0
-- vdda-phy-supply : phandle to main PHY supply for analog domain
-- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ref_clk_src", "ref_clk",
- "tx_iface_clk" & "rx_iface_clk" are mandatory but
- "ref_clk_parent" is optional
-
-Optional properties:
-- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply
-- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply
-- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
-- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
-- resets : specifies the PHY reset in the UFS controller
-
-Example:
-
- ufsphy1: ufsphy@fc597000 {
- compatible = "qcom,ufs-phy-qmp-20nm";
- reg = <0xfc597000 0x800>;
- reg-names = "phy_mem";
- #phy-cells = <0>;
- vdda-phy-supply = <&pma8084_l4>;
- vdda-pll-supply = <&pma8084_l12>;
- vdda-phy-max-microamp = <50000>;
- vdda-pll-max-microamp = <1000>;
- clock-names = "ref_clk_src",
- "ref_clk_parent",
- "ref_clk",
- "tx_iface_clk",
- "rx_iface_clk";
- clocks = <&clock_rpm clk_ln_bb_clk>,
- <&clock_gcc clk_pcie_1_phy_ldo >,
- <&clock_gcc clk_ufs_phy_ldo>,
- <&clock_gcc clk_gcc_ufs_tx_cfg_clk>,
- <&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
- resets = <&ufshc 0>;
- };
-
- ufshc: ufshc@fc598000 {
- #reset-cells = <1>;
- ...
- phys = <&ufsphy1>;
- phy-names = "ufsphy";
- };
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 04/12] dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
The Qualcomm UFS PHY bindings are documented in
bindings/phy/qcom,qmp-phy.yaml and the compatibles from separate file
bindings/ufs/ufs-qcom.txt are not used at all.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/ufs-qcom.txt | 63 -------------------
1 file changed, 63 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
deleted file mode 100644
index fd59f93e9556..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY
-
-UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro.
-Each UFS PHY node should have its own node.
-
-To bind UFS PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS PHY node.
-
-Required properties:
-- compatible : compatible list, contains one of the following -
- "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy,
- "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy,
- "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy
- present on MSM8996 chipset.
-- reg : should contain PHY register address space (mandatory),
-- reg-names : indicates various resources passed to driver (via reg proptery) by name.
- Required "reg-names" is "phy_mem".
-- #phy-cells : This property shall be set to 0
-- vdda-phy-supply : phandle to main PHY supply for analog domain
-- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ref_clk_src", "ref_clk",
- "tx_iface_clk" & "rx_iface_clk" are mandatory but
- "ref_clk_parent" is optional
-
-Optional properties:
-- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply
-- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply
-- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
-- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
-- resets : specifies the PHY reset in the UFS controller
-
-Example:
-
- ufsphy1: ufsphy@fc597000 {
- compatible = "qcom,ufs-phy-qmp-20nm";
- reg = <0xfc597000 0x800>;
- reg-names = "phy_mem";
- #phy-cells = <0>;
- vdda-phy-supply = <&pma8084_l4>;
- vdda-pll-supply = <&pma8084_l12>;
- vdda-phy-max-microamp = <50000>;
- vdda-pll-max-microamp = <1000>;
- clock-names = "ref_clk_src",
- "ref_clk_parent",
- "ref_clk",
- "tx_iface_clk",
- "rx_iface_clk";
- clocks = <&clock_rpm clk_ln_bb_clk>,
- <&clock_gcc clk_pcie_1_phy_ldo >,
- <&clock_gcc clk_ufs_phy_ldo>,
- <&clock_gcc clk_gcc_ufs_tx_cfg_clk>,
- <&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
- resets = <&ufshc 0>;
- };
-
- ufshc: ufshc@fc598000 {
- #reset-cells = <1>;
- ...
- phys = <&ufsphy1>;
- phy-names = "ufsphy";
- };
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 04/12] dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
The Qualcomm UFS PHY bindings are documented in
bindings/phy/qcom,qmp-phy.yaml and the compatibles from separate file
bindings/ufs/ufs-qcom.txt are not used at all.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/ufs-qcom.txt | 63 -------------------
1 file changed, 63 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
deleted file mode 100644
index fd59f93e9556..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-* Qualcomm Technologies Inc Universal Flash Storage (UFS) PHY
-
-UFSPHY nodes are defined to describe on-chip UFS PHY hardware macro.
-Each UFS PHY node should have its own node.
-
-To bind UFS PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS PHY node.
-
-Required properties:
-- compatible : compatible list, contains one of the following -
- "qcom,ufs-phy-qmp-20nm" for 20nm ufs phy,
- "qcom,ufs-phy-qmp-14nm" for legacy 14nm ufs phy,
- "qcom,msm8996-ufs-phy-qmp-14nm" for 14nm ufs phy
- present on MSM8996 chipset.
-- reg : should contain PHY register address space (mandatory),
-- reg-names : indicates various resources passed to driver (via reg proptery) by name.
- Required "reg-names" is "phy_mem".
-- #phy-cells : This property shall be set to 0
-- vdda-phy-supply : phandle to main PHY supply for analog domain
-- vdda-pll-supply : phandle to PHY PLL and Power-Gen block power supply
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ref_clk_src", "ref_clk",
- "tx_iface_clk" & "rx_iface_clk" are mandatory but
- "ref_clk_parent" is optional
-
-Optional properties:
-- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply
-- vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply
-- vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
-- vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply
-- resets : specifies the PHY reset in the UFS controller
-
-Example:
-
- ufsphy1: ufsphy@fc597000 {
- compatible = "qcom,ufs-phy-qmp-20nm";
- reg = <0xfc597000 0x800>;
- reg-names = "phy_mem";
- #phy-cells = <0>;
- vdda-phy-supply = <&pma8084_l4>;
- vdda-pll-supply = <&pma8084_l12>;
- vdda-phy-max-microamp = <50000>;
- vdda-pll-max-microamp = <1000>;
- clock-names = "ref_clk_src",
- "ref_clk_parent",
- "ref_clk",
- "tx_iface_clk",
- "rx_iface_clk";
- clocks = <&clock_rpm clk_ln_bb_clk>,
- <&clock_gcc clk_pcie_1_phy_ldo >,
- <&clock_gcc clk_ufs_phy_ldo>,
- <&clock_gcc clk_gcc_ufs_tx_cfg_clk>,
- <&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
- resets = <&ufshc 0>;
- };
-
- ufshc: ufshc@fc598000 {
- #reset-cells = <1>;
- ...
- phys = <&ufsphy1>;
- phy-names = "ufsphy";
- };
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 05/12] dt-bindings: ufs: qcom,ufs: convert to dtschema
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Qualcomm Universal Flash Storage (UFS) Controller to DT
schema format.
Except the conversion, add also properties already present in DTS:
iommus, interconnects and power-domains.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
2 files changed, 242 insertions(+), 90 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
new file mode 100644
index 000000000000..5b3a2157f7e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -0,0 +1,242 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+ - Andy Gross <agross@kernel.org>
+
+# Select only our matches, not all jedec,ufs-2.0
+select:
+ properties:
+ compatible:
+ contains:
+ const: qcom,ufshc
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,msm8994-ufshc
+ - qcom,msm8996-ufshc
+ - qcom,msm8998-ufshc
+ - qcom,sdm845-ufshc
+ - qcom,sm8150-ufshc
+ - qcom,sm8250-ufshc
+ - qcom,sm8350-ufshc
+ - qcom,sm8450-ufshc
+ - const: qcom,ufshc
+ - const: jedec,ufs-2.0
+
+ clocks:
+ minItems: 8
+ maxItems: 11
+
+ clock-names:
+ minItems: 8
+ maxItems: 11
+
+ interconnects:
+ minItems: 2
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ufs-ddr
+ - const: cpu-ufs
+
+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: ufsphy
+
+ power-domains:
+ maxItems: 1
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ resets:
+ maxItems: 1
+
+ '#reset-cells':
+ const: 1
+
+ reset-names:
+ items:
+ - const: rst
+
+ reset-gpios:
+ maxItems: 1
+ description:
+ GPIO connected to the RESET pin of the UFS memory device.
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: ufs-common.yaml
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8998-ufshc
+ - qcom,sm8250-ufshc
+ - qcom,sm8350-ufshc
+ - qcom,sm8450-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 8
+ clock-names:
+ items:
+ - const: core_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ - const: rx_lane1_sync_clk
+ reg:
+ minItems: 1
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sdm845-ufshc
+ - qcom,sm8150-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 9
+ maxItems: 9
+ clock-names:
+ items:
+ - const: core_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ - const: rx_lane1_sync_clk
+ - const: ice_core_clk
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8996-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 11
+ maxItems: 11
+ clock-names:
+ items:
+ - const: core_clk_src
+ - const: core_clk
+ - const: bus_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro_src
+ - const: core_clk_unipro
+ - const: core_clk_ice
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ reg:
+ minItems: 1
+ maxItems: 1
+
+ # TODO: define clock bindings for qcom,msm8994-ufshc
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8450.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interconnect/qcom,sm8450.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@1d84000 {
+ compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
+ "jedec,ufs-2.0";
+ reg = <0 0x01d84000 0 0x3000>;
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&ufs_mem_phy_lanes>;
+ phy-names = "ufsphy";
+ lanes-per-direction = <2>;
+ #reset-cells = <1>;
+ resets = <&gcc GCC_UFS_PHY_BCR>;
+ reset-names = "rst";
+ reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l7b_2p5>;
+ vcc-max-microamp = <1100000>;
+ vccq-supply = <&vreg_l9b_1p2>;
+ vccq-max-microamp = <1200000>;
+
+ power-domains = <&gcc UFS_PHY_GDSC>;
+ iommus = <&apps_smmu 0xe0 0x0>;
+ interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
+ interconnect-names = "ufs-ddr", "cpu-ufs";
+
+ clock-names = "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "ref_clk",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
+ clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_UFS_PHY_AHB_CLK>,
+ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ freq-table-hz = <75000000 300000000>,
+ <0 0>,
+ <0 0>,
+ <75000000 300000000>,
+ <75000000 300000000>,
+ <0 0>,
+ <0 0>,
+ <0 0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
deleted file mode 100644
index d0fee78e6203..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ /dev/null
@@ -1,90 +0,0 @@
-* Universal Flash Storage (UFS) Host Controller
-
-UFSHC nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-
-Required properties:
-- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
-
- For Qualcomm SoCs must contain, as below, an
- SoC-specific compatible along with "qcom,ufshc" and
- the appropriate jedec string:
- "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
-- interrupts : <interrupt mapping for UFS host controller IRQ>
-- reg : <registers mapping>
-
-Optional properties:
-- phys : phandle to UFS PHY node
-- phy-names : the string "ufsphy" when is found in a node, along
- with "phys" attribute, provides phandle to UFS PHY node
-- vdd-hba-supply : phandle to UFS host controller supply regulator node
-- vcc-supply : phandle to VCC supply regulator node
-- vccq-supply : phandle to VCCQ supply regulator node
-- vccq2-supply : phandle to VCCQ2 supply regulator node
-- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V
- or 2.7-3.6V. This boolean property when set, specifies
- to use low voltage range of 1.7-1.95V. Note for external
- UFS cards this property is invalid and valid VCC range is
- always 2.7-3.6V.
-- vcc-max-microamp : specifies max. load that can be drawn from vcc supply
-- vccq-max-microamp : specifies max. load that can be drawn from vccq supply
-- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply
-
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property.
- "ref_clk" indicates reference clock frequency.
- UFS host supplies reference clock to UFS device and UFS device
- specification allows host to provide one of the 4 frequencies (19.2 MHz,
- 26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is
- parsed and used to update the reference clock setting in device.
- Defaults to 26 MHz(as per specification) if not specified by host.
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
--lanes-per-direction : number of lanes available per direction - either 1 or 2.
- Note that it is assume same number of lanes is used both
- directions at once. If not specified, default is 2 lanes per direction.
-- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose
- PHY reset from the UFS controller.
-- resets : reset node register
-- reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
-- reset-gpios : A phandle and gpio specifier denoting the GPIO connected
- to the RESET pin of the UFS memory device.
-
-Note: If above properties are not defined it can be assumed that the supply
-regulators or clocks are always on.
-
-Example:
- ufshc@fc598000 {
- compatible = "jedec,ufs-1.1";
- reg = <0xfc598000 0x800>;
- interrupts = <0 28 0>;
-
- vdd-hba-supply = <&xxx_reg0>;
- vcc-supply = <&xxx_reg1>;
- vcc-supply-1p8;
- vccq-supply = <&xxx_reg2>;
- vccq2-supply = <&xxx_reg3>;
- vcc-max-microamp = 500000;
- vccq-max-microamp = 200000;
- vccq2-max-microamp = 200000;
-
- clocks = <&core 0>, <&ref 0>, <&phy 0>, <&iface 0>;
- clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
- freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>;
- resets = <&reset 0 1>;
- reset-names = "rst";
- phys = <&ufsphy1>;
- phy-names = "ufsphy";
- #reset-cells = <1>;
- };
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 05/12] dt-bindings: ufs: qcom,ufs: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Qualcomm Universal Flash Storage (UFS) Controller to DT
schema format.
Except the conversion, add also properties already present in DTS:
iommus, interconnects and power-domains.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
2 files changed, 242 insertions(+), 90 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
new file mode 100644
index 000000000000..5b3a2157f7e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -0,0 +1,242 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+ - Andy Gross <agross@kernel.org>
+
+# Select only our matches, not all jedec,ufs-2.0
+select:
+ properties:
+ compatible:
+ contains:
+ const: qcom,ufshc
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,msm8994-ufshc
+ - qcom,msm8996-ufshc
+ - qcom,msm8998-ufshc
+ - qcom,sdm845-ufshc
+ - qcom,sm8150-ufshc
+ - qcom,sm8250-ufshc
+ - qcom,sm8350-ufshc
+ - qcom,sm8450-ufshc
+ - const: qcom,ufshc
+ - const: jedec,ufs-2.0
+
+ clocks:
+ minItems: 8
+ maxItems: 11
+
+ clock-names:
+ minItems: 8
+ maxItems: 11
+
+ interconnects:
+ minItems: 2
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ufs-ddr
+ - const: cpu-ufs
+
+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: ufsphy
+
+ power-domains:
+ maxItems: 1
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ resets:
+ maxItems: 1
+
+ '#reset-cells':
+ const: 1
+
+ reset-names:
+ items:
+ - const: rst
+
+ reset-gpios:
+ maxItems: 1
+ description:
+ GPIO connected to the RESET pin of the UFS memory device.
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: ufs-common.yaml
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8998-ufshc
+ - qcom,sm8250-ufshc
+ - qcom,sm8350-ufshc
+ - qcom,sm8450-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 8
+ clock-names:
+ items:
+ - const: core_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ - const: rx_lane1_sync_clk
+ reg:
+ minItems: 1
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sdm845-ufshc
+ - qcom,sm8150-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 9
+ maxItems: 9
+ clock-names:
+ items:
+ - const: core_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ - const: rx_lane1_sync_clk
+ - const: ice_core_clk
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8996-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 11
+ maxItems: 11
+ clock-names:
+ items:
+ - const: core_clk_src
+ - const: core_clk
+ - const: bus_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro_src
+ - const: core_clk_unipro
+ - const: core_clk_ice
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ reg:
+ minItems: 1
+ maxItems: 1
+
+ # TODO: define clock bindings for qcom,msm8994-ufshc
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8450.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interconnect/qcom,sm8450.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@1d84000 {
+ compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
+ "jedec,ufs-2.0";
+ reg = <0 0x01d84000 0 0x3000>;
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&ufs_mem_phy_lanes>;
+ phy-names = "ufsphy";
+ lanes-per-direction = <2>;
+ #reset-cells = <1>;
+ resets = <&gcc GCC_UFS_PHY_BCR>;
+ reset-names = "rst";
+ reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l7b_2p5>;
+ vcc-max-microamp = <1100000>;
+ vccq-supply = <&vreg_l9b_1p2>;
+ vccq-max-microamp = <1200000>;
+
+ power-domains = <&gcc UFS_PHY_GDSC>;
+ iommus = <&apps_smmu 0xe0 0x0>;
+ interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
+ interconnect-names = "ufs-ddr", "cpu-ufs";
+
+ clock-names = "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "ref_clk",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
+ clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_UFS_PHY_AHB_CLK>,
+ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ freq-table-hz = <75000000 300000000>,
+ <0 0>,
+ <0 0>,
+ <75000000 300000000>,
+ <75000000 300000000>,
+ <0 0>,
+ <0 0>,
+ <0 0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
deleted file mode 100644
index d0fee78e6203..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ /dev/null
@@ -1,90 +0,0 @@
-* Universal Flash Storage (UFS) Host Controller
-
-UFSHC nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-
-Required properties:
-- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
-
- For Qualcomm SoCs must contain, as below, an
- SoC-specific compatible along with "qcom,ufshc" and
- the appropriate jedec string:
- "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
-- interrupts : <interrupt mapping for UFS host controller IRQ>
-- reg : <registers mapping>
-
-Optional properties:
-- phys : phandle to UFS PHY node
-- phy-names : the string "ufsphy" when is found in a node, along
- with "phys" attribute, provides phandle to UFS PHY node
-- vdd-hba-supply : phandle to UFS host controller supply regulator node
-- vcc-supply : phandle to VCC supply regulator node
-- vccq-supply : phandle to VCCQ supply regulator node
-- vccq2-supply : phandle to VCCQ2 supply regulator node
-- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V
- or 2.7-3.6V. This boolean property when set, specifies
- to use low voltage range of 1.7-1.95V. Note for external
- UFS cards this property is invalid and valid VCC range is
- always 2.7-3.6V.
-- vcc-max-microamp : specifies max. load that can be drawn from vcc supply
-- vccq-max-microamp : specifies max. load that can be drawn from vccq supply
-- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply
-
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property.
- "ref_clk" indicates reference clock frequency.
- UFS host supplies reference clock to UFS device and UFS device
- specification allows host to provide one of the 4 frequencies (19.2 MHz,
- 26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is
- parsed and used to update the reference clock setting in device.
- Defaults to 26 MHz(as per specification) if not specified by host.
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
--lanes-per-direction : number of lanes available per direction - either 1 or 2.
- Note that it is assume same number of lanes is used both
- directions at once. If not specified, default is 2 lanes per direction.
-- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose
- PHY reset from the UFS controller.
-- resets : reset node register
-- reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
-- reset-gpios : A phandle and gpio specifier denoting the GPIO connected
- to the RESET pin of the UFS memory device.
-
-Note: If above properties are not defined it can be assumed that the supply
-regulators or clocks are always on.
-
-Example:
- ufshc@fc598000 {
- compatible = "jedec,ufs-1.1";
- reg = <0xfc598000 0x800>;
- interrupts = <0 28 0>;
-
- vdd-hba-supply = <&xxx_reg0>;
- vcc-supply = <&xxx_reg1>;
- vcc-supply-1p8;
- vccq-supply = <&xxx_reg2>;
- vccq2-supply = <&xxx_reg3>;
- vcc-max-microamp = 500000;
- vccq-max-microamp = 200000;
- vccq2-max-microamp = 200000;
-
- clocks = <&core 0>, <&ref 0>, <&phy 0>, <&iface 0>;
- clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
- freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>;
- resets = <&reset 0 1>;
- reset-names = "rst";
- phys = <&ufsphy1>;
- phy-names = "ufsphy";
- #reset-cells = <1>;
- };
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 05/12] dt-bindings: ufs: qcom,ufs: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Qualcomm Universal Flash Storage (UFS) Controller to DT
schema format.
Except the conversion, add also properties already present in DTS:
iommus, interconnects and power-domains.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
2 files changed, 242 insertions(+), 90 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
new file mode 100644
index 000000000000..5b3a2157f7e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -0,0 +1,242 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+ - Andy Gross <agross@kernel.org>
+
+# Select only our matches, not all jedec,ufs-2.0
+select:
+ properties:
+ compatible:
+ contains:
+ const: qcom,ufshc
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,msm8994-ufshc
+ - qcom,msm8996-ufshc
+ - qcom,msm8998-ufshc
+ - qcom,sdm845-ufshc
+ - qcom,sm8150-ufshc
+ - qcom,sm8250-ufshc
+ - qcom,sm8350-ufshc
+ - qcom,sm8450-ufshc
+ - const: qcom,ufshc
+ - const: jedec,ufs-2.0
+
+ clocks:
+ minItems: 8
+ maxItems: 11
+
+ clock-names:
+ minItems: 8
+ maxItems: 11
+
+ interconnects:
+ minItems: 2
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ufs-ddr
+ - const: cpu-ufs
+
+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: ufsphy
+
+ power-domains:
+ maxItems: 1
+
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ resets:
+ maxItems: 1
+
+ '#reset-cells':
+ const: 1
+
+ reset-names:
+ items:
+ - const: rst
+
+ reset-gpios:
+ maxItems: 1
+ description:
+ GPIO connected to the RESET pin of the UFS memory device.
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: ufs-common.yaml
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8998-ufshc
+ - qcom,sm8250-ufshc
+ - qcom,sm8350-ufshc
+ - qcom,sm8450-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 8
+ clock-names:
+ items:
+ - const: core_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ - const: rx_lane1_sync_clk
+ reg:
+ minItems: 1
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sdm845-ufshc
+ - qcom,sm8150-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 9
+ maxItems: 9
+ clock-names:
+ items:
+ - const: core_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ - const: rx_lane1_sync_clk
+ - const: ice_core_clk
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8996-ufshc
+ then:
+ properties:
+ clocks:
+ minItems: 11
+ maxItems: 11
+ clock-names:
+ items:
+ - const: core_clk_src
+ - const: core_clk
+ - const: bus_clk
+ - const: bus_aggr_clk
+ - const: iface_clk
+ - const: core_clk_unipro_src
+ - const: core_clk_unipro
+ - const: core_clk_ice
+ - const: ref_clk
+ - const: tx_lane0_sync_clk
+ - const: rx_lane0_sync_clk
+ reg:
+ minItems: 1
+ maxItems: 1
+
+ # TODO: define clock bindings for qcom,msm8994-ufshc
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8450.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interconnect/qcom,sm8450.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@1d84000 {
+ compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
+ "jedec,ufs-2.0";
+ reg = <0 0x01d84000 0 0x3000>;
+ interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&ufs_mem_phy_lanes>;
+ phy-names = "ufsphy";
+ lanes-per-direction = <2>;
+ #reset-cells = <1>;
+ resets = <&gcc GCC_UFS_PHY_BCR>;
+ reset-names = "rst";
+ reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l7b_2p5>;
+ vcc-max-microamp = <1100000>;
+ vccq-supply = <&vreg_l9b_1p2>;
+ vccq-max-microamp = <1200000>;
+
+ power-domains = <&gcc UFS_PHY_GDSC>;
+ iommus = <&apps_smmu 0xe0 0x0>;
+ interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
+ <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
+ interconnect-names = "ufs-ddr", "cpu-ufs";
+
+ clock-names = "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "ref_clk",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
+ clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_UFS_PHY_AHB_CLK>,
+ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ freq-table-hz = <75000000 300000000>,
+ <0 0>,
+ <0 0>,
+ <75000000 300000000>,
+ <75000000 300000000>,
+ <0 0>,
+ <0 0>,
+ <0 0>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
deleted file mode 100644
index d0fee78e6203..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ /dev/null
@@ -1,90 +0,0 @@
-* Universal Flash Storage (UFS) Host Controller
-
-UFSHC nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-
-Required properties:
-- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0"
-
- For Qualcomm SoCs must contain, as below, an
- SoC-specific compatible along with "qcom,ufshc" and
- the appropriate jedec string:
- "qcom,msm8994-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,msm8996-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sdm845-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
- "qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
-- interrupts : <interrupt mapping for UFS host controller IRQ>
-- reg : <registers mapping>
-
-Optional properties:
-- phys : phandle to UFS PHY node
-- phy-names : the string "ufsphy" when is found in a node, along
- with "phys" attribute, provides phandle to UFS PHY node
-- vdd-hba-supply : phandle to UFS host controller supply regulator node
-- vcc-supply : phandle to VCC supply regulator node
-- vccq-supply : phandle to VCCQ supply regulator node
-- vccq2-supply : phandle to VCCQ2 supply regulator node
-- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V
- or 2.7-3.6V. This boolean property when set, specifies
- to use low voltage range of 1.7-1.95V. Note for external
- UFS cards this property is invalid and valid VCC range is
- always 2.7-3.6V.
-- vcc-max-microamp : specifies max. load that can be drawn from vcc supply
-- vccq-max-microamp : specifies max. load that can be drawn from vccq supply
-- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply
-
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property.
- "ref_clk" indicates reference clock frequency.
- UFS host supplies reference clock to UFS device and UFS device
- specification allows host to provide one of the 4 frequencies (19.2 MHz,
- 26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is
- parsed and used to update the reference clock setting in device.
- Defaults to 26 MHz(as per specification) if not specified by host.
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
--lanes-per-direction : number of lanes available per direction - either 1 or 2.
- Note that it is assume same number of lanes is used both
- directions at once. If not specified, default is 2 lanes per direction.
-- #reset-cells : Must be <1> for Qualcomm UFS controllers that expose
- PHY reset from the UFS controller.
-- resets : reset node register
-- reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP.
-- reset-gpios : A phandle and gpio specifier denoting the GPIO connected
- to the RESET pin of the UFS memory device.
-
-Note: If above properties are not defined it can be assumed that the supply
-regulators or clocks are always on.
-
-Example:
- ufshc@fc598000 {
- compatible = "jedec,ufs-1.1";
- reg = <0xfc598000 0x800>;
- interrupts = <0 28 0>;
-
- vdd-hba-supply = <&xxx_reg0>;
- vcc-supply = <&xxx_reg1>;
- vcc-supply-1p8;
- vccq-supply = <&xxx_reg2>;
- vccq2-supply = <&xxx_reg3>;
- vcc-max-microamp = 500000;
- vccq-max-microamp = 200000;
- vccq2-max-microamp = 200000;
-
- clocks = <&core 0>, <&ref 0>, <&phy 0>, <&iface 0>;
- clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
- freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>;
- resets = <&reset 0 1>;
- reset-names = "rst";
- phys = <&ufsphy1>;
- phy-names = "ufsphy";
- #reset-cells = <1>;
- };
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 06/12] dt-bindings: ufs: hisilicon,ufs: convert to dtschema
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the HiSilicon Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---------
2 files changed, 90 insertions(+), 42 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
diff --git a/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
new file mode 100644
index 000000000000..4432bfa0cbc7
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/hisilicon,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Li Wei <liwei213@huawei.com>
+
+# Select only our matches, not all jedec,ufs
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - hisilicon,hi3660-ufs
+ - hisilicon,hi3670-ufs
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: hisilicon,hi3660-ufs
+ - const: jedec,ufs-1.1
+ - items:
+ - enum:
+ - hisilicon,hi3670-ufs
+ - const: jedec,ufs-2.1
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: ref_clk
+ - const: phy_clk
+
+ reg:
+ items:
+ - description: UFS register address space
+ - description: UFS SYS CTRL register address space
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: rst
+
+required:
+ - compatible
+ - reg
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/hi3670-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@ff3c0000 {
+ compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
+ reg = <0x0 0xff3c0000 0x0 0x1000>,
+ <0x0 0xff3e0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
+ <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
+ clock-names = "ref_clk", "phy_clk";
+ freq-table-hz = <0 0>,
+ <0 0>;
+
+ resets = <&crg_rst 0x84 12>;
+ reset-names = "rst";
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
deleted file mode 100644
index 0b83df1a5418..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-* Hisilicon Universal Flash Storage (UFS) Host Controller
-
-UFS nodes are defined to describe on-chip UFS hardware macro.
-Each UFS Host Controller should have its own node.
-
-Required properties:
-- compatible : compatible list, contains one of the following -
- "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
- host controller present on Hi3660 chipset.
- "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs
- host controller present on Hi3670 chipset.
-- reg : should contain UFS register address space & UFS SYS CTRL register address,
-- interrupts : interrupt number
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ref_clk", "phy_clk" is optional
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
-- resets : describe reset node register
-- reset-names : reset node register, the "rst" corresponds to reset the whole UFS IP.
-
-Example:
-
- ufs: ufs@ff3b0000 {
- compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
- /* 0: HCI standard */
- /* 1: UFS SYS CTRL */
- reg = <0x0 0xff3b0000 0x0 0x1000>,
- <0x0 0xff3b1000 0x0 0x1000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
- <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
- clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0>, <0 0>;
- /* offset: 0x84; bit: 12 */
- resets = <&crg_rst 0x84 12>;
- reset-names = "rst";
- };
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 06/12] dt-bindings: ufs: hisilicon, ufs: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the HiSilicon Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---------
2 files changed, 90 insertions(+), 42 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
diff --git a/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
new file mode 100644
index 000000000000..4432bfa0cbc7
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/hisilicon,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Li Wei <liwei213@huawei.com>
+
+# Select only our matches, not all jedec,ufs
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - hisilicon,hi3660-ufs
+ - hisilicon,hi3670-ufs
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: hisilicon,hi3660-ufs
+ - const: jedec,ufs-1.1
+ - items:
+ - enum:
+ - hisilicon,hi3670-ufs
+ - const: jedec,ufs-2.1
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: ref_clk
+ - const: phy_clk
+
+ reg:
+ items:
+ - description: UFS register address space
+ - description: UFS SYS CTRL register address space
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: rst
+
+required:
+ - compatible
+ - reg
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/hi3670-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@ff3c0000 {
+ compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
+ reg = <0x0 0xff3c0000 0x0 0x1000>,
+ <0x0 0xff3e0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
+ <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
+ clock-names = "ref_clk", "phy_clk";
+ freq-table-hz = <0 0>,
+ <0 0>;
+
+ resets = <&crg_rst 0x84 12>;
+ reset-names = "rst";
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
deleted file mode 100644
index 0b83df1a5418..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-* Hisilicon Universal Flash Storage (UFS) Host Controller
-
-UFS nodes are defined to describe on-chip UFS hardware macro.
-Each UFS Host Controller should have its own node.
-
-Required properties:
-- compatible : compatible list, contains one of the following -
- "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
- host controller present on Hi3660 chipset.
- "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs
- host controller present on Hi3670 chipset.
-- reg : should contain UFS register address space & UFS SYS CTRL register address,
-- interrupts : interrupt number
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ref_clk", "phy_clk" is optional
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
-- resets : describe reset node register
-- reset-names : reset node register, the "rst" corresponds to reset the whole UFS IP.
-
-Example:
-
- ufs: ufs@ff3b0000 {
- compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
- /* 0: HCI standard */
- /* 1: UFS SYS CTRL */
- reg = <0x0 0xff3b0000 0x0 0x1000>,
- <0x0 0xff3b1000 0x0 0x1000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
- <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
- clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0>, <0 0>;
- /* offset: 0x84; bit: 12 */
- resets = <&crg_rst 0x84 12>;
- reset-names = "rst";
- };
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 06/12] dt-bindings: ufs: hisilicon, ufs: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the HiSilicon Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---------
2 files changed, 90 insertions(+), 42 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
diff --git a/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
new file mode 100644
index 000000000000..4432bfa0cbc7
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/hisilicon,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Li Wei <liwei213@huawei.com>
+
+# Select only our matches, not all jedec,ufs
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - hisilicon,hi3660-ufs
+ - hisilicon,hi3670-ufs
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: hisilicon,hi3660-ufs
+ - const: jedec,ufs-1.1
+ - items:
+ - enum:
+ - hisilicon,hi3670-ufs
+ - const: jedec,ufs-2.1
+
+ clocks:
+ minItems: 2
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: ref_clk
+ - const: phy_clk
+
+ reg:
+ items:
+ - description: UFS register address space
+ - description: UFS SYS CTRL register address space
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: rst
+
+required:
+ - compatible
+ - reg
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/hi3670-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@ff3c0000 {
+ compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
+ reg = <0x0 0xff3c0000 0x0 0x1000>,
+ <0x0 0xff3e0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
+ <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
+ clock-names = "ref_clk", "phy_clk";
+ freq-table-hz = <0 0>,
+ <0 0>;
+
+ resets = <&crg_rst 0x84 12>;
+ reset-names = "rst";
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
deleted file mode 100644
index 0b83df1a5418..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-* Hisilicon Universal Flash Storage (UFS) Host Controller
-
-UFS nodes are defined to describe on-chip UFS hardware macro.
-Each UFS Host Controller should have its own node.
-
-Required properties:
-- compatible : compatible list, contains one of the following -
- "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs
- host controller present on Hi3660 chipset.
- "hisilicon,hi3670-ufs", "jedec,ufs-2.1" for hisi ufs
- host controller present on Hi3670 chipset.
-- reg : should contain UFS register address space & UFS SYS CTRL register address,
-- interrupts : interrupt number
-- clocks : List of phandle and clock specifier pairs
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ref_clk", "phy_clk" is optional
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
-- resets : describe reset node register
-- reset-names : reset node register, the "rst" corresponds to reset the whole UFS IP.
-
-Example:
-
- ufs: ufs@ff3b0000 {
- compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
- /* 0: HCI standard */
- /* 1: UFS SYS CTRL */
- reg = <0x0 0xff3b0000 0x0 0x1000>,
- <0x0 0xff3b1000 0x0 0x1000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
- <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
- clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0>, <0 0>;
- /* offset: 0x84; bit: 12 */
- resets = <&crg_rst 0x84 12>;
- reset-names = "rst";
- };
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 07/12] dt-bindings: ufs: mediatek,ufs: convert to dtschema
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Mediatek Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-mediatek.txt | 45 -------------
2 files changed, 67 insertions(+), 45 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
new file mode 100644
index 000000000000..32fd535a514a
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Stanley Chu <stanley.chu@mediatek.com>
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8183-ufshci
+ - mediatek,mt8192-ufshci
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: ufs
+
+ phys:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ vcc-supply: true
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - phys
+ - reg
+ - vcc-supply
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@ff3c0000 {
+ compatible = "mediatek,mt8183-ufshci";
+ reg = <0 0x11270000 0 0x2300>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&ufsphy>;
+
+ clocks = <&infracfg_ao CLK_INFRA_UFS>;
+ clock-names = "ufs";
+ freq-table-hz = <0 0>;
+
+ vcc-supply = <&mt_pmic_vemc_ldo_reg>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
deleted file mode 100644
index 63a953b672d2..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-* Mediatek Universal Flash Storage (UFS) Host Controller
-
-UFS nodes are defined to describe on-chip UFS hardware macro.
-Each UFS Host Controller should have its own node.
-
-To bind UFS PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS M-PHY node.
-
-Required properties for UFS nodes:
-- compatible : Compatible list, contains the following controller:
- "mediatek,mt8183-ufshci" for MediaTek UFS host controller
- present on MT8183 chipsets.
- "mediatek,mt8192-ufshci" for MediaTek UFS host controller
- present on MT8192 chipsets.
-- reg : Address and length of the UFS register set.
-- phys : phandle to m-phy.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ufs" is mandatory.
- "ufs": ufshci core control clock.
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
-- vcc-supply : phandle to VCC supply regulator node.
-
-Example:
-
- ufsphy: phy@11fa0000 {
- ...
- };
-
- ufshci@11270000 {
- compatible = "mediatek,mt8183-ufshci";
- reg = <0 0x11270000 0 0x2300>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
- phys = <&ufsphy>;
-
- clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>;
- clock-names = "ufs";
- freq-table-hz = <0 0>;
-
- vcc-supply = <&mt_pmic_vemc_ldo_reg>;
- };
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 07/12] dt-bindings: ufs: mediatek,ufs: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Mediatek Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-mediatek.txt | 45 -------------
2 files changed, 67 insertions(+), 45 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
new file mode 100644
index 000000000000..32fd535a514a
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Stanley Chu <stanley.chu@mediatek.com>
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8183-ufshci
+ - mediatek,mt8192-ufshci
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: ufs
+
+ phys:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ vcc-supply: true
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - phys
+ - reg
+ - vcc-supply
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@ff3c0000 {
+ compatible = "mediatek,mt8183-ufshci";
+ reg = <0 0x11270000 0 0x2300>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&ufsphy>;
+
+ clocks = <&infracfg_ao CLK_INFRA_UFS>;
+ clock-names = "ufs";
+ freq-table-hz = <0 0>;
+
+ vcc-supply = <&mt_pmic_vemc_ldo_reg>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
deleted file mode 100644
index 63a953b672d2..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-* Mediatek Universal Flash Storage (UFS) Host Controller
-
-UFS nodes are defined to describe on-chip UFS hardware macro.
-Each UFS Host Controller should have its own node.
-
-To bind UFS PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS M-PHY node.
-
-Required properties for UFS nodes:
-- compatible : Compatible list, contains the following controller:
- "mediatek,mt8183-ufshci" for MediaTek UFS host controller
- present on MT8183 chipsets.
- "mediatek,mt8192-ufshci" for MediaTek UFS host controller
- present on MT8192 chipsets.
-- reg : Address and length of the UFS register set.
-- phys : phandle to m-phy.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ufs" is mandatory.
- "ufs": ufshci core control clock.
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
-- vcc-supply : phandle to VCC supply regulator node.
-
-Example:
-
- ufsphy: phy@11fa0000 {
- ...
- };
-
- ufshci@11270000 {
- compatible = "mediatek,mt8183-ufshci";
- reg = <0 0x11270000 0 0x2300>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
- phys = <&ufsphy>;
-
- clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>;
- clock-names = "ufs";
- freq-table-hz = <0 0>;
-
- vcc-supply = <&mt_pmic_vemc_ldo_reg>;
- };
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 07/12] dt-bindings: ufs: mediatek,ufs: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Mediatek Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-mediatek.txt | 45 -------------
2 files changed, 67 insertions(+), 45 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
new file mode 100644
index 000000000000..32fd535a514a
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Stanley Chu <stanley.chu@mediatek.com>
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8183-ufshci
+ - mediatek,mt8192-ufshci
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: ufs
+
+ phys:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+ vcc-supply: true
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - phys
+ - reg
+ - vcc-supply
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ufs@ff3c0000 {
+ compatible = "mediatek,mt8183-ufshci";
+ reg = <0 0x11270000 0 0x2300>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&ufsphy>;
+
+ clocks = <&infracfg_ao CLK_INFRA_UFS>;
+ clock-names = "ufs";
+ freq-table-hz = <0 0>;
+
+ vcc-supply = <&mt_pmic_vemc_ldo_reg>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
deleted file mode 100644
index 63a953b672d2..000000000000
--- a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-* Mediatek Universal Flash Storage (UFS) Host Controller
-
-UFS nodes are defined to describe on-chip UFS hardware macro.
-Each UFS Host Controller should have its own node.
-
-To bind UFS PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS M-PHY node.
-
-Required properties for UFS nodes:
-- compatible : Compatible list, contains the following controller:
- "mediatek,mt8183-ufshci" for MediaTek UFS host controller
- present on MT8183 chipsets.
- "mediatek,mt8192-ufshci" for MediaTek UFS host controller
- present on MT8192 chipsets.
-- reg : Address and length of the UFS register set.
-- phys : phandle to m-phy.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "ufs" is mandatory.
- "ufs": ufshci core control clock.
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
- order as the clocks property. If this property is not
- defined or a value in the array is "0" then it is assumed
- that the frequency is set by the parent clock or a
- fixed rate clock source.
-- vcc-supply : phandle to VCC supply regulator node.
-
-Example:
-
- ufsphy: phy@11fa0000 {
- ...
- };
-
- ufshci@11270000 {
- compatible = "mediatek,mt8183-ufshci";
- reg = <0 0x11270000 0 0x2300>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
- phys = <&ufsphy>;
-
- clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>;
- clock-names = "ufs";
- freq-table-hz = <0 0>;
-
- vcc-supply = <&mt_pmic_vemc_ldo_reg>;
- };
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 08/12] dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Synopsys Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/ufs/snps,tc-dwc-g210.yaml | 51 +++++++++++++++++++
.../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 ----------
2 files changed, 51 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
diff --git a/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
new file mode 100644
index 000000000000..671a70d95138
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Li Wei <liwei213@huawei.com>
+
+# Select only our matches, not all jedec,ufs
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - snps,dwc-ufshcd-1.40a
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - snps,g210-tc-6.00-20bit
+ - snps,g210-tc-6.00-40bit
+ - const: snps,dwc-ufshcd-1.40a
+ - const: jedec,ufs-2.0
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ufs@d0000000 {
+ compatible = "snps,g210-tc-6.00-40bit",
+ "snps,dwc-ufshcd-1.40a",
+ "jedec,ufs-2.0";
+ reg = <0xd0000000 0x10000>;
+ interrupts = <24>;
+ };
diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
deleted file mode 100644
index 71c0777960e9..000000000000
--- a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-* Universal Flash Storage (UFS) DesignWare Host Controller
-
-DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
-Each UFS controller instance should have its own node.
-
-Required properties:
-- compatible : compatible list must contain the PHY type & version:
- "snps,g210-tc-6.00-20bit"
- "snps,g210-tc-6.00-40bit"
- complemented with the Controller IP version:
- "snps,dwc-ufshcd-1.40a"
- complemented with the JEDEC version:
- "jedec,ufs-1.1"
- "jedec,ufs-2.0"
-
-- reg : <registers mapping>
-- interrupts : <interrupt mapping for UFS host controller IRQ>
-
-Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
- dwc-ufs@d0000000 {
- compatible = "snps,g210-tc-6.00-40bit",
- "snps,dwc-ufshcd-1.40a",
- "jedec,ufs-2.0";
- reg = < 0xd0000000 0x10000 >;
- interrupts = < 24 >;
- };
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 08/12] dt-bindings: ufs: snps, tc-dwc-g210: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Synopsys Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/ufs/snps,tc-dwc-g210.yaml | 51 +++++++++++++++++++
.../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 ----------
2 files changed, 51 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
diff --git a/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
new file mode 100644
index 000000000000..671a70d95138
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Li Wei <liwei213@huawei.com>
+
+# Select only our matches, not all jedec,ufs
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - snps,dwc-ufshcd-1.40a
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - snps,g210-tc-6.00-20bit
+ - snps,g210-tc-6.00-40bit
+ - const: snps,dwc-ufshcd-1.40a
+ - const: jedec,ufs-2.0
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ufs@d0000000 {
+ compatible = "snps,g210-tc-6.00-40bit",
+ "snps,dwc-ufshcd-1.40a",
+ "jedec,ufs-2.0";
+ reg = <0xd0000000 0x10000>;
+ interrupts = <24>;
+ };
diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
deleted file mode 100644
index 71c0777960e9..000000000000
--- a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-* Universal Flash Storage (UFS) DesignWare Host Controller
-
-DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
-Each UFS controller instance should have its own node.
-
-Required properties:
-- compatible : compatible list must contain the PHY type & version:
- "snps,g210-tc-6.00-20bit"
- "snps,g210-tc-6.00-40bit"
- complemented with the Controller IP version:
- "snps,dwc-ufshcd-1.40a"
- complemented with the JEDEC version:
- "jedec,ufs-1.1"
- "jedec,ufs-2.0"
-
-- reg : <registers mapping>
-- interrupts : <interrupt mapping for UFS host controller IRQ>
-
-Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
- dwc-ufs@d0000000 {
- compatible = "snps,g210-tc-6.00-40bit",
- "snps,dwc-ufshcd-1.40a",
- "jedec,ufs-2.0";
- reg = < 0xd0000000 0x10000 >;
- interrupts = < 24 >;
- };
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 08/12] dt-bindings: ufs: snps, tc-dwc-g210: convert to dtschema
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
Cc: Rob Herring
Convert the Synopsys Universal Flash Storage (UFS) Controller to DT
schema format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/ufs/snps,tc-dwc-g210.yaml | 51 +++++++++++++++++++
.../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 ----------
2 files changed, 51 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
diff --git a/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
new file mode 100644
index 000000000000..671a70d95138
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Li Wei <liwei213@huawei.com>
+
+# Select only our matches, not all jedec,ufs
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - snps,dwc-ufshcd-1.40a
+ required:
+ - compatible
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - snps,g210-tc-6.00-20bit
+ - snps,g210-tc-6.00-40bit
+ - const: snps,dwc-ufshcd-1.40a
+ - const: jedec,ufs-2.0
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ufs@d0000000 {
+ compatible = "snps,g210-tc-6.00-40bit",
+ "snps,dwc-ufshcd-1.40a",
+ "jedec,ufs-2.0";
+ reg = <0xd0000000 0x10000>;
+ interrupts = <24>;
+ };
diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
deleted file mode 100644
index 71c0777960e9..000000000000
--- a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-* Universal Flash Storage (UFS) DesignWare Host Controller
-
-DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
-Each UFS controller instance should have its own node.
-
-Required properties:
-- compatible : compatible list must contain the PHY type & version:
- "snps,g210-tc-6.00-20bit"
- "snps,g210-tc-6.00-40bit"
- complemented with the Controller IP version:
- "snps,dwc-ufshcd-1.40a"
- complemented with the JEDEC version:
- "jedec,ufs-1.1"
- "jedec,ufs-2.0"
-
-- reg : <registers mapping>
-- interrupts : <interrupt mapping for UFS host controller IRQ>
-
-Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
- dwc-ufs@d0000000 {
- compatible = "snps,g210-tc-6.00-40bit",
- "snps,dwc-ufshcd-1.40a",
- "jedec,ufs-2.0";
- reg = < 0xd0000000 0x10000 >;
- interrupts = < 24 >;
- };
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
which is also easier to read.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++--
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8bd6d7e8a474..6b3057a09251 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1045,8 +1045,8 @@ ufs: ufs@ff3b0000 {
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 636c8817df7e..3125c3869c69 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 {
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
which is also easier to read.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++--
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8bd6d7e8a474..6b3057a09251 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1045,8 +1045,8 @@ ufs: ufs@ff3b0000 {
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 636c8817df7e..3125c3869c69 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 {
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
which is also easier to read.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++--
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8bd6d7e8a474..6b3057a09251 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1045,8 +1045,8 @@ ufs: ufs@ff3b0000 {
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 636c8817df7e..3125c3869c69 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 {
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table-hz = <0 0>,
+ <0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 10/12] arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is
l25 regulator) is not documented in MSM8996 UFS PHY bindings
(qcom,msm8996-qmp-ufs-phy). It is mentioned in the other UFS PHY
bindings for qcom,msm8996-ufs-phy-qmp-14nm.
The MSM8996-based Xiaomi devices configure l25 regulator in a
conflicting way:
1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY,
2. with maximum 450 mAmp for VCCQ supply of UFS.
Since the vddp-ref-clk-max-microamp property is basically not
documented for that UFS PHY and has a conflicting values, drop it
entirely as it looks like not tested and not used ever.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
index 7a9fcbe9bb31..3ade756e1cd9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
@@ -341,7 +341,6 @@ &ufsphy {
vdda-pll-max-microamp = <9440>;
vddp-ref-clk-supply = <&vreg_l25a_1p2>;
- vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 10/12] arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is
l25 regulator) is not documented in MSM8996 UFS PHY bindings
(qcom,msm8996-qmp-ufs-phy). It is mentioned in the other UFS PHY
bindings for qcom,msm8996-ufs-phy-qmp-14nm.
The MSM8996-based Xiaomi devices configure l25 regulator in a
conflicting way:
1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY,
2. with maximum 450 mAmp for VCCQ supply of UFS.
Since the vddp-ref-clk-max-microamp property is basically not
documented for that UFS PHY and has a conflicting values, drop it
entirely as it looks like not tested and not used ever.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
index 7a9fcbe9bb31..3ade756e1cd9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
@@ -341,7 +341,6 @@ &ufsphy {
vdda-pll-max-microamp = <9440>;
vddp-ref-clk-supply = <&vreg_l25a_1p2>;
- vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 10/12] arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The property vddp-ref-clk-max-microamp (for VDDP ref clk supply which is
l25 regulator) is not documented in MSM8996 UFS PHY bindings
(qcom,msm8996-qmp-ufs-phy). It is mentioned in the other UFS PHY
bindings for qcom,msm8996-ufs-phy-qmp-14nm.
The MSM8996-based Xiaomi devices configure l25 regulator in a
conflicting way:
1. with maximum 100 uAmp for VDDP ref clk supply of UFS PHY,
2. with maximum 450 mAmp for VCCQ supply of UFS.
Since the vddp-ref-clk-max-microamp property is basically not
documented for that UFS PHY and has a conflicting values, drop it
entirely as it looks like not tested and not used ever.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
index 7a9fcbe9bb31..3ade756e1cd9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
@@ -341,7 +341,6 @@ &ufsphy {
vdda-pll-max-microamp = <9440>;
vddp-ref-clk-supply = <&vreg_l25a_1p2>;
- vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 11/12] arm64: dts: qcom: msm8996: correct UFS compatible
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The Qualcomm UFS bindings require to use specific (qcom,msm8996-ufshc)
and generic (jedec,ufs-2.0) compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index f0f81c23c16f..fa491f2271ff 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1730,7 +1730,8 @@ pcie2: pcie@610000 {
};
ufshc: ufshc@624000 {
- compatible = "qcom,ufshc";
+ compatible = "qcom,msm8996-ufshc", "qcom,ufshc",
+ "jedec,ufs-2.0";
reg = <0x00624000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 11/12] arm64: dts: qcom: msm8996: correct UFS compatible
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The Qualcomm UFS bindings require to use specific (qcom,msm8996-ufshc)
and generic (jedec,ufs-2.0) compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index f0f81c23c16f..fa491f2271ff 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1730,7 +1730,8 @@ pcie2: pcie@610000 {
};
ufshc: ufshc@624000 {
- compatible = "qcom,ufshc";
+ compatible = "qcom,msm8996-ufshc", "qcom,ufshc",
+ "jedec,ufs-2.0";
reg = <0x00624000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 11/12] arm64: dts: qcom: msm8996: correct UFS compatible
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
The Qualcomm UFS bindings require to use specific (qcom,msm8996-ufshc)
and generic (jedec,ufs-2.0) compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index f0f81c23c16f..fa491f2271ff 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1730,7 +1730,8 @@ pcie2: pcie@610000 {
};
ufshc: ufshc@624000 {
- compatible = "qcom,ufshc";
+ compatible = "qcom,msm8996-ufshc", "qcom,ufshc",
+ "jedec,ufs-2.0";
reg = <0x00624000 0x2500>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 12/12] arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
ref_clk clock in UFS node is already there with a <0 0> frequency, which
matches other DTSI files.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index d242bab69c2e..02589b3beb7c 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1916,7 +1916,6 @@ ufs_mem_hc: ufshc@1d84000 {
iommus = <&apps_smmu 0xe0 0x0>;
clock-names =
- "ref_clk",
"core_clk",
"bus_aggr_clk",
"iface_clk",
@@ -1926,7 +1925,6 @@ ufs_mem_hc: ufshc@1d84000 {
"rx_lane0_sync_clk",
"rx_lane1_sync_clk";
clocks =
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
@@ -1936,7 +1934,6 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
freq-table-hz =
- <75000000 300000000>,
<75000000 300000000>,
<0 0>,
<0 0>,
--
2.32.0
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 12/12] arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
ref_clk clock in UFS node is already there with a <0 0> frequency, which
matches other DTSI files.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index d242bab69c2e..02589b3beb7c 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1916,7 +1916,6 @@ ufs_mem_hc: ufshc@1d84000 {
iommus = <&apps_smmu 0xe0 0x0>;
clock-names =
- "ref_clk",
"core_clk",
"bus_aggr_clk",
"iface_clk",
@@ -1926,7 +1925,6 @@ ufs_mem_hc: ufshc@1d84000 {
"rx_lane0_sync_clk",
"rx_lane1_sync_clk";
clocks =
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
@@ -1936,7 +1934,6 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
freq-table-hz =
- <75000000 300000000>,
<75000000 300000000>,
<0 0>,
<0 0>,
--
2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 61+ messages in thread
* [PATCH v3 12/12] arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
@ 2022-03-06 11:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-06 11:11 UTC (permalink / raw)
To: Alim Akhtar, Avri Altman, Rob Herring, Krzysztof Kozlowski,
Andy Gross, Bjorn Andersson, Wei Xu, Matthias Brugger, Jan Kotas,
Li Wei, Stanley Chu, Vignesh Raghavendra, linux-scsi, devicetree,
linux-kernel, linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
ref_clk clock in UFS node is already there with a <0 0> frequency, which
matches other DTSI files.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index d242bab69c2e..02589b3beb7c 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1916,7 +1916,6 @@ ufs_mem_hc: ufshc@1d84000 {
iommus = <&apps_smmu 0xe0 0x0>;
clock-names =
- "ref_clk",
"core_clk",
"bus_aggr_clk",
"iface_clk",
@@ -1926,7 +1925,6 @@ ufs_mem_hc: ufshc@1d84000 {
"rx_lane0_sync_clk",
"rx_lane1_sync_clk";
clocks =
- <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
@@ -1936,7 +1934,6 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
freq-table-hz =
- <75000000 300000000>,
<75000000 300000000>,
<0 0>,
<0 0>,
--
2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 61+ messages in thread
* Re: [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-07 3:24 ` Rob Herring
-1 siblings, 0 replies; 61+ messages in thread
From: Rob Herring @ 2022-03-07 3:24 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Matthias Brugger, Andy Gross, Jan Kotas, linux-arm-msm,
linux-scsi, Rob Herring, Avri Altman, Wei Xu, devicetree,
Bjorn Andersson, Vignesh Raghavendra, linux-arm-kernel,
linux-mediatek, linux-samsung-soc, Alim Akhtar, Li Wei,
linux-kernel, Stanley Chu
On Sun, 06 Mar 2022 12:11:16 +0100, Krzysztof Kozlowski wrote:
> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
> format.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
> 3 files changed, 71 insertions(+), 36 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: freq-table-hz: 'anyOf' conditional failed, one must be fixed:
[[0, 0], [0, 0]] is too long
[0, 0] is too long
From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/property-units.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1601674
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 03/12] dt-bindings: ufs: cdns, ufshc: convert to dtschema
@ 2022-03-07 3:24 ` Rob Herring
0 siblings, 0 replies; 61+ messages in thread
From: Rob Herring @ 2022-03-07 3:24 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Matthias Brugger, Andy Gross, Jan Kotas, linux-arm-msm,
linux-scsi, Rob Herring, Avri Altman, Wei Xu, devicetree,
Bjorn Andersson, Vignesh Raghavendra, linux-arm-kernel,
linux-mediatek, linux-samsung-soc, Alim Akhtar, Li Wei,
linux-kernel, Stanley Chu
On Sun, 06 Mar 2022 12:11:16 +0100, Krzysztof Kozlowski wrote:
> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
> format.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
> 3 files changed, 71 insertions(+), 36 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: freq-table-hz: 'anyOf' conditional failed, one must be fixed:
[[0, 0], [0, 0]] is too long
[0, 0] is too long
From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/property-units.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1601674
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 03/12] dt-bindings: ufs: cdns, ufshc: convert to dtschema
@ 2022-03-07 3:24 ` Rob Herring
0 siblings, 0 replies; 61+ messages in thread
From: Rob Herring @ 2022-03-07 3:24 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Matthias Brugger, Andy Gross, Jan Kotas, linux-arm-msm,
linux-scsi, Rob Herring, Avri Altman, Wei Xu, devicetree,
Bjorn Andersson, Vignesh Raghavendra, linux-arm-kernel,
linux-mediatek, linux-samsung-soc, Alim Akhtar, Li Wei,
linux-kernel, Stanley Chu
On Sun, 06 Mar 2022 12:11:16 +0100, Krzysztof Kozlowski wrote:
> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
> format.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
> 3 files changed, 71 insertions(+), 36 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: freq-table-hz: 'anyOf' conditional failed, one must be fixed:
[[0, 0], [0, 0]] is too long
[0, 0] is too long
From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/property-units.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/1601674
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
2022-03-07 3:24 ` Rob Herring
(?)
@ 2022-03-07 9:10 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-07 9:10 UTC (permalink / raw)
To: Rob Herring
Cc: Matthias Brugger, Andy Gross, Jan Kotas, linux-arm-msm,
linux-scsi, Rob Herring, Avri Altman, Wei Xu, devicetree,
Bjorn Andersson, Vignesh Raghavendra, linux-arm-kernel,
linux-mediatek, linux-samsung-soc, Alim Akhtar, Li Wei,
linux-kernel, Stanley Chu
On 07/03/2022 04:24, Rob Herring wrote:
> On Sun, 06 Mar 2022 12:11:16 +0100, Krzysztof Kozlowski wrote:
>> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
>> format.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> ---
>> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
>> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
>> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
>> 3 files changed, 71 insertions(+), 36 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
>> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: freq-table-hz: 'anyOf' conditional failed, one must be fixed:
> [[0, 0], [0, 0]] is too long
> [0, 0] is too long
> From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/property-units.yaml
>
This will be fixed with my dtschema patch:
https://github.com/devicetree-org/dt-schema/pull/69
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
@ 2022-03-07 9:10 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-07 9:10 UTC (permalink / raw)
To: Rob Herring
Cc: Matthias Brugger, Andy Gross, Jan Kotas, linux-arm-msm,
linux-scsi, Rob Herring, Avri Altman, Wei Xu, devicetree,
Bjorn Andersson, Vignesh Raghavendra, linux-arm-kernel,
linux-mediatek, linux-samsung-soc, Alim Akhtar, Li Wei,
linux-kernel, Stanley Chu
On 07/03/2022 04:24, Rob Herring wrote:
> On Sun, 06 Mar 2022 12:11:16 +0100, Krzysztof Kozlowski wrote:
>> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
>> format.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> ---
>> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
>> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
>> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
>> 3 files changed, 71 insertions(+), 36 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
>> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: freq-table-hz: 'anyOf' conditional failed, one must be fixed:
> [[0, 0], [0, 0]] is too long
> [0, 0] is too long
> From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/property-units.yaml
>
This will be fixed with my dtschema patch:
https://github.com/devicetree-org/dt-schema/pull/69
Best regards,
Krzysztof
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
@ 2022-03-07 9:10 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-07 9:10 UTC (permalink / raw)
To: Rob Herring
Cc: Matthias Brugger, Andy Gross, Jan Kotas, linux-arm-msm,
linux-scsi, Rob Herring, Avri Altman, Wei Xu, devicetree,
Bjorn Andersson, Vignesh Raghavendra, linux-arm-kernel,
linux-mediatek, linux-samsung-soc, Alim Akhtar, Li Wei,
linux-kernel, Stanley Chu
On 07/03/2022 04:24, Rob Herring wrote:
> On Sun, 06 Mar 2022 12:11:16 +0100, Krzysztof Kozlowski wrote:
>> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
>> format.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> ---
>> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---------
>> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++++++++++++++++
>> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
>> 3 files changed, 71 insertions(+), 36 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
>> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: freq-table-hz: 'anyOf' conditional failed, one must be fixed:
> [[0, 0], [0, 0]] is too long
> [0, 0] is too long
> From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/property-units.yaml
>
This will be fixed with my dtschema patch:
https://github.com/devicetree-org/dt-schema/pull/69
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* RE: [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-07 18:36 ` Alim Akhtar
-1 siblings, 0 replies; 61+ messages in thread
From: Alim Akhtar @ 2022-03-07 18:36 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Avri Altman',
'Rob Herring', 'Andy Gross',
'Bjorn Andersson', 'Wei Xu',
'Matthias Brugger', 'Jan Kotas', 'Li Wei',
'Stanley Chu', 'Vignesh Raghavendra',
linux-scsi, devicetree, linux-kernel, linux-arm-msm,
linux-arm-kernel, linux-samsung-soc, linux-mediatek
Hi Krzysztof
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com]
>Sent: Sunday, March 6, 2022 4:41 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>; Avri Altman
><avri.altman@wdc.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@canonical.com>; Andy Gross
><agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; Wei
>Xu <xuwei5@hisilicon.com>; Matthias Brugger <matthias.bgg@gmail.com>;
>Jan Kotas <jank@cadence.com>; Li Wei <liwei213@huawei.com>; Stanley Chu
><stanley.chu@mediatek.com>; Vignesh Raghavendra <vigneshr@ti.com>;
>linux-scsi@vger.kernel.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
>mediatek@lists.infradead.org
>Subject: [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
>
>Add bindings for common parts (platform) of Universal Flash Storage
>(UFS) Host Controllers in dtschema format.
>
>Include also the bindings directory in the UFS maintainers entry.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> .../devicetree/bindings/ufs/ufs-common.yaml | 82 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 83 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-
>common.yaml
>
>diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>new file mode 100644
>index 000000000000..47a4e9e1a775
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>@@ -0,0 +1,82 @@
>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2
>+---
>+$id:
>+https://protect2.fireeye.com/v1/url?k=1c5f8d40-43c4b442-1c5e060f-0cc47a
>+31381a-044442c4c340dc87&q=1&e=f6b89910-3420-4a58-a18d-
>4ca02e079c2b&u=ht
>+tp%3A%2F%2Fdevicetree.org%2Fschemas%2Fufs%2Fufs-common.yaml%23
>+$schema:
>+https://protect2.fireeye.com/v1/url?k=bc24c591-e3bffc93-bc254ede-0cc47a
>+31381a-e9aaf10c3795a198&q=1&e=f6b89910-3420-4a58-a18d-
>4ca02e079c2b&u=ht
>+tp%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
>+
>+title: Common properties for Universal Flash Storage (UFS) Host
>+Controllers
>+
>+maintainers:
>+ - Alim Akhtar <alim.akhtar@samsung.com>
>+ - Avri Altman <avri.altman@wdc.com>
>+
>+properties:
>+ clocks: true
>+
>+ clock-names: true
>+
>+ freq-table-hz:
>+ items:
>+ items:
>+ - description: Minimum frequency for given clock in Hz
>+ - description: Maximum frequency for given clock in Hz
>+ description: |
>+ Array of <min max> operating frequencies in Hz stored in the same
order
>+ as the clocks property. If this property is not defined or a value
in the
>+ array is "0" then it is assumed that the frequency is set by the
parent
>+ clock or a fixed rate clock source.
>+
>+ interrupts:
>+ maxItems: 1
>+
>+ lanes-per-direction:
>+ $ref: /schemas/types.yaml#/definitions/uint32
>+ enum: [1, 2]
>+ default: 2
>+ description:
>+ Number of lanes available per direction. Note that it is assume
same
>+ number of lanes is used both directions at once.
>+
>+ vdd-hba-supply:
>+ description:
>+ Phandle to UFS host controller supply regulator node.
>+
>+ vcc-supply:
>+ description:
>+ Phandle to VCC supply regulator node.
>+
>+ vccq-supply:
>+ description:
>+ Phandle to VCCQ supply regulator node.
>+
>+ vccq2-supply:
>+ description:
>+ Phandle to VCCQ2 supply regulator node.
>+
>+ vcc-supply-1p8:
>+ type: boolean
>+ description:
>+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V.
This
>+ boolean property when set, specifies to use low voltage range of
>+ 1.7-1.95V. Note for external UFS cards this property is invalid and
valid
>+ VCC range is always 2.7-3.6V.
>+
>+ vcc-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCC supply.
>+
>+ vccq-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCCQ supply.
>+
>+ vccq2-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCCQ2 supply.
>+
>+dependencies:
>+ freq-table-hz: [ 'clocks' ]
>+
>+required:
>+ - interrupts
>+
>+additionalProperties: true
>diff --git a/MAINTAINERS b/MAINTAINERS
>index d7ea92ce1b1d..ef16268b6ca6 100644
>--- a/MAINTAINERS
>+++ b/MAINTAINERS
>@@ -20100,6 +20100,7 @@ R: Alim Akhtar <alim.akhtar@samsung.com>
> R: Avri Altman <avri.altman@wdc.com>
> L: linux-scsi@vger.kernel.org
> S: Supported
>+F: Documentation/devicetree/bindings/ufs/
> F: Documentation/scsi/ufs.rst
> F: drivers/scsi/ufs/
>
>--
>2.32.0
^ permalink raw reply [flat|nested] 61+ messages in thread
* RE: [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
@ 2022-03-07 18:36 ` Alim Akhtar
0 siblings, 0 replies; 61+ messages in thread
From: Alim Akhtar @ 2022-03-07 18:36 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Avri Altman',
'Rob Herring', 'Andy Gross',
'Bjorn Andersson', 'Wei Xu',
'Matthias Brugger', 'Jan Kotas', 'Li Wei',
'Stanley Chu', 'Vignesh Raghavendra',
linux-scsi, devicetree, linux-kernel, linux-arm-msm,
linux-arm-kernel, linux-samsung-soc, linux-mediatek
Hi Krzysztof
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com]
>Sent: Sunday, March 6, 2022 4:41 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>; Avri Altman
><avri.altman@wdc.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@canonical.com>; Andy Gross
><agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; Wei
>Xu <xuwei5@hisilicon.com>; Matthias Brugger <matthias.bgg@gmail.com>;
>Jan Kotas <jank@cadence.com>; Li Wei <liwei213@huawei.com>; Stanley Chu
><stanley.chu@mediatek.com>; Vignesh Raghavendra <vigneshr@ti.com>;
>linux-scsi@vger.kernel.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
>mediatek@lists.infradead.org
>Subject: [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
>
>Add bindings for common parts (platform) of Universal Flash Storage
>(UFS) Host Controllers in dtschema format.
>
>Include also the bindings directory in the UFS maintainers entry.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> .../devicetree/bindings/ufs/ufs-common.yaml | 82 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 83 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-
>common.yaml
>
>diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>new file mode 100644
>index 000000000000..47a4e9e1a775
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>@@ -0,0 +1,82 @@
>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2
>+---
>+$id:
>+https://protect2.fireeye.com/v1/url?k=1c5f8d40-43c4b442-1c5e060f-0cc47a
>+31381a-044442c4c340dc87&q=1&e=f6b89910-3420-4a58-a18d-
>4ca02e079c2b&u=ht
>+tp%3A%2F%2Fdevicetree.org%2Fschemas%2Fufs%2Fufs-common.yaml%23
>+$schema:
>+https://protect2.fireeye.com/v1/url?k=bc24c591-e3bffc93-bc254ede-0cc47a
>+31381a-e9aaf10c3795a198&q=1&e=f6b89910-3420-4a58-a18d-
>4ca02e079c2b&u=ht
>+tp%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
>+
>+title: Common properties for Universal Flash Storage (UFS) Host
>+Controllers
>+
>+maintainers:
>+ - Alim Akhtar <alim.akhtar@samsung.com>
>+ - Avri Altman <avri.altman@wdc.com>
>+
>+properties:
>+ clocks: true
>+
>+ clock-names: true
>+
>+ freq-table-hz:
>+ items:
>+ items:
>+ - description: Minimum frequency for given clock in Hz
>+ - description: Maximum frequency for given clock in Hz
>+ description: |
>+ Array of <min max> operating frequencies in Hz stored in the same
order
>+ as the clocks property. If this property is not defined or a value
in the
>+ array is "0" then it is assumed that the frequency is set by the
parent
>+ clock or a fixed rate clock source.
>+
>+ interrupts:
>+ maxItems: 1
>+
>+ lanes-per-direction:
>+ $ref: /schemas/types.yaml#/definitions/uint32
>+ enum: [1, 2]
>+ default: 2
>+ description:
>+ Number of lanes available per direction. Note that it is assume
same
>+ number of lanes is used both directions at once.
>+
>+ vdd-hba-supply:
>+ description:
>+ Phandle to UFS host controller supply regulator node.
>+
>+ vcc-supply:
>+ description:
>+ Phandle to VCC supply regulator node.
>+
>+ vccq-supply:
>+ description:
>+ Phandle to VCCQ supply regulator node.
>+
>+ vccq2-supply:
>+ description:
>+ Phandle to VCCQ2 supply regulator node.
>+
>+ vcc-supply-1p8:
>+ type: boolean
>+ description:
>+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V.
This
>+ boolean property when set, specifies to use low voltage range of
>+ 1.7-1.95V. Note for external UFS cards this property is invalid and
valid
>+ VCC range is always 2.7-3.6V.
>+
>+ vcc-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCC supply.
>+
>+ vccq-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCCQ supply.
>+
>+ vccq2-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCCQ2 supply.
>+
>+dependencies:
>+ freq-table-hz: [ 'clocks' ]
>+
>+required:
>+ - interrupts
>+
>+additionalProperties: true
>diff --git a/MAINTAINERS b/MAINTAINERS
>index d7ea92ce1b1d..ef16268b6ca6 100644
>--- a/MAINTAINERS
>+++ b/MAINTAINERS
>@@ -20100,6 +20100,7 @@ R: Alim Akhtar <alim.akhtar@samsung.com>
> R: Avri Altman <avri.altman@wdc.com>
> L: linux-scsi@vger.kernel.org
> S: Supported
>+F: Documentation/devicetree/bindings/ufs/
> F: Documentation/scsi/ufs.rst
> F: drivers/scsi/ufs/
>
>--
>2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* RE: [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
@ 2022-03-07 18:36 ` Alim Akhtar
0 siblings, 0 replies; 61+ messages in thread
From: Alim Akhtar @ 2022-03-07 18:36 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Avri Altman',
'Rob Herring', 'Andy Gross',
'Bjorn Andersson', 'Wei Xu',
'Matthias Brugger', 'Jan Kotas', 'Li Wei',
'Stanley Chu', 'Vignesh Raghavendra',
linux-scsi, devicetree, linux-kernel, linux-arm-msm,
linux-arm-kernel, linux-samsung-soc, linux-mediatek
Hi Krzysztof
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com]
>Sent: Sunday, March 6, 2022 4:41 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>; Avri Altman
><avri.altman@wdc.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@canonical.com>; Andy Gross
><agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; Wei
>Xu <xuwei5@hisilicon.com>; Matthias Brugger <matthias.bgg@gmail.com>;
>Jan Kotas <jank@cadence.com>; Li Wei <liwei213@huawei.com>; Stanley Chu
><stanley.chu@mediatek.com>; Vignesh Raghavendra <vigneshr@ti.com>;
>linux-scsi@vger.kernel.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
>mediatek@lists.infradead.org
>Subject: [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings
>
>Add bindings for common parts (platform) of Universal Flash Storage
>(UFS) Host Controllers in dtschema format.
>
>Include also the bindings directory in the UFS maintainers entry.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> .../devicetree/bindings/ufs/ufs-common.yaml | 82 +++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 83 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-
>common.yaml
>
>diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>new file mode 100644
>index 000000000000..47a4e9e1a775
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
>@@ -0,0 +1,82 @@
>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2
>+---
>+$id:
>+https://protect2.fireeye.com/v1/url?k=1c5f8d40-43c4b442-1c5e060f-0cc47a
>+31381a-044442c4c340dc87&q=1&e=f6b89910-3420-4a58-a18d-
>4ca02e079c2b&u=ht
>+tp%3A%2F%2Fdevicetree.org%2Fschemas%2Fufs%2Fufs-common.yaml%23
>+$schema:
>+https://protect2.fireeye.com/v1/url?k=bc24c591-e3bffc93-bc254ede-0cc47a
>+31381a-e9aaf10c3795a198&q=1&e=f6b89910-3420-4a58-a18d-
>4ca02e079c2b&u=ht
>+tp%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
>+
>+title: Common properties for Universal Flash Storage (UFS) Host
>+Controllers
>+
>+maintainers:
>+ - Alim Akhtar <alim.akhtar@samsung.com>
>+ - Avri Altman <avri.altman@wdc.com>
>+
>+properties:
>+ clocks: true
>+
>+ clock-names: true
>+
>+ freq-table-hz:
>+ items:
>+ items:
>+ - description: Minimum frequency for given clock in Hz
>+ - description: Maximum frequency for given clock in Hz
>+ description: |
>+ Array of <min max> operating frequencies in Hz stored in the same
order
>+ as the clocks property. If this property is not defined or a value
in the
>+ array is "0" then it is assumed that the frequency is set by the
parent
>+ clock or a fixed rate clock source.
>+
>+ interrupts:
>+ maxItems: 1
>+
>+ lanes-per-direction:
>+ $ref: /schemas/types.yaml#/definitions/uint32
>+ enum: [1, 2]
>+ default: 2
>+ description:
>+ Number of lanes available per direction. Note that it is assume
same
>+ number of lanes is used both directions at once.
>+
>+ vdd-hba-supply:
>+ description:
>+ Phandle to UFS host controller supply regulator node.
>+
>+ vcc-supply:
>+ description:
>+ Phandle to VCC supply regulator node.
>+
>+ vccq-supply:
>+ description:
>+ Phandle to VCCQ supply regulator node.
>+
>+ vccq2-supply:
>+ description:
>+ Phandle to VCCQ2 supply regulator node.
>+
>+ vcc-supply-1p8:
>+ type: boolean
>+ description:
>+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V.
This
>+ boolean property when set, specifies to use low voltage range of
>+ 1.7-1.95V. Note for external UFS cards this property is invalid and
valid
>+ VCC range is always 2.7-3.6V.
>+
>+ vcc-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCC supply.
>+
>+ vccq-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCCQ supply.
>+
>+ vccq2-max-microamp:
>+ description:
>+ Specifies max. load that can be drawn from VCCQ2 supply.
>+
>+dependencies:
>+ freq-table-hz: [ 'clocks' ]
>+
>+required:
>+ - interrupts
>+
>+additionalProperties: true
>diff --git a/MAINTAINERS b/MAINTAINERS
>index d7ea92ce1b1d..ef16268b6ca6 100644
>--- a/MAINTAINERS
>+++ b/MAINTAINERS
>@@ -20100,6 +20100,7 @@ R: Alim Akhtar <alim.akhtar@samsung.com>
> R: Avri Altman <avri.altman@wdc.com>
> L: linux-scsi@vger.kernel.org
> S: Supported
>+F: Documentation/devicetree/bindings/ufs/
> F: Documentation/scsi/ufs.rst
> F: drivers/scsi/ufs/
>
>--
>2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* RE: [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common bindings
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-07 18:39 ` Alim Akhtar
-1 siblings, 0 replies; 61+ messages in thread
From: Alim Akhtar @ 2022-03-07 18:39 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Avri Altman',
'Rob Herring', 'Andy Gross',
'Bjorn Andersson', 'Wei Xu',
'Matthias Brugger', 'Jan Kotas', 'Li Wei',
'Stanley Chu', 'Vignesh Raghavendra',
linux-scsi, devicetree, linux-kernel, linux-arm-msm,
linux-arm-kernel, linux-samsung-soc, linux-mediatek
Cc: 'Rob Herring'
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com]
>Sent: Sunday, March 6, 2022 4:41 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>; Avri Altman
><avri.altman@wdc.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@canonical.com>; Andy Gross
><agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; Wei
>Xu <xuwei5@hisilicon.com>; Matthias Brugger <matthias.bgg@gmail.com>;
>Jan Kotas <jank@cadence.com>; Li Wei <liwei213@huawei.com>; Stanley Chu
><stanley.chu@mediatek.com>; Vignesh Raghavendra <vigneshr@ti.com>;
>linux-scsi@vger.kernel.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
>mediatek@lists.infradead.org
>Cc: Rob Herring <robh@kernel.org>
>Subject: [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common
>bindings
>
>Use common UFS bindings in Samsung Exynos UFS to cover generic/common
>properties in DTS.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>Reviewed-by: Rob Herring <robh@kernel.org>
>---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++---------
> 1 file changed, 4 insertions(+), 9 deletions(-)
>
>diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-
>ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-
>ufs.yaml
>index 95ac1c18334d..c949eb617313 100644
>--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>@@ -11,12 +11,11 @@ maintainers:
>
> description: |
> Each Samsung UFS host controller instance should have its own node.
>- This binding define Samsung specific binding other then what is used
>- in the common ufshcd bindings
>- [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>
>-properties:
>+allOf:
>+ - $ref: ufs-common.yaml
>
>+properties:
> compatible:
> enum:
> - samsung,exynos7-ufs
>@@ -47,9 +46,6 @@ properties:
> - const: core_clk
> - const: sclk_unipro_main
>
>- interrupts:
>- maxItems: 1
>-
> phys:
> maxItems: 1
>
>@@ -67,13 +63,12 @@ properties:
> required:
> - compatible
> - reg
>- - interrupts
> - phys
> - phy-names
> - clocks
> - clock-names
>
>-additionalProperties: false
>+unevaluatedProperties: false
>
> examples:
> - |
>--
>2.32.0
^ permalink raw reply [flat|nested] 61+ messages in thread
* RE: [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common bindings
@ 2022-03-07 18:39 ` Alim Akhtar
0 siblings, 0 replies; 61+ messages in thread
From: Alim Akhtar @ 2022-03-07 18:39 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Avri Altman',
'Rob Herring', 'Andy Gross',
'Bjorn Andersson', 'Wei Xu',
'Matthias Brugger', 'Jan Kotas', 'Li Wei',
'Stanley Chu', 'Vignesh Raghavendra',
linux-scsi, devicetree, linux-kernel, linux-arm-msm,
linux-arm-kernel, linux-samsung-soc, linux-mediatek
Cc: 'Rob Herring'
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com]
>Sent: Sunday, March 6, 2022 4:41 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>; Avri Altman
><avri.altman@wdc.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@canonical.com>; Andy Gross
><agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; Wei
>Xu <xuwei5@hisilicon.com>; Matthias Brugger <matthias.bgg@gmail.com>;
>Jan Kotas <jank@cadence.com>; Li Wei <liwei213@huawei.com>; Stanley Chu
><stanley.chu@mediatek.com>; Vignesh Raghavendra <vigneshr@ti.com>;
>linux-scsi@vger.kernel.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
>mediatek@lists.infradead.org
>Cc: Rob Herring <robh@kernel.org>
>Subject: [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common
>bindings
>
>Use common UFS bindings in Samsung Exynos UFS to cover generic/common
>properties in DTS.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>Reviewed-by: Rob Herring <robh@kernel.org>
>---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++---------
> 1 file changed, 4 insertions(+), 9 deletions(-)
>
>diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-
>ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-
>ufs.yaml
>index 95ac1c18334d..c949eb617313 100644
>--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>@@ -11,12 +11,11 @@ maintainers:
>
> description: |
> Each Samsung UFS host controller instance should have its own node.
>- This binding define Samsung specific binding other then what is used
>- in the common ufshcd bindings
>- [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>
>-properties:
>+allOf:
>+ - $ref: ufs-common.yaml
>
>+properties:
> compatible:
> enum:
> - samsung,exynos7-ufs
>@@ -47,9 +46,6 @@ properties:
> - const: core_clk
> - const: sclk_unipro_main
>
>- interrupts:
>- maxItems: 1
>-
> phys:
> maxItems: 1
>
>@@ -67,13 +63,12 @@ properties:
> required:
> - compatible
> - reg
>- - interrupts
> - phys
> - phy-names
> - clocks
> - clock-names
>
>-additionalProperties: false
>+unevaluatedProperties: false
>
> examples:
> - |
>--
>2.32.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* RE: [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common bindings
@ 2022-03-07 18:39 ` Alim Akhtar
0 siblings, 0 replies; 61+ messages in thread
From: Alim Akhtar @ 2022-03-07 18:39 UTC (permalink / raw)
To: 'Krzysztof Kozlowski', 'Avri Altman',
'Rob Herring', 'Andy Gross',
'Bjorn Andersson', 'Wei Xu',
'Matthias Brugger', 'Jan Kotas', 'Li Wei',
'Stanley Chu', 'Vignesh Raghavendra',
linux-scsi, devicetree, linux-kernel, linux-arm-msm,
linux-arm-kernel, linux-samsung-soc, linux-mediatek
Cc: 'Rob Herring'
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com]
>Sent: Sunday, March 6, 2022 4:41 PM
>To: Alim Akhtar <alim.akhtar@samsung.com>; Avri Altman
><avri.altman@wdc.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof
>Kozlowski <krzysztof.kozlowski@canonical.com>; Andy Gross
><agross@kernel.org>; Bjorn Andersson <bjorn.andersson@linaro.org>; Wei
>Xu <xuwei5@hisilicon.com>; Matthias Brugger <matthias.bgg@gmail.com>;
>Jan Kotas <jank@cadence.com>; Li Wei <liwei213@huawei.com>; Stanley Chu
><stanley.chu@mediatek.com>; Vignesh Raghavendra <vigneshr@ti.com>;
>linux-scsi@vger.kernel.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-arm-
>kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
>mediatek@lists.infradead.org
>Cc: Rob Herring <robh@kernel.org>
>Subject: [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common
>bindings
>
>Use common UFS bindings in Samsung Exynos UFS to cover generic/common
>properties in DTS.
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>Reviewed-by: Rob Herring <robh@kernel.org>
>---
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
> .../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 13 ++++---------
> 1 file changed, 4 insertions(+), 9 deletions(-)
>
>diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-
>ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-
>ufs.yaml
>index 95ac1c18334d..c949eb617313 100644
>--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
>@@ -11,12 +11,11 @@ maintainers:
>
> description: |
> Each Samsung UFS host controller instance should have its own node.
>- This binding define Samsung specific binding other then what is used
>- in the common ufshcd bindings
>- [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>
>-properties:
>+allOf:
>+ - $ref: ufs-common.yaml
>
>+properties:
> compatible:
> enum:
> - samsung,exynos7-ufs
>@@ -47,9 +46,6 @@ properties:
> - const: core_clk
> - const: sclk_unipro_main
>
>- interrupts:
>- maxItems: 1
>-
> phys:
> maxItems: 1
>
>@@ -67,13 +63,12 @@ properties:
> required:
> - compatible
> - reg
>- - interrupts
> - phys
> - phy-names
> - clocks
> - clock-names
>
>-additionalProperties: false
>+unevaluatedProperties: false
>
> examples:
> - |
>--
>2.32.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-03-09 2:00 ` Rob Herring
-1 siblings, 0 replies; 61+ messages in thread
From: Rob Herring @ 2022-03-09 2:00 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Alim Akhtar, Avri Altman, Andy Gross, Bjorn Andersson, Wei Xu,
Matthias Brugger, Jan Kotas, Li Wei, Stanley Chu,
Vignesh Raghavendra, linux-scsi, devicetree, linux-kernel,
linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
On Sun, Mar 06, 2022 at 12:11:13PM +0100, Krzysztof Kozlowski wrote:
> Hi,
>
> Not tested on hardware, so please kindly test.
> Bindings maintainers might need checking - taken from git log.
>
> Changes since v2
> ================
> 1. Do not deprecate freq-table-hz, but instead update dtschema to accept
> uint32-matrix. See:
> https://github.com/devicetree-org/dt-schema/pull/69
> 2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
> 3. Add tags.
> 4. Change maintainer of qcom,ufs.
>
> Changes since v1
> ================
> 1. Make freq-table as matrix of tuples (Nishanth).
> 2. New patches: convert all bindings and fix up DTS files.
> 3. Several minor fixes in UFS bindings.
>
> Dependencies
> ============
> None dependencies. The DTS patches can go independently via respective
> maintainers. The dt-bindings patches could go via UFS tree.
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (12):
> dt-bindings: ufs: add common platform bindings
> dt-bindings: ufs: samsung,exynos-ufs: use common bindings
> dt-bindings: ufs: cdns,ufshc: convert to dtschema
> dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
> dt-bindings: ufs: qcom,ufs: convert to dtschema
> dt-bindings: ufs: hisilicon,ufs: convert to dtschema
> dt-bindings: ufs: mediatek,ufs: convert to dtschema
> dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
Patches 1-8 applied.
Rob
> arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
> arm64: dts: qcom: msm8996: drop unsupported UFS
> vddp-ref-clk-max-microamp
> arm64: dts: qcom: msm8996: correct UFS compatible
> arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
>
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++
> .../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++
> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++
> .../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
> .../bindings/ufs/samsung,exynos-ufs.yaml | 13 +-
> .../bindings/ufs/snps,tc-dwc-g210.yaml | 51 ++++
> .../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 --
> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
> .../devicetree/bindings/ufs/ufs-common.yaml | 82 ++++++
> .../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---
> .../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ----
> .../devicetree/bindings/ufs/ufs-qcom.txt | 63 -----
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
> MAINTAINERS | 1 +
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 +-
> arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
> .../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 +-
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 -
> 20 files changed, 614 insertions(+), 320 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
> delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>
> --
> 2.32.0
>
>
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
@ 2022-03-09 2:00 ` Rob Herring
0 siblings, 0 replies; 61+ messages in thread
From: Rob Herring @ 2022-03-09 2:00 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Alim Akhtar, Avri Altman, Andy Gross, Bjorn Andersson, Wei Xu,
Matthias Brugger, Jan Kotas, Li Wei, Stanley Chu,
Vignesh Raghavendra, linux-scsi, devicetree, linux-kernel,
linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
On Sun, Mar 06, 2022 at 12:11:13PM +0100, Krzysztof Kozlowski wrote:
> Hi,
>
> Not tested on hardware, so please kindly test.
> Bindings maintainers might need checking - taken from git log.
>
> Changes since v2
> ================
> 1. Do not deprecate freq-table-hz, but instead update dtschema to accept
> uint32-matrix. See:
> https://github.com/devicetree-org/dt-schema/pull/69
> 2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
> 3. Add tags.
> 4. Change maintainer of qcom,ufs.
>
> Changes since v1
> ================
> 1. Make freq-table as matrix of tuples (Nishanth).
> 2. New patches: convert all bindings and fix up DTS files.
> 3. Several minor fixes in UFS bindings.
>
> Dependencies
> ============
> None dependencies. The DTS patches can go independently via respective
> maintainers. The dt-bindings patches could go via UFS tree.
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (12):
> dt-bindings: ufs: add common platform bindings
> dt-bindings: ufs: samsung,exynos-ufs: use common bindings
> dt-bindings: ufs: cdns,ufshc: convert to dtschema
> dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
> dt-bindings: ufs: qcom,ufs: convert to dtschema
> dt-bindings: ufs: hisilicon,ufs: convert to dtschema
> dt-bindings: ufs: mediatek,ufs: convert to dtschema
> dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
Patches 1-8 applied.
Rob
> arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
> arm64: dts: qcom: msm8996: drop unsupported UFS
> vddp-ref-clk-max-microamp
> arm64: dts: qcom: msm8996: correct UFS compatible
> arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
>
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++
> .../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++
> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++
> .../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
> .../bindings/ufs/samsung,exynos-ufs.yaml | 13 +-
> .../bindings/ufs/snps,tc-dwc-g210.yaml | 51 ++++
> .../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 --
> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
> .../devicetree/bindings/ufs/ufs-common.yaml | 82 ++++++
> .../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---
> .../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ----
> .../devicetree/bindings/ufs/ufs-qcom.txt | 63 -----
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
> MAINTAINERS | 1 +
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 +-
> arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
> .../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 +-
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 -
> 20 files changed, 614 insertions(+), 320 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
> delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>
> --
> 2.32.0
>
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
@ 2022-03-09 2:00 ` Rob Herring
0 siblings, 0 replies; 61+ messages in thread
From: Rob Herring @ 2022-03-09 2:00 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Alim Akhtar, Avri Altman, Andy Gross, Bjorn Andersson, Wei Xu,
Matthias Brugger, Jan Kotas, Li Wei, Stanley Chu,
Vignesh Raghavendra, linux-scsi, devicetree, linux-kernel,
linux-arm-msm, linux-arm-kernel, linux-samsung-soc,
linux-mediatek
On Sun, Mar 06, 2022 at 12:11:13PM +0100, Krzysztof Kozlowski wrote:
> Hi,
>
> Not tested on hardware, so please kindly test.
> Bindings maintainers might need checking - taken from git log.
>
> Changes since v2
> ================
> 1. Do not deprecate freq-table-hz, but instead update dtschema to accept
> uint32-matrix. See:
> https://github.com/devicetree-org/dt-schema/pull/69
> 2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
> 3. Add tags.
> 4. Change maintainer of qcom,ufs.
>
> Changes since v1
> ================
> 1. Make freq-table as matrix of tuples (Nishanth).
> 2. New patches: convert all bindings and fix up DTS files.
> 3. Several minor fixes in UFS bindings.
>
> Dependencies
> ============
> None dependencies. The DTS patches can go independently via respective
> maintainers. The dt-bindings patches could go via UFS tree.
>
> Best regards,
> Krzysztof
>
> Krzysztof Kozlowski (12):
> dt-bindings: ufs: add common platform bindings
> dt-bindings: ufs: samsung,exynos-ufs: use common bindings
> dt-bindings: ufs: cdns,ufshc: convert to dtschema
> dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
> dt-bindings: ufs: qcom,ufs: convert to dtschema
> dt-bindings: ufs: hisilicon,ufs: convert to dtschema
> dt-bindings: ufs: mediatek,ufs: convert to dtschema
> dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
Patches 1-8 applied.
Rob
> arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
> arm64: dts: qcom: msm8996: drop unsupported UFS
> vddp-ref-clk-max-microamp
> arm64: dts: qcom: msm8996: correct UFS compatible
> arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
>
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 ---
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 68 +++++
> .../bindings/ufs/hisilicon,ufs.yaml | 90 +++++++
> .../devicetree/bindings/ufs/mediatek,ufs.yaml | 67 +++++
> .../devicetree/bindings/ufs/qcom,ufs.yaml | 242 ++++++++++++++++++
> .../bindings/ufs/samsung,exynos-ufs.yaml | 13 +-
> .../bindings/ufs/snps,tc-dwc-g210.yaml | 51 ++++
> .../bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 --
> .../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 7 +-
> .../devicetree/bindings/ufs/ufs-common.yaml | 82 ++++++
> .../devicetree/bindings/ufs/ufs-hisi.txt | 42 ---
> .../devicetree/bindings/ufs/ufs-mediatek.txt | 45 ----
> .../devicetree/bindings/ufs/ufs-qcom.txt | 63 -----
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 90 -------
> MAINTAINERS | 1 +
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 +-
> arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
> .../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 -
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 +-
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 -
> 20 files changed, 614 insertions(+), 320 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/hisilicon,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/snps,tc-dwc-g210.yaml
> delete mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufs-qcom.txt
> delete mode 100644 Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>
> --
> 2.32.0
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes
2022-03-06 11:11 ` Krzysztof Kozlowski
` (14 preceding siblings ...)
(?)
@ 2022-04-12 14:30 ` patchwork-bot+linux-arm-msm
-1 siblings, 0 replies; 61+ messages in thread
From: patchwork-bot+linux-arm-msm @ 2022-04-12 14:30 UTC (permalink / raw)
To: Krzysztof Kozlowski; +Cc: linux-arm-msm
Hello:
This series was applied to qcom/linux.git (for-next)
by Bjorn Andersson <bjorn.andersson@linaro.org>:
On Sun, 6 Mar 2022 12:11:13 +0100 you wrote:
> Hi,
>
> Not tested on hardware, so please kindly test.
> Bindings maintainers might need checking - taken from git log.
>
> Changes since v2
> ================
> 1. Do not deprecate freq-table-hz, but instead update dtschema to accept
> uint32-matrix. See:
> https://github.com/devicetree-org/dt-schema/pull/69
> 2. Drop patches and changes related to freq-table-hz -> freq-table conversion.
> 3. Add tags.
> 4. Change maintainer of qcom,ufs.
>
> [...]
Here is the summary with links:
- [v3,01/12] dt-bindings: ufs: add common platform bindings
(no matching commit)
- [v3,02/12] dt-bindings: ufs: samsung,exynos-ufs: use common bindings
(no matching commit)
- [v3,03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema
(no matching commit)
- [v3,04/12] dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings
(no matching commit)
- [v3,05/12] dt-bindings: ufs: qcom,ufs: convert to dtschema
(no matching commit)
- [v3,06/12] dt-bindings: ufs: hisilicon,ufs: convert to dtschema
(no matching commit)
- [v3,07/12] dt-bindings: ufs: mediatek,ufs: convert to dtschema
(no matching commit)
- [v3,08/12] dt-bindings: ufs: snps,tc-dwc-g210: convert to dtschema
(no matching commit)
- [v3,09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
(no matching commit)
- [v3,10/12] arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp
https://git.kernel.org/qcom/c/b32846a38fc2
- [v3,11/12] arm64: dts: qcom: msm8996: correct UFS compatible
https://git.kernel.org/qcom/c/64ff69842443
- [v3,12/12] arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS
https://git.kernel.org/qcom/c/7ba57d11e5bb
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: (subset) [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
2022-03-06 11:11 ` Krzysztof Kozlowski
(?)
@ 2022-04-19 10:12 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-19 10:12 UTC (permalink / raw)
To: Stanley Chu, Alim Akhtar, Andy Gross, linux-kernel,
linux-arm-kernel, Jan Kotas, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Wei Xu, Li Wei, Avri Altman, devicetree,
linux-mediatek, Vignesh Raghavendra, linux-arm-msm,
linux-samsung-soc, linux-scsi, Bjorn Andersson
Cc: Krzysztof Kozlowski
On Sun, 6 Mar 2022 12:11:22 +0100, Krzysztof Kozlowski wrote:
> The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
> which is also easier to read.
>
>
Applied, thanks!
[09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
commit: 65b96377bf9130617ced41f317f3ec387d3e0dc3
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: (subset) [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
@ 2022-04-19 10:12 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-19 10:12 UTC (permalink / raw)
To: Stanley Chu, Alim Akhtar, Andy Gross, linux-kernel,
linux-arm-kernel, Jan Kotas, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Wei Xu, Li Wei, Avri Altman, devicetree,
linux-mediatek, Vignesh Raghavendra, linux-arm-msm,
linux-samsung-soc, linux-scsi, Bjorn Andersson
Cc: Krzysztof Kozlowski
On Sun, 6 Mar 2022 12:11:22 +0100, Krzysztof Kozlowski wrote:
> The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
> which is also easier to read.
>
>
Applied, thanks!
[09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
commit: 65b96377bf9130617ced41f317f3ec387d3e0dc3
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: (subset) [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
@ 2022-04-19 10:12 ` Krzysztof Kozlowski
0 siblings, 0 replies; 61+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-19 10:12 UTC (permalink / raw)
To: Stanley Chu, Alim Akhtar, Andy Gross, linux-kernel,
linux-arm-kernel, Jan Kotas, Rob Herring, Krzysztof Kozlowski,
Matthias Brugger, Wei Xu, Li Wei, Avri Altman, devicetree,
linux-mediatek, Vignesh Raghavendra, linux-arm-msm,
linux-samsung-soc, linux-scsi, Bjorn Andersson
Cc: Krzysztof Kozlowski
On Sun, 6 Mar 2022 12:11:22 +0100, Krzysztof Kozlowski wrote:
> The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
> which is also easier to read.
>
>
Applied, thanks!
[09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
commit: 65b96377bf9130617ced41f317f3ec387d3e0dc3
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: (subset) [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
2022-04-19 10:12 ` Krzysztof Kozlowski
(?)
@ 2022-04-19 11:35 ` Wei Xu
-1 siblings, 0 replies; 61+ messages in thread
From: Wei Xu @ 2022-04-19 11:35 UTC (permalink / raw)
To: Krzysztof Kozlowski, Stanley Chu, Alim Akhtar, Andy Gross,
linux-kernel, linux-arm-kernel, Jan Kotas, Rob Herring,
Krzysztof Kozlowski, Matthias Brugger, Li Wei, Avri Altman,
devicetree, linux-mediatek, Vignesh Raghavendra, linux-arm-msm,
linux-samsung-soc, linux-scsi, Bjorn Andersson
Hi Krzysztof,
On 2022/4/19 18:12, Krzysztof Kozlowski wrote:
> On Sun, 6 Mar 2022 12:11:22 +0100, Krzysztof Kozlowski wrote:
>> The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
>> which is also easier to read.
>>
>>
>
> Applied, thanks!
>
> [09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
> commit: 65b96377bf9130617ced41f317f3ec387d3e0dc3
>
Thanks!
Best Regards,
Wei
> Best regards,
>
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: (subset) [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
@ 2022-04-19 11:35 ` Wei Xu
0 siblings, 0 replies; 61+ messages in thread
From: Wei Xu @ 2022-04-19 11:35 UTC (permalink / raw)
To: Krzysztof Kozlowski, Stanley Chu, Alim Akhtar, Andy Gross,
linux-kernel, linux-arm-kernel, Jan Kotas, Rob Herring,
Krzysztof Kozlowski, Matthias Brugger, Li Wei, Avri Altman,
devicetree, linux-mediatek, Vignesh Raghavendra, linux-arm-msm,
linux-samsung-soc, linux-scsi, Bjorn Andersson
Hi Krzysztof,
On 2022/4/19 18:12, Krzysztof Kozlowski wrote:
> On Sun, 6 Mar 2022 12:11:22 +0100, Krzysztof Kozlowski wrote:
>> The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
>> which is also easier to read.
>>
>>
>
> Applied, thanks!
>
> [09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
> commit: 65b96377bf9130617ced41f317f3ec387d3e0dc3
>
Thanks!
Best Regards,
Wei
> Best regards,
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 61+ messages in thread
* Re: (subset) [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
@ 2022-04-19 11:35 ` Wei Xu
0 siblings, 0 replies; 61+ messages in thread
From: Wei Xu @ 2022-04-19 11:35 UTC (permalink / raw)
To: Krzysztof Kozlowski, Stanley Chu, Alim Akhtar, Andy Gross,
linux-kernel, linux-arm-kernel, Jan Kotas, Rob Herring,
Krzysztof Kozlowski, Matthias Brugger, Li Wei, Avri Altman,
devicetree, linux-mediatek, Vignesh Raghavendra, linux-arm-msm,
linux-samsung-soc, linux-scsi, Bjorn Andersson
Hi Krzysztof,
On 2022/4/19 18:12, Krzysztof Kozlowski wrote:
> On Sun, 6 Mar 2022 12:11:22 +0100, Krzysztof Kozlowski wrote:
>> The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
>> which is also easier to read.
>>
>>
>
> Applied, thanks!
>
> [09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
> commit: 65b96377bf9130617ced41f317f3ec387d3e0dc3
>
Thanks!
Best Regards,
Wei
> Best regards,
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 61+ messages in thread
end of thread, other threads:[~2022-04-19 12:39 UTC | newest]
Thread overview: 61+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-06 11:11 [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 01/12] dt-bindings: ufs: add common platform bindings Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-07 18:36 ` Alim Akhtar
2022-03-07 18:36 ` Alim Akhtar
2022-03-07 18:36 ` Alim Akhtar
2022-03-06 11:11 ` [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: use common bindings Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 02/12] dt-bindings: ufs: samsung, exynos-ufs: " Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-07 18:39 ` [PATCH v3 02/12] dt-bindings: ufs: samsung,exynos-ufs: " Alim Akhtar
2022-03-07 18:39 ` Alim Akhtar
2022-03-07 18:39 ` Alim Akhtar
2022-03-06 11:11 ` [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: convert to dtschema Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-07 3:24 ` Rob Herring
2022-03-07 3:24 ` [PATCH v3 03/12] dt-bindings: ufs: cdns, ufshc: " Rob Herring
2022-03-07 3:24 ` Rob Herring
2022-03-07 9:10 ` [PATCH v3 03/12] dt-bindings: ufs: cdns,ufshc: " Krzysztof Kozlowski
2022-03-07 9:10 ` Krzysztof Kozlowski
2022-03-07 9:10 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 04/12] dt-bindings: ufs: drop unused/old ufs-qcom PHY bindings Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 05/12] dt-bindings: ufs: qcom,ufs: convert to dtschema Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 06/12] dt-bindings: ufs: hisilicon,ufs: " Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 06/12] dt-bindings: ufs: hisilicon, ufs: " Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 07/12] dt-bindings: ufs: mediatek,ufs: " Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 08/12] dt-bindings: ufs: snps,tc-dwc-g210: " Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 08/12] dt-bindings: ufs: snps, tc-dwc-g210: " Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-04-19 10:12 ` (subset) " Krzysztof Kozlowski
2022-04-19 10:12 ` Krzysztof Kozlowski
2022-04-19 10:12 ` Krzysztof Kozlowski
2022-04-19 11:35 ` Wei Xu
2022-04-19 11:35 ` Wei Xu
2022-04-19 11:35 ` Wei Xu
2022-03-06 11:11 ` [PATCH v3 10/12] arm64: dts: qcom: msm8996: drop unsupported UFS vddp-ref-clk-max-microamp Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 11/12] arm64: dts: qcom: msm8996: correct UFS compatible Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` [PATCH v3 12/12] arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-06 11:11 ` Krzysztof Kozlowski
2022-03-09 2:00 ` [PATCH v3 00/12] dt-bindings: ufs: add common platform bindings + fixes Rob Herring
2022-03-09 2:00 ` Rob Herring
2022-03-09 2:00 ` Rob Herring
2022-04-12 14:30 ` patchwork-bot+linux-arm-msm
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.