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From: Miles Chen <miles.chen@mediatek.com>
To: <granquet@baylibre.com>
Cc: <airlied@linux.ie>, <angelogioacchino.delregno@collabora.com>,
	<chunfeng.yun@mediatek.com>, <chunkuang.hu@kernel.org>,
	<ck.hu@mediatek.com>, <daniel@ffwll.ch>, <deller@gmx.de>,
	<devicetree@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
	<jitao.shi@mediatek.com>, <kishon@ti.com>, <krzk+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <markyacoub@google.com>,
	<matthias.bgg@gmail.com>, <mripard@kernel.org>,
	<msp@baylibre.com>, <p.zabel@pengutronix.de>,
	<robh+dt@kernel.org>, <tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v9 02/22] dt-bindings: mediatek,dp: Add Display Port binding
Date: Wed, 30 Mar 2022 13:12:02 +0800	[thread overview]
Message-ID: <20220330051202.19594-1-miles.chen@mediatek.com> (raw)
In-Reply-To: <20220327223927.20848-3-granquet@baylibre.com>

>This controller is present on several mediatek hardware. Currently
>mt8195 and mt8395 have this controller without a functional difference,
>so only one compatible field is added.
>
>The controller can have two forms, as a normal display port and as an
>embedded display port.
>
>Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
>Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
>---
> .../display/mediatek/mediatek,dp.yaml         | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>
>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>new file mode 100644
>index 000000000000..802cc406c72b
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>@@ -0,0 +1,100 @@
>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>+%YAML 1.2
>+---
>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
>+$schema: http://devicetree.org/meta-schemas/core.yaml#
>+
>+title: Mediatek Display Port Controller

s/Mediatek/MediaTek/

>+
>+maintainers:
>+  - CK Hu <ck.hu@mediatek.com>
>+  - Jitao shi <jitao.shi@mediatek.com>
>+
>+description: |
>+  Device tree bindings for the Mediatek (embedded) Display Port controller

s/Mediatek/MediaTek/

>+  present on some Mediatek SoCs.

s/Mediatek/MediaTek/

>+
>+properties:
>+  compatible:
>+    items:
>+      - const: mediatek,mt8195-dp-tx
>+      - const: syscon
>+
>+  reg:
>+    maxItems: 1
>+
>+  interrupts:
>+    maxItems: 1
>+
>+  clocks:
>+    items:
>+      - description: faxi clock
>+
>+  clock-names:
>+    items:
>+      - const: faxi
>+
>+  phys:
>+    maxItems: 1
>+
>+  phy-names:
>+    items:
>+      - const: dp
>+
>+  power-domains:
>+    maxItems: 1
>+
>+  ports:
>+    $ref: /schemas/graph.yaml#/properties/ports
>+    properties:
>+      port@0:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Input endpoint of the controller, usually dp_intf
>+
>+      port@1:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Output endpoint of the controller
>+
>+    required:
>+      - port@0
>+
>+required:
>+  - compatible
>+  - reg
>+  - interrupts
>+  - ports
>+
>+additionalProperties: false
>+
>+examples:
>+  - |
>+    #include <dt-bindings/interrupt-controller/arm-gic.h>
>+    #include <dt-bindings/power/mt8195-power.h>
>+    edp_tx: edisplay-port-tx@1c500000 {
>+        compatible = "mediatek,mt8195-dp-tx","syscon";
>+        reg = <0 0x1c500000 0 0x8000>;
>+        interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
>+        power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
>+        pinctrl-names = "default";
>+        pinctrl-0 = <&edp_pin>;
>+        phys = <&dp_phy>;
>+        phy-names = "dp";
>+
>+        ports {
>+            #address-cells = <1>;
>+            #size-cells = <0>;
>+
>+            port@0 {
>+                reg = <0>;
>+                edp_in: endpoint {
>+                    remote-endpoint = <&dp_intf0_out>;
>+                };
>+            };
>+            port@1 {
>+                reg = <1>;
>+                edp_out: endpoint {
>+                    remote-endpoint = <&panel_in>;
>+                };
>+            };
>+        };
>+    };
>-- 
>2.34.1
>
>

WARNING: multiple messages have this Message-ID (diff)
From: Miles Chen <miles.chen@mediatek.com>
To: <granquet@baylibre.com>
Cc: linux-fbdev@vger.kernel.org, devicetree@vger.kernel.org,
	airlied@linux.ie, dri-devel@lists.freedesktop.org,
	linux-phy@lists.infradead.org, deller@gmx.de, kishon@ti.com,
	chunkuang.hu@kernel.org, jitao.shi@mediatek.com,
	msp@baylibre.com, chunfeng.yun@mediatek.com, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	linux-arm-kernel@lists.infradead.org,
	angelogioacchino.delregno@collabora.com, tzimmermann@suse.de,
	linux-kernel@vger.kernel.org, vkoul@kernel.org,
	krzk+dt@kernel.org, markyacoub@google.com
Subject: Re: [PATCH v9 02/22] dt-bindings: mediatek, dp: Add Display Port binding
Date: Wed, 30 Mar 2022 13:12:02 +0800	[thread overview]
Message-ID: <20220330051202.19594-1-miles.chen@mediatek.com> (raw)
In-Reply-To: <20220327223927.20848-3-granquet@baylibre.com>

>This controller is present on several mediatek hardware. Currently
>mt8195 and mt8395 have this controller without a functional difference,
>so only one compatible field is added.
>
>The controller can have two forms, as a normal display port and as an
>embedded display port.
>
>Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
>Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
>---
> .../display/mediatek/mediatek,dp.yaml         | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>
>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>new file mode 100644
>index 000000000000..802cc406c72b
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>@@ -0,0 +1,100 @@
>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>+%YAML 1.2
>+---
>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
>+$schema: http://devicetree.org/meta-schemas/core.yaml#
>+
>+title: Mediatek Display Port Controller

s/Mediatek/MediaTek/

>+
>+maintainers:
>+  - CK Hu <ck.hu@mediatek.com>
>+  - Jitao shi <jitao.shi@mediatek.com>
>+
>+description: |
>+  Device tree bindings for the Mediatek (embedded) Display Port controller

s/Mediatek/MediaTek/

>+  present on some Mediatek SoCs.

s/Mediatek/MediaTek/

>+
>+properties:
>+  compatible:
>+    items:
>+      - const: mediatek,mt8195-dp-tx
>+      - const: syscon
>+
>+  reg:
>+    maxItems: 1
>+
>+  interrupts:
>+    maxItems: 1
>+
>+  clocks:
>+    items:
>+      - description: faxi clock
>+
>+  clock-names:
>+    items:
>+      - const: faxi
>+
>+  phys:
>+    maxItems: 1
>+
>+  phy-names:
>+    items:
>+      - const: dp
>+
>+  power-domains:
>+    maxItems: 1
>+
>+  ports:
>+    $ref: /schemas/graph.yaml#/properties/ports
>+    properties:
>+      port@0:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Input endpoint of the controller, usually dp_intf
>+
>+      port@1:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Output endpoint of the controller
>+
>+    required:
>+      - port@0
>+
>+required:
>+  - compatible
>+  - reg
>+  - interrupts
>+  - ports
>+
>+additionalProperties: false
>+
>+examples:
>+  - |
>+    #include <dt-bindings/interrupt-controller/arm-gic.h>
>+    #include <dt-bindings/power/mt8195-power.h>
>+    edp_tx: edisplay-port-tx@1c500000 {
>+        compatible = "mediatek,mt8195-dp-tx","syscon";
>+        reg = <0 0x1c500000 0 0x8000>;
>+        interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
>+        power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
>+        pinctrl-names = "default";
>+        pinctrl-0 = <&edp_pin>;
>+        phys = <&dp_phy>;
>+        phy-names = "dp";
>+
>+        ports {
>+            #address-cells = <1>;
>+            #size-cells = <0>;
>+
>+            port@0 {
>+                reg = <0>;
>+                edp_in: endpoint {
>+                    remote-endpoint = <&dp_intf0_out>;
>+                };
>+            };
>+            port@1 {
>+                reg = <1>;
>+                edp_out: endpoint {
>+                    remote-endpoint = <&panel_in>;
>+                };
>+            };
>+        };
>+    };
>-- 
>2.34.1
>
>

WARNING: multiple messages have this Message-ID (diff)
From: Miles Chen <miles.chen@mediatek.com>
To: <granquet@baylibre.com>
Cc: <airlied@linux.ie>, <angelogioacchino.delregno@collabora.com>,
	<chunfeng.yun@mediatek.com>, <chunkuang.hu@kernel.org>,
	<ck.hu@mediatek.com>,  <daniel@ffwll.ch>, <deller@gmx.de>,
	<devicetree@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
	<jitao.shi@mediatek.com>, <kishon@ti.com>,  <krzk+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <markyacoub@google.com>,
	<matthias.bgg@gmail.com>, <mripard@kernel.org>,
	<msp@baylibre.com>, <p.zabel@pengutronix.de>,
	<robh+dt@kernel.org>, <tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v9 02/22] dt-bindings: mediatek, dp: Add Display Port binding
Date: Wed, 30 Mar 2022 13:12:02 +0800	[thread overview]
Message-ID: <20220330051202.19594-1-miles.chen@mediatek.com> (raw)
In-Reply-To: <20220327223927.20848-3-granquet@baylibre.com>

>This controller is present on several mediatek hardware. Currently
>mt8195 and mt8395 have this controller without a functional difference,
>so only one compatible field is added.
>
>The controller can have two forms, as a normal display port and as an
>embedded display port.
>
>Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
>Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
>---
> .../display/mediatek/mediatek,dp.yaml         | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>
>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>new file mode 100644
>index 000000000000..802cc406c72b
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>@@ -0,0 +1,100 @@
>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>+%YAML 1.2
>+---
>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
>+$schema: http://devicetree.org/meta-schemas/core.yaml#
>+
>+title: Mediatek Display Port Controller

s/Mediatek/MediaTek/

>+
>+maintainers:
>+  - CK Hu <ck.hu@mediatek.com>
>+  - Jitao shi <jitao.shi@mediatek.com>
>+
>+description: |
>+  Device tree bindings for the Mediatek (embedded) Display Port controller

s/Mediatek/MediaTek/

>+  present on some Mediatek SoCs.

s/Mediatek/MediaTek/

>+
>+properties:
>+  compatible:
>+    items:
>+      - const: mediatek,mt8195-dp-tx
>+      - const: syscon
>+
>+  reg:
>+    maxItems: 1
>+
>+  interrupts:
>+    maxItems: 1
>+
>+  clocks:
>+    items:
>+      - description: faxi clock
>+
>+  clock-names:
>+    items:
>+      - const: faxi
>+
>+  phys:
>+    maxItems: 1
>+
>+  phy-names:
>+    items:
>+      - const: dp
>+
>+  power-domains:
>+    maxItems: 1
>+
>+  ports:
>+    $ref: /schemas/graph.yaml#/properties/ports
>+    properties:
>+      port@0:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Input endpoint of the controller, usually dp_intf
>+
>+      port@1:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Output endpoint of the controller
>+
>+    required:
>+      - port@0
>+
>+required:
>+  - compatible
>+  - reg
>+  - interrupts
>+  - ports
>+
>+additionalProperties: false
>+
>+examples:
>+  - |
>+    #include <dt-bindings/interrupt-controller/arm-gic.h>
>+    #include <dt-bindings/power/mt8195-power.h>
>+    edp_tx: edisplay-port-tx@1c500000 {
>+        compatible = "mediatek,mt8195-dp-tx","syscon";
>+        reg = <0 0x1c500000 0 0x8000>;
>+        interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
>+        power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
>+        pinctrl-names = "default";
>+        pinctrl-0 = <&edp_pin>;
>+        phys = <&dp_phy>;
>+        phy-names = "dp";
>+
>+        ports {
>+            #address-cells = <1>;
>+            #size-cells = <0>;
>+
>+            port@0 {
>+                reg = <0>;
>+                edp_in: endpoint {
>+                    remote-endpoint = <&dp_intf0_out>;
>+                };
>+            };
>+            port@1 {
>+                reg = <1>;
>+                edp_out: endpoint {
>+                    remote-endpoint = <&panel_in>;
>+                };
>+            };
>+        };
>+    };
>-- 
>2.34.1
>
>

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Miles Chen <miles.chen@mediatek.com>
To: <granquet@baylibre.com>
Cc: <airlied@linux.ie>, <angelogioacchino.delregno@collabora.com>,
	<chunfeng.yun@mediatek.com>, <chunkuang.hu@kernel.org>,
	<ck.hu@mediatek.com>,  <daniel@ffwll.ch>, <deller@gmx.de>,
	<devicetree@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
	<jitao.shi@mediatek.com>, <kishon@ti.com>,  <krzk+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <markyacoub@google.com>,
	<matthias.bgg@gmail.com>, <mripard@kernel.org>,
	<msp@baylibre.com>, <p.zabel@pengutronix.de>,
	<robh+dt@kernel.org>, <tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v9 02/22] dt-bindings: mediatek, dp: Add Display Port binding
Date: Wed, 30 Mar 2022 13:12:02 +0800	[thread overview]
Message-ID: <20220330051202.19594-1-miles.chen@mediatek.com> (raw)
In-Reply-To: <20220327223927.20848-3-granquet@baylibre.com>

>This controller is present on several mediatek hardware. Currently
>mt8195 and mt8395 have this controller without a functional difference,
>so only one compatible field is added.
>
>The controller can have two forms, as a normal display port and as an
>embedded display port.
>
>Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
>Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
>---
> .../display/mediatek/mediatek,dp.yaml         | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>
>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>new file mode 100644
>index 000000000000..802cc406c72b
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>@@ -0,0 +1,100 @@
>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>+%YAML 1.2
>+---
>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
>+$schema: http://devicetree.org/meta-schemas/core.yaml#
>+
>+title: Mediatek Display Port Controller

s/Mediatek/MediaTek/

>+
>+maintainers:
>+  - CK Hu <ck.hu@mediatek.com>
>+  - Jitao shi <jitao.shi@mediatek.com>
>+
>+description: |
>+  Device tree bindings for the Mediatek (embedded) Display Port controller

s/Mediatek/MediaTek/

>+  present on some Mediatek SoCs.

s/Mediatek/MediaTek/

>+
>+properties:
>+  compatible:
>+    items:
>+      - const: mediatek,mt8195-dp-tx
>+      - const: syscon
>+
>+  reg:
>+    maxItems: 1
>+
>+  interrupts:
>+    maxItems: 1
>+
>+  clocks:
>+    items:
>+      - description: faxi clock
>+
>+  clock-names:
>+    items:
>+      - const: faxi
>+
>+  phys:
>+    maxItems: 1
>+
>+  phy-names:
>+    items:
>+      - const: dp
>+
>+  power-domains:
>+    maxItems: 1
>+
>+  ports:
>+    $ref: /schemas/graph.yaml#/properties/ports
>+    properties:
>+      port@0:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Input endpoint of the controller, usually dp_intf
>+
>+      port@1:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Output endpoint of the controller
>+
>+    required:
>+      - port@0
>+
>+required:
>+  - compatible
>+  - reg
>+  - interrupts
>+  - ports
>+
>+additionalProperties: false
>+
>+examples:
>+  - |
>+    #include <dt-bindings/interrupt-controller/arm-gic.h>
>+    #include <dt-bindings/power/mt8195-power.h>
>+    edp_tx: edisplay-port-tx@1c500000 {
>+        compatible = "mediatek,mt8195-dp-tx","syscon";
>+        reg = <0 0x1c500000 0 0x8000>;
>+        interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
>+        power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
>+        pinctrl-names = "default";
>+        pinctrl-0 = <&edp_pin>;
>+        phys = <&dp_phy>;
>+        phy-names = "dp";
>+
>+        ports {
>+            #address-cells = <1>;
>+            #size-cells = <0>;
>+
>+            port@0 {
>+                reg = <0>;
>+                edp_in: endpoint {
>+                    remote-endpoint = <&dp_intf0_out>;
>+                };
>+            };
>+            port@1 {
>+                reg = <1>;
>+                edp_out: endpoint {
>+                    remote-endpoint = <&panel_in>;
>+                };
>+            };
>+        };
>+    };
>-- 
>2.34.1
>
>

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Miles Chen <miles.chen@mediatek.com>
To: <granquet@baylibre.com>
Cc: <airlied@linux.ie>, <angelogioacchino.delregno@collabora.com>,
	<chunfeng.yun@mediatek.com>, <chunkuang.hu@kernel.org>,
	<ck.hu@mediatek.com>,  <daniel@ffwll.ch>, <deller@gmx.de>,
	<devicetree@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
	<jitao.shi@mediatek.com>, <kishon@ti.com>,  <krzk+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-fbdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-phy@lists.infradead.org>,
	<maarten.lankhorst@linux.intel.com>, <markyacoub@google.com>,
	<matthias.bgg@gmail.com>, <mripard@kernel.org>,
	<msp@baylibre.com>, <p.zabel@pengutronix.de>,
	<robh+dt@kernel.org>, <tzimmermann@suse.de>, <vkoul@kernel.org>
Subject: Re: [PATCH v9 02/22] dt-bindings: mediatek, dp: Add Display Port binding
Date: Wed, 30 Mar 2022 13:12:02 +0800	[thread overview]
Message-ID: <20220330051202.19594-1-miles.chen@mediatek.com> (raw)
In-Reply-To: <20220327223927.20848-3-granquet@baylibre.com>

>This controller is present on several mediatek hardware. Currently
>mt8195 and mt8395 have this controller without a functional difference,
>so only one compatible field is added.
>
>The controller can have two forms, as a normal display port and as an
>embedded display port.
>
>Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
>Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
>---
> .../display/mediatek/mediatek,dp.yaml         | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>
>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>new file mode 100644
>index 000000000000..802cc406c72b
>--- /dev/null
>+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
>@@ -0,0 +1,100 @@
>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>+%YAML 1.2
>+---
>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#
>+$schema: http://devicetree.org/meta-schemas/core.yaml#
>+
>+title: Mediatek Display Port Controller

s/Mediatek/MediaTek/

>+
>+maintainers:
>+  - CK Hu <ck.hu@mediatek.com>
>+  - Jitao shi <jitao.shi@mediatek.com>
>+
>+description: |
>+  Device tree bindings for the Mediatek (embedded) Display Port controller

s/Mediatek/MediaTek/

>+  present on some Mediatek SoCs.

s/Mediatek/MediaTek/

>+
>+properties:
>+  compatible:
>+    items:
>+      - const: mediatek,mt8195-dp-tx
>+      - const: syscon
>+
>+  reg:
>+    maxItems: 1
>+
>+  interrupts:
>+    maxItems: 1
>+
>+  clocks:
>+    items:
>+      - description: faxi clock
>+
>+  clock-names:
>+    items:
>+      - const: faxi
>+
>+  phys:
>+    maxItems: 1
>+
>+  phy-names:
>+    items:
>+      - const: dp
>+
>+  power-domains:
>+    maxItems: 1
>+
>+  ports:
>+    $ref: /schemas/graph.yaml#/properties/ports
>+    properties:
>+      port@0:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Input endpoint of the controller, usually dp_intf
>+
>+      port@1:
>+        $ref: /schemas/graph.yaml#/properties/port
>+        description: Output endpoint of the controller
>+
>+    required:
>+      - port@0
>+
>+required:
>+  - compatible
>+  - reg
>+  - interrupts
>+  - ports
>+
>+additionalProperties: false
>+
>+examples:
>+  - |
>+    #include <dt-bindings/interrupt-controller/arm-gic.h>
>+    #include <dt-bindings/power/mt8195-power.h>
>+    edp_tx: edisplay-port-tx@1c500000 {
>+        compatible = "mediatek,mt8195-dp-tx","syscon";
>+        reg = <0 0x1c500000 0 0x8000>;
>+        interrupts = <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH 0>;
>+        power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>;
>+        pinctrl-names = "default";
>+        pinctrl-0 = <&edp_pin>;
>+        phys = <&dp_phy>;
>+        phy-names = "dp";
>+
>+        ports {
>+            #address-cells = <1>;
>+            #size-cells = <0>;
>+
>+            port@0 {
>+                reg = <0>;
>+                edp_in: endpoint {
>+                    remote-endpoint = <&dp_intf0_out>;
>+                };
>+            };
>+            port@1 {
>+                reg = <1>;
>+                edp_out: endpoint {
>+                    remote-endpoint = <&panel_in>;
>+                };
>+            };
>+        };
>+    };
>-- 
>2.34.1
>
>

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  parent reply	other threads:[~2022-03-30  5:12 UTC|newest]

Thread overview: 335+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-27 22:39 [PATCH 00/22] drm/mediatek: Add mt8195 DisplayPort driver Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 01/22] dt-bindings: mediatek,dpi: Add DP_INTF compatible Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-29 10:42   ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-29 10:42     ` Matthias Brugger
2022-03-30  5:11   ` Miles Chen
2022-03-30  5:11     ` [PATCH v9 01/22] dt-bindings: mediatek, dpi: " Miles Chen
2022-03-30  5:11     ` Miles Chen
2022-03-30  5:11     ` Miles Chen
2022-03-30  5:11     ` Miles Chen
2022-04-22 10:57   ` [PATCH v9 01/22] dt-bindings: mediatek,dpi: " Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-04-22 10:57     ` Maxime Ripard
2022-05-11 12:37     ` Guillaume Ranquet
2022-05-11 12:37       ` [PATCH v9 01/22] dt-bindings: mediatek, dpi: " Guillaume Ranquet
2022-05-11 12:37       ` Guillaume Ranquet
2022-05-11 12:37       ` Guillaume Ranquet
2022-05-11 12:37       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 02/22] dt-bindings: mediatek,dp: Add Display Port binding Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28 12:51   ` Rob Herring
2022-03-28 12:51     ` [PATCH v9 02/22] dt-bindings: mediatek, dp: " Rob Herring
2022-03-28 12:51     ` Rob Herring
2022-03-28 12:51     ` Rob Herring
2022-03-28 12:51     ` Rob Herring
2022-03-28 16:33   ` [PATCH v9 02/22] dt-bindings: mediatek,dp: " Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-28 16:33     ` Rob Herring
2022-03-30  5:12   ` Miles Chen [this message]
2022-03-30  5:12     ` [PATCH v9 02/22] dt-bindings: mediatek, dp: " Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-27 22:39 ` [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: Add Display Port PHY binding Guillaume Ranquet
2022-03-27 22:39   ` [PATCH v9 03/22] dt-bindings: mediatek, dp_phy: " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-29 22:58   ` [PATCH v9 03/22] dt-bindings: mediatek,dp_phy: " Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-03-29 22:58     ` Rob Herring
2022-04-12 10:06     ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-04-12 10:06       ` Guillaume Ranquet
2022-03-30  5:12   ` Miles Chen
2022-03-30  5:12     ` [PATCH v9 03/22] dt-bindings: mediatek, dp_phy: " Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-30  5:12     ` Miles Chen
2022-03-27 22:39 ` [PATCH v9 04/22] drm/edid: Convert cea_sad helper struct to kernelDoc Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:04   ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-03-28  8:04     ` AngeloGioacchino Del Regno
2022-04-12  8:57     ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-04-12  8:57       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 05/22] drm/edid: Add cea_sad helpers for freq/length Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 06/22] video/hdmi: Add audio_infoframe packing for DP Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:09   ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-03-28  8:09     ` AngeloGioacchino Del Regno
2022-04-12  8:59     ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-04-12  8:59       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 07/22] drm/mediatek: dpi: move dpi limits to SoC config Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  7:18   ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-28  7:18     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 08/22] drm/mediatek: dpi: implement a CK/DE pol toggle in " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  7:31   ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-28  7:31     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 09/22] drm/mediatek: dpi: implement a swap_input " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:33   ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 10/22] drm/mediatek: dpi: move dimension mask to " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:33   ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-28  8:33     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 11/22] drm/mediatek: dpi: move hvsize_mask " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:34   ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 12/22] drm/mediatek: dpi: move swap_shift " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:20   ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:34   ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-28  8:34     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 13/22] drm/mediatek: dpi: move the yuv422_en_bit " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:54   ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-28  8:54     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit " Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:35   ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-28  8:35     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 15/22] drm/mediatek: dpi: Add dpintf support Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:38   ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-03-28  8:38     ` Rex-BC Chen
2022-04-12  9:10     ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-04-12  9:10       ` Guillaume Ranquet
2022-03-29  3:16   ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-03-29  3:16     ` Rex-BC Chen
2022-04-12  9:12     ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-04-12  9:12       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 16/22] drm/meditek: dpi: Add matrix_sel helper Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:49   ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-03-28  8:49     ` Rex-BC Chen
2022-04-12  9:37     ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-04-12  9:37       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 17/22] phy: phy-mtk-dp: Add driver for DP phy Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  8:20   ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-03-28  8:20     ` AngeloGioacchino Del Regno
2022-04-12  9:04     ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-04-12  9:04       ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 18/22] drm/mediatek: Add mt8195 Embedded DisplayPort driver Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  9:14   ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-03-28  9:14     ` AngeloGioacchino Del Regno
2022-04-12  9:46     ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-12  9:46       ` Guillaume Ranquet
2022-04-13  7:50       ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-04-13  7:50         ` AngeloGioacchino Del Regno
2022-03-29  3:34   ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-03-29  3:34     ` Rex-BC Chen
2022-04-12  9:48     ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-04-12  9:48       ` Guillaume Ranquet
2022-03-29  5:41   ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-03-29  5:41     ` Rex-BC Chen
2022-04-12 10:03     ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-12 10:03       ` Guillaume Ranquet
2022-04-29  8:39   ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-04-29  8:39     ` Maxime Ripard
2022-05-11 12:59     ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-11 12:59       ` Guillaume Ranquet
2022-05-12  7:44       ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-12  7:44         ` Maxime Ripard
2022-05-19 16:26         ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-19 16:26           ` Guillaume Ranquet
2022-05-25  9:44           ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-05-25  9:44             ` Maxime Ripard
2022-03-27 22:39 ` [PATCH v9 19/22] drm/mediatek: Add mt8195 External DisplayPort support Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 20/22] drm/mediatek: add hpd debounce Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39 ` [PATCH v9 21/22] drm/mediatek: change the aux retries times when receiving AUX_DEFER Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-28  1:46   ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-28  1:46     ` Rex-BC Chen
2022-03-27 22:39 ` [PATCH v9 22/22] drm/mediatek: DP audio support for mt8195 Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet
2022-03-27 22:39   ` Guillaume Ranquet

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