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From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v21 06/25] soc: mediatek: add mtk_mmsys_update_bits API
Date: Thu, 12 May 2022 13:31:09 +0800	[thread overview]
Message-ID: <20220512053128.31415-7-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220512053128.31415-1-nancy.lin@mediatek.com>

Add mtk_mmsys_update_bits API. Simplify code for update  mmsys reg.
It is a preparation for adding support for mmsys config API.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 36 ++++++++++++++------------------
 1 file changed, 16 insertions(+), 20 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index ab3c5cbb0175..21fb4e91bf70 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -191,22 +191,27 @@ static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
 	return -EINVAL;
 }
 
+static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val)
+{
+	u32 tmp;
+
+	tmp = readl_relaxed(mmsys->regs + offset);
+	tmp = (tmp & ~mask) | val;
+	writel_relaxed(tmp, mmsys->regs + offset);
+}
+
 void mtk_mmsys_ddp_connect(struct device *dev,
 			   enum mtk_ddp_comp_id cur,
 			   enum mtk_ddp_comp_id next)
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			reg |= routes[i].val;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask,
+					      routes[i].val);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
 
@@ -216,15 +221,11 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, 0);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
 
@@ -233,18 +234,13 @@ static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned l
 {
 	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
 	unsigned long flags;
-	u32 reg;
 
 	spin_lock_irqsave(&mmsys->lock, flags);
 
-	reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
-
 	if (assert)
-		reg &= ~BIT(id);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), 0);
 	else
-		reg |= BIT(id);
-
-	writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), BIT(id));
 
 	spin_unlock_irqrestore(&mmsys->lock, flags);
 
-- 
2.18.0


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: devicetree@vger.kernel.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	David Airlie <airlied@linux.ie>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	singo.chang@mediatek.com, llvm@lists.linux.dev,
	Nick Desaulniers <ndesaulniers@google.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Nathan Chancellor <nathan@kernel.org>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v21 06/25] soc: mediatek: add mtk_mmsys_update_bits API
Date: Thu, 12 May 2022 13:31:09 +0800	[thread overview]
Message-ID: <20220512053128.31415-7-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220512053128.31415-1-nancy.lin@mediatek.com>

Add mtk_mmsys_update_bits API. Simplify code for update  mmsys reg.
It is a preparation for adding support for mmsys config API.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 36 ++++++++++++++------------------
 1 file changed, 16 insertions(+), 20 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index ab3c5cbb0175..21fb4e91bf70 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -191,22 +191,27 @@ static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
 	return -EINVAL;
 }
 
+static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val)
+{
+	u32 tmp;
+
+	tmp = readl_relaxed(mmsys->regs + offset);
+	tmp = (tmp & ~mask) | val;
+	writel_relaxed(tmp, mmsys->regs + offset);
+}
+
 void mtk_mmsys_ddp_connect(struct device *dev,
 			   enum mtk_ddp_comp_id cur,
 			   enum mtk_ddp_comp_id next)
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			reg |= routes[i].val;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask,
+					      routes[i].val);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
 
@@ -216,15 +221,11 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, 0);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
 
@@ -233,18 +234,13 @@ static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned l
 {
 	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
 	unsigned long flags;
-	u32 reg;
 
 	spin_lock_irqsave(&mmsys->lock, flags);
 
-	reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
-
 	if (assert)
-		reg &= ~BIT(id);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), 0);
 	else
-		reg |= BIT(id);
-
-	writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), BIT(id));
 
 	spin_unlock_irqrestore(&mmsys->lock, flags);
 
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v21 06/25] soc: mediatek: add mtk_mmsys_update_bits API
Date: Thu, 12 May 2022 13:31:09 +0800	[thread overview]
Message-ID: <20220512053128.31415-7-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220512053128.31415-1-nancy.lin@mediatek.com>

Add mtk_mmsys_update_bits API. Simplify code for update  mmsys reg.
It is a preparation for adding support for mmsys config API.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 36 ++++++++++++++------------------
 1 file changed, 16 insertions(+), 20 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index ab3c5cbb0175..21fb4e91bf70 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -191,22 +191,27 @@ static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
 	return -EINVAL;
 }
 
+static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val)
+{
+	u32 tmp;
+
+	tmp = readl_relaxed(mmsys->regs + offset);
+	tmp = (tmp & ~mask) | val;
+	writel_relaxed(tmp, mmsys->regs + offset);
+}
+
 void mtk_mmsys_ddp_connect(struct device *dev,
 			   enum mtk_ddp_comp_id cur,
 			   enum mtk_ddp_comp_id next)
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			reg |= routes[i].val;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask,
+					      routes[i].val);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
 
@@ -216,15 +221,11 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, 0);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
 
@@ -233,18 +234,13 @@ static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned l
 {
 	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
 	unsigned long flags;
-	u32 reg;
 
 	spin_lock_irqsave(&mmsys->lock, flags);
 
-	reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
-
 	if (assert)
-		reg &= ~BIT(id);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), 0);
 	else
-		reg |= BIT(id);
-
-	writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), BIT(id));
 
 	spin_unlock_irqrestore(&mmsys->lock, flags);
 
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v21 06/25] soc: mediatek: add mtk_mmsys_update_bits API
Date: Thu, 12 May 2022 13:31:09 +0800	[thread overview]
Message-ID: <20220512053128.31415-7-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220512053128.31415-1-nancy.lin@mediatek.com>

Add mtk_mmsys_update_bits API. Simplify code for update  mmsys reg.
It is a preparation for adding support for mmsys config API.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 36 ++++++++++++++------------------
 1 file changed, 16 insertions(+), 20 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index ab3c5cbb0175..21fb4e91bf70 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -191,22 +191,27 @@ static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
 	return -EINVAL;
 }
 
+static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val)
+{
+	u32 tmp;
+
+	tmp = readl_relaxed(mmsys->regs + offset);
+	tmp = (tmp & ~mask) | val;
+	writel_relaxed(tmp, mmsys->regs + offset);
+}
+
 void mtk_mmsys_ddp_connect(struct device *dev,
 			   enum mtk_ddp_comp_id cur,
 			   enum mtk_ddp_comp_id next)
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			reg |= routes[i].val;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask,
+					      routes[i].val);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
 
@@ -216,15 +221,11 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
 {
 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
-	u32 reg;
 	int i;
 
 	for (i = 0; i < mmsys->data->num_routes; i++)
-		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
-			reg = readl_relaxed(mmsys->regs + routes[i].addr);
-			reg &= ~routes[i].mask;
-			writel_relaxed(reg, mmsys->regs + routes[i].addr);
-		}
+		if (cur == routes[i].from_comp && next == routes[i].to_comp)
+			mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, 0);
 }
 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
 
@@ -233,18 +234,13 @@ static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned l
 {
 	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
 	unsigned long flags;
-	u32 reg;
 
 	spin_lock_irqsave(&mmsys->lock, flags);
 
-	reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
-
 	if (assert)
-		reg &= ~BIT(id);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), 0);
 	else
-		reg |= BIT(id);
-
-	writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
+		mtk_mmsys_update_bits(mmsys, mmsys->data->sw0_rst_offset, BIT(id), BIT(id));
 
 	spin_unlock_irqrestore(&mmsys->lock, flags);
 
-- 
2.18.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-05-12  5:32 UTC|newest]

Thread overview: 116+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-12  5:31 [PATCH v21 00/25] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2022-05-12  5:31 ` Nancy.Lin
2022-05-12  5:31 ` Nancy.Lin
2022-05-12  5:31 ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 01/25] dt-bindings: mediatek: add vdosys1 RDMA definition " Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 02/25] dt-bindings: reset: mt8195: add vdosys1 reset control bit Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 03/25] dt-bindings: mediatek: add ethdr definition for mt8195 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 04/25] soc: mediatek: add mtk-mmsys ethdr and mdp_rdma components Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 05/25] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` Nancy.Lin [this message]
2022-05-12  5:31   ` [PATCH v21 06/25] soc: mediatek: add mtk_mmsys_update_bits API Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 07/25] soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 08/25] soc: mediatek: add cmdq support of " Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 09/25] soc: mediatek: mmsys: add mmsys for support 64 reset bits Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 10/25] soc: mediatek: mmsys: add reset control for MT8195 vdosys1 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 11/25] soc: mediatek: add mtk-mutex component - dp_intf1 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 12/25] soc: mediatek: add mtk-mutex support for mt8195 vdosys1 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 13/25] drm/mediatek: add display MDP RDMA support for MT8195 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 14/25] drm/mediatek: add display merge advance config API " Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 15/25] drm/mediatek: add display merge start/stop API for cmdq support Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 16/25] drm/mediatek: add display merge mute/unmute support for MT8195 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 17/25] drm/mediatek: add display merge async reset control Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 18/25] drm/mediatek: add ETHDR support for MT8195 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 19/25] drm/mediatek: add mediatek-drm plane color encoding info Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 20/25] drm/mediatek: add ovl_adaptor support for MT8195 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 21/25] drm/mediatek: add dma dev get function Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 22/25] drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 23/25] drm/mediatek: add drm ovl_adaptor sub driver for MT8195 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 24/25] drm/mediatek: add mediatek-drm of vdosys1 support " Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31 ` [PATCH v21 25/25] arm64: dts: mt8195: add display node for vdosys1 Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-12  5:31   ` Nancy.Lin
2022-05-18  2:47 ` [PATCH v21 00/25] Add MediaTek SoC DRM (vdosys1) support for mt8195 Rex-BC Chen
2022-05-18  2:47   ` Rex-BC Chen
2022-05-18  2:47   ` Rex-BC Chen
2022-05-18  2:47   ` Rex-BC Chen
2022-05-25 10:08   ` AngeloGioacchino Del Regno
2022-05-25 10:08     ` AngeloGioacchino Del Regno
2022-05-25 10:08     ` AngeloGioacchino Del Regno
2022-05-25 10:08     ` AngeloGioacchino Del Regno
2022-05-26  7:03     ` Nancy.Lin
2022-05-26  7:03       ` Nancy.Lin
2022-05-26  7:03       ` Nancy.Lin
2022-05-26  7:03       ` Nancy.Lin

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