From: Markus Schneider-Pargmann <msp@baylibre.com> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() Date: Wed, 4 Jan 2023 12:21:44 +0100 [thread overview] Message-ID: <20230104112144.n2mx33xqavigxwa2@blmsp> (raw) In-Reply-To: <20221223094259.87373-4-angelogioacchino.delregno@collabora.com> Hi Angelo, On Fri, Dec 23, 2022 at 10:42:39AM +0100, AngeloGioacchino Del Regno wrote: > Commit e4c23e19aa2a ("clk: mediatek: Register clock gate with device") > introduces a helper function for the sole purpose of propagating a > struct device pointer to the clk API when registering the mtk-gate > clocks to take advantage of Runtime PM when/where needed and where > a power domain is defined in devicetree. > > Function mtk_clk_register_gates() then becomes a wrapper around the > new mtk_clk_register_gates_with_dev() function that will simply pass > NULL as struct device: this is essential when registering drivers > with CLK_OF_DECLARE instead of as a platform device, as there will > be no struct device to pass... but we can as well simply have only > one function that always takes such pointer as a param and pass NULL > when unavoidable. > > This commit removes the mtk_clk_register_gates() wrapper and renames > mtk_clk_register_gates_with_dev() to the former and all of the calls > to either of the two functions were fixed in all drivers in order to > reflect this change. > > Since a lot of MediaTek clock drivers are actually registering as a > platform device, but were still registering the mtk-gate clocks > without passing any struct device to the clock framework, they've > been changed to pass a valid one now, as to make all those platforms > able to use runtime power management where available. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> A few nitpicks, otherwise it looks good, Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> > --- > drivers/clk/mediatek/clk-gate.c | 16 ++++------------ > drivers/clk/mediatek/clk-gate.h | 8 ++------ > drivers/clk/mediatek/clk-mt2701-aud.c | 2 +- > drivers/clk/mediatek/clk-mt2701-eth.c | 2 +- > drivers/clk/mediatek/clk-mt2701-g3d.c | 2 +- > drivers/clk/mediatek/clk-mt2701-hif.c | 2 +- > drivers/clk/mediatek/clk-mt2701-mm.c | 2 +- > drivers/clk/mediatek/clk-mt2701.c | 6 +++--- > drivers/clk/mediatek/clk-mt2712-mm.c | 2 +- > drivers/clk/mediatek/clk-mt2712.c | 6 +++--- > drivers/clk/mediatek/clk-mt6765.c | 6 +++--- > drivers/clk/mediatek/clk-mt6779-mm.c | 2 +- > drivers/clk/mediatek/clk-mt6779.c | 4 ++-- > drivers/clk/mediatek/clk-mt6795-infracfg.c | 3 ++- > drivers/clk/mediatek/clk-mt6795-mm.c | 3 ++- > drivers/clk/mediatek/clk-mt6795-pericfg.c | 3 ++- > drivers/clk/mediatek/clk-mt6797-mm.c | 2 +- > drivers/clk/mediatek/clk-mt6797.c | 2 +- > drivers/clk/mediatek/clk-mt7622-aud.c | 2 +- > drivers/clk/mediatek/clk-mt7622-eth.c | 4 ++-- > drivers/clk/mediatek/clk-mt7622-hif.c | 4 ++-- > drivers/clk/mediatek/clk-mt7622.c | 9 +++++---- > drivers/clk/mediatek/clk-mt7629-eth.c | 5 +++-- > drivers/clk/mediatek/clk-mt7629-hif.c | 4 ++-- > drivers/clk/mediatek/clk-mt7629.c | 6 +++--- > drivers/clk/mediatek/clk-mt7986-eth.c | 6 +++--- > drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +- > drivers/clk/mediatek/clk-mt8135.c | 4 ++-- > drivers/clk/mediatek/clk-mt8167-aud.c | 2 +- > drivers/clk/mediatek/clk-mt8167-img.c | 2 +- > drivers/clk/mediatek/clk-mt8167-mfgcfg.c | 2 +- > drivers/clk/mediatek/clk-mt8167-mm.c | 2 +- > drivers/clk/mediatek/clk-mt8167-vdec.c | 3 ++- > drivers/clk/mediatek/clk-mt8167.c | 2 +- > drivers/clk/mediatek/clk-mt8173-mm.c | 2 +- > drivers/clk/mediatek/clk-mt8173.c | 12 ++++++------ > drivers/clk/mediatek/clk-mt8183-audio.c | 2 +- > drivers/clk/mediatek/clk-mt8183-mm.c | 2 +- > drivers/clk/mediatek/clk-mt8183.c | 8 ++++---- > drivers/clk/mediatek/clk-mt8186-mm.c | 3 ++- > drivers/clk/mediatek/clk-mt8192-aud.c | 3 ++- > drivers/clk/mediatek/clk-mt8192-mm.c | 3 ++- > drivers/clk/mediatek/clk-mt8192.c | 12 ++++++------ > drivers/clk/mediatek/clk-mt8195-apmixedsys.c | 3 ++- > drivers/clk/mediatek/clk-mt8195-topckgen.c | 3 ++- > drivers/clk/mediatek/clk-mt8195-vdo0.c | 3 ++- > drivers/clk/mediatek/clk-mt8195-vdo1.c | 3 ++- > drivers/clk/mediatek/clk-mt8365-mm.c | 5 ++--- > drivers/clk/mediatek/clk-mt8365.c | 2 +- > drivers/clk/mediatek/clk-mt8516-aud.c | 2 +- > drivers/clk/mediatek/clk-mt8516.c | 2 +- > drivers/clk/mediatek/clk-mtk.c | 4 ++-- > 52 files changed, 103 insertions(+), 103 deletions(-) > [...] > diff --git a/drivers/clk/mediatek/clk-mt7986-eth.c b/drivers/clk/mediatek/clk-mt7986-eth.c > index 7868c0728e96..765df117afa6 100644 > --- a/drivers/clk/mediatek/clk-mt7986-eth.c > +++ b/drivers/clk/mediatek/clk-mt7986-eth.c > @@ -85,7 +85,7 @@ static void __init mtk_sgmiisys_0_init(struct device_node *node) > clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii0_clks)); > > mtk_clk_register_gates(node, sgmii0_clks, ARRAY_SIZE(sgmii0_clks), > - clk_data); > + clk_data, NULL); > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > if (r) > @@ -103,7 +103,7 @@ static void __init mtk_sgmiisys_1_init(struct device_node *node) > clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii1_clks)); > > mtk_clk_register_gates(node, sgmii1_clks, ARRAY_SIZE(sgmii1_clks), > - clk_data); > + clk_data, NULL); > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > > @@ -121,7 +121,7 @@ static void __init mtk_ethsys_init(struct device_node *node) > > clk_data = mtk_alloc_clk_data(ARRAY_SIZE(eth_clks)); > > - mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), clk_data); > + mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), clk_data, NULL); You kept within 80c nearly everywhere, but there are a few calls where you added 'NULL' that go over the 80c now. Not sure if that was intended?! > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > [...] > diff --git a/drivers/clk/mediatek/clk-mt8183-mm.c b/drivers/clk/mediatek/clk-mt8183-mm.c > index 11ecc6fb0065..f93043da26c0 100644 > --- a/drivers/clk/mediatek/clk-mt8183-mm.c > +++ b/drivers/clk/mediatek/clk-mt8183-mm.c > @@ -91,7 +91,7 @@ static int clk_mt8183_mm_probe(struct platform_device *pdev) > clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); > > mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), > - clk_data); > + clk_data, &pdev->dev); This is not aligned with the opening bracket here and a few below. Maybe you can fix it with your patch as well. > > return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > } [...] > diff --git a/drivers/clk/mediatek/clk-mt8192.c b/drivers/clk/mediatek/clk-mt8192.c > index 991d78a71644..e1b625b86911 100644 > --- a/drivers/clk/mediatek/clk-mt8192.c > +++ b/drivers/clk/mediatek/clk-mt8192.c > @@ -1127,7 +1127,7 @@ static int clk_mt8192_top_probe(struct platform_device *pdev) > if (r) > goto unregister_top_composites; > > - r = mtk_clk_register_gates_with_dev(node, top_clks, ARRAY_SIZE(top_clks), > + r = mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), > top_clk_data, &pdev->dev); Here and below, the function call got shorter, please fix the indentation in the following lines. Best, Markus
WARNING: multiple messages have this Message-ID (diff)
From: Markus Schneider-Pargmann <msp@baylibre.com> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() Date: Wed, 4 Jan 2023 12:21:44 +0100 [thread overview] Message-ID: <20230104112144.n2mx33xqavigxwa2@blmsp> (raw) In-Reply-To: <20221223094259.87373-4-angelogioacchino.delregno@collabora.com> Hi Angelo, On Fri, Dec 23, 2022 at 10:42:39AM +0100, AngeloGioacchino Del Regno wrote: > Commit e4c23e19aa2a ("clk: mediatek: Register clock gate with device") > introduces a helper function for the sole purpose of propagating a > struct device pointer to the clk API when registering the mtk-gate > clocks to take advantage of Runtime PM when/where needed and where > a power domain is defined in devicetree. > > Function mtk_clk_register_gates() then becomes a wrapper around the > new mtk_clk_register_gates_with_dev() function that will simply pass > NULL as struct device: this is essential when registering drivers > with CLK_OF_DECLARE instead of as a platform device, as there will > be no struct device to pass... but we can as well simply have only > one function that always takes such pointer as a param and pass NULL > when unavoidable. > > This commit removes the mtk_clk_register_gates() wrapper and renames > mtk_clk_register_gates_with_dev() to the former and all of the calls > to either of the two functions were fixed in all drivers in order to > reflect this change. > > Since a lot of MediaTek clock drivers are actually registering as a > platform device, but were still registering the mtk-gate clocks > without passing any struct device to the clock framework, they've > been changed to pass a valid one now, as to make all those platforms > able to use runtime power management where available. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> A few nitpicks, otherwise it looks good, Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> > --- > drivers/clk/mediatek/clk-gate.c | 16 ++++------------ > drivers/clk/mediatek/clk-gate.h | 8 ++------ > drivers/clk/mediatek/clk-mt2701-aud.c | 2 +- > drivers/clk/mediatek/clk-mt2701-eth.c | 2 +- > drivers/clk/mediatek/clk-mt2701-g3d.c | 2 +- > drivers/clk/mediatek/clk-mt2701-hif.c | 2 +- > drivers/clk/mediatek/clk-mt2701-mm.c | 2 +- > drivers/clk/mediatek/clk-mt2701.c | 6 +++--- > drivers/clk/mediatek/clk-mt2712-mm.c | 2 +- > drivers/clk/mediatek/clk-mt2712.c | 6 +++--- > drivers/clk/mediatek/clk-mt6765.c | 6 +++--- > drivers/clk/mediatek/clk-mt6779-mm.c | 2 +- > drivers/clk/mediatek/clk-mt6779.c | 4 ++-- > drivers/clk/mediatek/clk-mt6795-infracfg.c | 3 ++- > drivers/clk/mediatek/clk-mt6795-mm.c | 3 ++- > drivers/clk/mediatek/clk-mt6795-pericfg.c | 3 ++- > drivers/clk/mediatek/clk-mt6797-mm.c | 2 +- > drivers/clk/mediatek/clk-mt6797.c | 2 +- > drivers/clk/mediatek/clk-mt7622-aud.c | 2 +- > drivers/clk/mediatek/clk-mt7622-eth.c | 4 ++-- > drivers/clk/mediatek/clk-mt7622-hif.c | 4 ++-- > drivers/clk/mediatek/clk-mt7622.c | 9 +++++---- > drivers/clk/mediatek/clk-mt7629-eth.c | 5 +++-- > drivers/clk/mediatek/clk-mt7629-hif.c | 4 ++-- > drivers/clk/mediatek/clk-mt7629.c | 6 +++--- > drivers/clk/mediatek/clk-mt7986-eth.c | 6 +++--- > drivers/clk/mediatek/clk-mt7986-infracfg.c | 2 +- > drivers/clk/mediatek/clk-mt8135.c | 4 ++-- > drivers/clk/mediatek/clk-mt8167-aud.c | 2 +- > drivers/clk/mediatek/clk-mt8167-img.c | 2 +- > drivers/clk/mediatek/clk-mt8167-mfgcfg.c | 2 +- > drivers/clk/mediatek/clk-mt8167-mm.c | 2 +- > drivers/clk/mediatek/clk-mt8167-vdec.c | 3 ++- > drivers/clk/mediatek/clk-mt8167.c | 2 +- > drivers/clk/mediatek/clk-mt8173-mm.c | 2 +- > drivers/clk/mediatek/clk-mt8173.c | 12 ++++++------ > drivers/clk/mediatek/clk-mt8183-audio.c | 2 +- > drivers/clk/mediatek/clk-mt8183-mm.c | 2 +- > drivers/clk/mediatek/clk-mt8183.c | 8 ++++---- > drivers/clk/mediatek/clk-mt8186-mm.c | 3 ++- > drivers/clk/mediatek/clk-mt8192-aud.c | 3 ++- > drivers/clk/mediatek/clk-mt8192-mm.c | 3 ++- > drivers/clk/mediatek/clk-mt8192.c | 12 ++++++------ > drivers/clk/mediatek/clk-mt8195-apmixedsys.c | 3 ++- > drivers/clk/mediatek/clk-mt8195-topckgen.c | 3 ++- > drivers/clk/mediatek/clk-mt8195-vdo0.c | 3 ++- > drivers/clk/mediatek/clk-mt8195-vdo1.c | 3 ++- > drivers/clk/mediatek/clk-mt8365-mm.c | 5 ++--- > drivers/clk/mediatek/clk-mt8365.c | 2 +- > drivers/clk/mediatek/clk-mt8516-aud.c | 2 +- > drivers/clk/mediatek/clk-mt8516.c | 2 +- > drivers/clk/mediatek/clk-mtk.c | 4 ++-- > 52 files changed, 103 insertions(+), 103 deletions(-) > [...] > diff --git a/drivers/clk/mediatek/clk-mt7986-eth.c b/drivers/clk/mediatek/clk-mt7986-eth.c > index 7868c0728e96..765df117afa6 100644 > --- a/drivers/clk/mediatek/clk-mt7986-eth.c > +++ b/drivers/clk/mediatek/clk-mt7986-eth.c > @@ -85,7 +85,7 @@ static void __init mtk_sgmiisys_0_init(struct device_node *node) > clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii0_clks)); > > mtk_clk_register_gates(node, sgmii0_clks, ARRAY_SIZE(sgmii0_clks), > - clk_data); > + clk_data, NULL); > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > if (r) > @@ -103,7 +103,7 @@ static void __init mtk_sgmiisys_1_init(struct device_node *node) > clk_data = mtk_alloc_clk_data(ARRAY_SIZE(sgmii1_clks)); > > mtk_clk_register_gates(node, sgmii1_clks, ARRAY_SIZE(sgmii1_clks), > - clk_data); > + clk_data, NULL); > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > > @@ -121,7 +121,7 @@ static void __init mtk_ethsys_init(struct device_node *node) > > clk_data = mtk_alloc_clk_data(ARRAY_SIZE(eth_clks)); > > - mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), clk_data); > + mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), clk_data, NULL); You kept within 80c nearly everywhere, but there are a few calls where you added 'NULL' that go over the 80c now. Not sure if that was intended?! > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > [...] > diff --git a/drivers/clk/mediatek/clk-mt8183-mm.c b/drivers/clk/mediatek/clk-mt8183-mm.c > index 11ecc6fb0065..f93043da26c0 100644 > --- a/drivers/clk/mediatek/clk-mt8183-mm.c > +++ b/drivers/clk/mediatek/clk-mt8183-mm.c > @@ -91,7 +91,7 @@ static int clk_mt8183_mm_probe(struct platform_device *pdev) > clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); > > mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), > - clk_data); > + clk_data, &pdev->dev); This is not aligned with the opening bracket here and a few below. Maybe you can fix it with your patch as well. > > return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > } [...] > diff --git a/drivers/clk/mediatek/clk-mt8192.c b/drivers/clk/mediatek/clk-mt8192.c > index 991d78a71644..e1b625b86911 100644 > --- a/drivers/clk/mediatek/clk-mt8192.c > +++ b/drivers/clk/mediatek/clk-mt8192.c > @@ -1127,7 +1127,7 @@ static int clk_mt8192_top_probe(struct platform_device *pdev) > if (r) > goto unregister_top_composites; > > - r = mtk_clk_register_gates_with_dev(node, top_clks, ARRAY_SIZE(top_clks), > + r = mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), > top_clk_data, &pdev->dev); Here and below, the function call got shorter, please fix the indentation in the following lines. Best, Markus _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-04 11:21 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-23 9:42 [PATCH v2 00/23] MediaTek clocks cleanups and improvements AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 01/23] clk: mediatek: mt8192: Correctly unregister and free clocks on failure AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:55 ` Chen-Yu Tsai 2022-12-26 6:55 ` Chen-Yu Tsai 2023-01-04 10:55 ` Markus Schneider-Pargmann 2023-01-04 10:55 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 02/23] clk: mediatek: mt8192: Propagate struct device for gate clocks AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:05 ` Chen-Yu Tsai 2022-12-26 7:05 ` Chen-Yu Tsai 2023-01-04 11:21 ` Markus Schneider-Pargmann [this message] 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 04/23] clk: mediatek: cpumux: Propagate struct device where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:07 ` Chen-Yu Tsai 2022-12-26 7:07 ` Chen-Yu Tsai 2023-01-06 17:00 ` Markus Schneider-Pargmann 2023-01-06 17:00 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 05/23] clk: mediatek: clk-mtk: Propagate struct device for composites AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:37 ` Chen-Yu Tsai 2022-12-30 4:37 ` Chen-Yu Tsai 2023-01-06 17:09 ` Markus Schneider-Pargmann 2023-01-06 17:09 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 06/23] clk: mediatek: clk-mux: Propagate struct device for mtk-mux AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:24 ` Miles Chen 2022-12-28 7:24 ` Miles Chen 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 08/23] clk: mediatek: mt8173: Migrate to platform driver and common probe AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 09/23] clk: mediatek: mt8173: Remove mtk_clk_enable_critical() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:58 ` Chen-Yu Tsai 2022-12-30 4:58 ` Chen-Yu Tsai 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-11 2:27 ` Chen-Yu Tsai 2023-01-11 2:27 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-24 1:47 ` kernel test robot 2022-12-23 9:42 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:50 ` Miles Chen 2022-12-28 7:50 ` Miles Chen 2022-12-30 5:12 ` Chen-Yu Tsai 2022-12-30 5:12 ` Chen-Yu Tsai 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 8:56 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() Miles Chen 2023-01-11 8:56 ` Miles Chen 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:22 ` Miles Chen 2022-12-27 16:22 ` Miles Chen 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 13/23] clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:54 ` Miles Chen 2022-12-28 7:54 ` Miles Chen 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 14/23] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:58 ` Miles Chen 2022-12-28 7:58 ` Miles Chen 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 8:31 ` Miles Chen 2022-12-28 8:31 ` Miles Chen 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 16/23] clk: mediatek: mt8186: Join top_adj_div " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 18/23] clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-29 8:21 ` Miles Chen 2022-12-29 8:21 ` Miles Chen 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 19/23] clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 20/23] clk: mediatek: clk-mt8186-topckgen: Migrate " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:55 ` Miles Chen 2022-12-30 5:55 ` Miles Chen 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 21/23] clk: mediatek: clk-mt6795-topckgen: " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:56 ` Miles Chen 2022-12-30 5:56 ` Miles Chen 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 22/23] clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 6:04 ` Miles Chen 2022-12-30 6:04 ` Miles Chen 2022-12-23 9:42 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:18 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Miles Chen 2022-12-27 16:18 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-30 6:05 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() Miles Chen 2022-12-30 6:05 ` Miles Chen 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 6:13 ` [PATCH v2 00/23] MediaTek clocks cleanups and improvements Miles Chen 2022-12-30 6:13 ` Miles Chen 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 7:19 ` Miles Chen 2022-12-30 7:19 ` Miles Chen 2023-01-03 9:36 ` Chen-Yu Tsai 2023-01-03 9:36 ` Chen-Yu Tsai 2022-12-23 20:33 [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build kernel test robot 2022-12-24 7:13 ` Dan Carpenter 2022-12-24 7:13 ` Dan Carpenter
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