From: Dario Binacchi <dario.binacchi@amarulasolutions.com> To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Amarula patchwork <linux-amarula@amarulasolutions.com>, Vincent Mailhol <mailhol.vincent@wanadoo.fr>, Alexandre Torgue <alexandre.torgue@foss.st.com>, michael@amarulasolutions.com, Rob Herring <robh@kernel.org>, Marc Kleine-Budde <mkl@pengutronix.de>, Dario Binacchi <dario.binacchi@amarulasolutions.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Date: Wed, 15 Mar 2023 22:10:38 +0100 [thread overview] Message-ID: <20230315211040.2455855-4-dario.binacchi@amarulasolutions.com> (raw) In-Reply-To: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the master and CAN2 the slave, that share some of the required logic like clock and filters. This means that the slave CAN can't be used without the master CAN. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- (no changes since v6) Changes in v6: - move can1 node before gcan to keep ordering by address. Changes in v4: - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). Changes in v3: - Remove 'Dario Binacchi <dariobin@libero.it>' SOB. - Add "clocks" to can@0 node. arch/arm/boot/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index c31ceb821231..809b2842ded9 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -362,6 +362,35 @@ i2c3: i2c@40005c00 { status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>; -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Dario Binacchi <dario.binacchi@amarulasolutions.com> To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Amarula patchwork <linux-amarula@amarulasolutions.com>, Vincent Mailhol <mailhol.vincent@wanadoo.fr>, Alexandre Torgue <alexandre.torgue@foss.st.com>, michael@amarulasolutions.com, Rob Herring <robh@kernel.org>, Marc Kleine-Budde <mkl@pengutronix.de>, Dario Binacchi <dario.binacchi@amarulasolutions.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Date: Wed, 15 Mar 2023 22:10:38 +0100 [thread overview] Message-ID: <20230315211040.2455855-4-dario.binacchi@amarulasolutions.com> (raw) In-Reply-To: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the master and CAN2 the slave, that share some of the required logic like clock and filters. This means that the slave CAN can't be used without the master CAN. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> --- (no changes since v6) Changes in v6: - move can1 node before gcan to keep ordering by address. Changes in v4: - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). Changes in v3: - Remove 'Dario Binacchi <dariobin@libero.it>' SOB. - Add "clocks" to can@0 node. arch/arm/boot/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index c31ceb821231..809b2842ded9 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -362,6 +362,35 @@ i2c3: i2c@40005c00 { status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>; -- 2.32.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-03-15 21:11 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-15 21:10 [RESEND PATCH v7 0/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 1/5] dt-bindings: arm: stm32: add compatible for syscon gcan node Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi [this message] 2023-03-15 21:10 ` [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 5/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi 2023-03-24 15:40 ` Marc Kleine-Budde 2023-03-24 15:54 ` Marc Kleine-Budde 2023-03-21 11:25 ` [RESEND PATCH v7 0/5] " Dario Binacchi 2023-03-21 11:25 ` Dario Binacchi 2023-03-21 17:50 ` Alexandre TORGUE 2023-03-21 17:50 ` Alexandre TORGUE 2023-03-24 15:56 ` Marc Kleine-Budde 2023-03-24 15:56 ` Marc Kleine-Budde 2023-03-26 16:07 ` Dario Binacchi 2023-03-26 16:07 ` Dario Binacchi 2023-03-27 7:51 ` Marc Kleine-Budde 2023-03-27 7:51 ` Marc Kleine-Budde -- strict thread matches above, loose matches on Subject: below -- 2023-02-07 11:29 Dario Binacchi 2023-02-07 11:29 ` [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi 2023-02-07 11:29 ` Dario Binacchi
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