From: Tom Fitzhenry <tom@tom-fitzhenry.me.uk> To: Michael Walle <michael@walle.cc> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Martijn Braam <martijn@brixit.nl>, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] mtd: spi-nor: gigadevice: add support for gd25lq128e Date: Wed, 25 May 2022 06:50:36 +1000 [thread overview] Message-ID: <28d3925a-983a-fcb8-19af-6e6baf892d53@tom-fitzhenry.me.uk> (raw) In-Reply-To: <65339d49135ffb578b5cd5ae459cea8a@walle.cc> [-- Attachment #1: Type: text/plain, Size: 1643 bytes --] On 23/5/22 18:03, Michael Walle wrote: > According to JEP106BC the vendor code 0x25 is Tristar. I'm > not sure what is going on here. Nor I! The board schematic[0] reports the use of GD25LQ128EWIGR (vendor Gigadevices), but indeed the chip itself reports vendor Tristar. I will ask the community/vendor about this discrepancy. > This flash supports SFDP, please provide an SFDP dump, see [1]. I will include this in my v2 patch. For posterity, here's the dump: $ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff9d05010380000002ffffffffffff ffffffffffffffffffffffffffffffffffffe520f9ffffffff0744eb086b 083b80bbfeffffffffff00ffffff44eb0c200f5210d800ff234ac90082d8 11c7cccd68467a757a75f7a2d55c4a422cfff030c080ffffffffffffffff ffffffffffffffff501950169cf9c0648fecffff $ md5sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp de4d6be54e479d60859b0ca8a0ee9216 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp $ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id 257018 $ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname gd25lq128e $ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer gigadevice I have attached the parsed sfdp, according to https://github.com/petris/sfdp-parser > Did you test locking? No. The datasheet mentions Status Register locking, but I will look into how to adequately test this. > As this flash supports SFDP, please use SNOR_ID3(0x257018) > and drop both the INFO() and the NO_SFDP_FLAGS(). You'll > need my SNOR_ID3() patches [2]. SGTM, will do. Thanks for your feedback! 0. https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf page 11, "GD25LQ128EWIGR" [-- Attachment #2: sfdp_parsed.txt --] [-- Type: text/plain, Size: 4568 bytes --] Signature: 0x50444653 (Must be 0x50444653 ('S', 'F', 'D', 'P')) Major: 1 Minor: 6 Parameters: 2 Total length: 140 Parameter 0 (Basic flash parameter table) Major: 0xff00 Major: 1 Minor: 6 Offset: 48 Length: 64 Erase Size: 1 (4kB supported) Write Granularity: 1 (64 bytes or more) Volatile Status Register Block Protect Bits: 0 (non-volatile) Write Enable Instruction for Writing to Volatile Status Register: 0 (50h) 4kB Erase Instruction: 0x20 1-1-2 Fast Read: 1 (supported) Address Bytes: 0 (3-byte addressing) Double transfer rate (DTR) Clocking: 1 (supported) 1-2-2 Fast Read: 1 (supported) 1-4-4 Fast Read: 1 (supported) 1-1-4 Fast Read: 1 (supported) Flash Memory Density: 16777215 (in bytes) 1-4-4 Fast Read Number of Wait States Needed: 4 1-4-4 Fast Read Number of Mode Clocks: 2 1-4-4 Fast Read Instructions: 0xeb 1-1-4 Fast Read Number of Wait States Needed: 8 1-1-4 Fast Read Number of Mode Clocks: 0 1-1-4 Fast Read Instructions: 0x6b 1-1-2 Fast Read Number of Wait States Needed: 8 1-1-2 Fast Read Number of Mode Clocks: 0 1-1-2 Fast Read Instructions: 0x3b 1-2-2 Fast Read Number of Wait States Needed: 0 1-2-2 Fast Read Number of Mode Clocks: 4 1-2-2 Fast Read Instructions: 0xbb 2-2-2 Fast Read: 0 (not supported) 4-4-4 Fast Read: 1 (supported) 2-2-2 Fast Read Number of Wait States Needed: 0 2-2-2 Fast Read Number of Mode Clocks: 0 2-2-2 Fast Read Instructions: 0xff 4-4-4 Fast Read Number of Wait States Needed: 4 4-4-4 Fast Read Number of Mode Clocks: 2 4-4-4 Fast Read Instructions: 0xeb Erase Type 1 Size: 4096 (in bytes) Erase Type 1 Instruction: 0x20 Erase Type 2 Size: 32768 (in bytes) Erase Type 2 Instruction: 0x52 Erase Type 3 Size: 65536 (in bytes) Erase Type 3 Instruction: 0xd8 Erase Type 4 Size: 1 (not supported) Erase Type 4 Instruction: 0xff Typical Erase Time to Maximum Erase Time Multiplier: 8 Erase Type 1 Typical Time: 256 (in milliseconds) Erase Type 2 Typical Time: 160 (in milliseconds) Erase Type 4 Typical Time: 304 (in milliseconds) Erase Type 4 Typical Time: 1 (in milliseconds) Typical Program Time to Maximum Program Time Multiplier: 6 Page Size: 256 Typical Page Program Time: 200 (in microseconds) Typical First Byte Program Time: 8 (in microseconds) Typical Additional Byte Program Time: 3 (in microseconds) Typical Chip Erase Time: 32000 (in milliseconds) Parameter 1 (Unknown parameter) Major: 0x29d Major: 1 Minor: 5 Offset: 128 Length: 12 Word 0: 0x16501950 Word 1: 0x64c0f99c Word 2: 0xffffec8f
WARNING: multiple messages have this Message-ID (diff)
From: Tom Fitzhenry <tom@tom-fitzhenry.me.uk> To: Michael Walle <michael@walle.cc> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>, Pratyush Yadav <p.yadav@ti.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Martijn Braam <martijn@brixit.nl>, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] mtd: spi-nor: gigadevice: add support for gd25lq128e Date: Wed, 25 May 2022 06:50:36 +1000 [thread overview] Message-ID: <28d3925a-983a-fcb8-19af-6e6baf892d53@tom-fitzhenry.me.uk> (raw) In-Reply-To: <65339d49135ffb578b5cd5ae459cea8a@walle.cc> [-- Attachment #1: Type: text/plain, Size: 1643 bytes --] On 23/5/22 18:03, Michael Walle wrote: > According to JEP106BC the vendor code 0x25 is Tristar. I'm > not sure what is going on here. Nor I! The board schematic[0] reports the use of GD25LQ128EWIGR (vendor Gigadevices), but indeed the chip itself reports vendor Tristar. I will ask the community/vendor about this discrepancy. > This flash supports SFDP, please provide an SFDP dump, see [1]. I will include this in my v2 patch. For posterity, here's the dump: $ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff9d05010380000002ffffffffffff ffffffffffffffffffffffffffffffffffffe520f9ffffffff0744eb086b 083b80bbfeffffffffff00ffffff44eb0c200f5210d800ff234ac90082d8 11c7cccd68467a757a75f7a2d55c4a422cfff030c080ffffffffffffffff ffffffffffffffff501950169cf9c0648fecffff $ md5sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp de4d6be54e479d60859b0ca8a0ee9216 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp $ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id 257018 $ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname gd25lq128e $ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer gigadevice I have attached the parsed sfdp, according to https://github.com/petris/sfdp-parser > Did you test locking? No. The datasheet mentions Status Register locking, but I will look into how to adequately test this. > As this flash supports SFDP, please use SNOR_ID3(0x257018) > and drop both the INFO() and the NO_SFDP_FLAGS(). You'll > need my SNOR_ID3() patches [2]. SGTM, will do. Thanks for your feedback! 0. https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf page 11, "GD25LQ128EWIGR" [-- Attachment #2: sfdp_parsed.txt --] [-- Type: text/plain, Size: 4568 bytes --] Signature: 0x50444653 (Must be 0x50444653 ('S', 'F', 'D', 'P')) Major: 1 Minor: 6 Parameters: 2 Total length: 140 Parameter 0 (Basic flash parameter table) Major: 0xff00 Major: 1 Minor: 6 Offset: 48 Length: 64 Erase Size: 1 (4kB supported) Write Granularity: 1 (64 bytes or more) Volatile Status Register Block Protect Bits: 0 (non-volatile) Write Enable Instruction for Writing to Volatile Status Register: 0 (50h) 4kB Erase Instruction: 0x20 1-1-2 Fast Read: 1 (supported) Address Bytes: 0 (3-byte addressing) Double transfer rate (DTR) Clocking: 1 (supported) 1-2-2 Fast Read: 1 (supported) 1-4-4 Fast Read: 1 (supported) 1-1-4 Fast Read: 1 (supported) Flash Memory Density: 16777215 (in bytes) 1-4-4 Fast Read Number of Wait States Needed: 4 1-4-4 Fast Read Number of Mode Clocks: 2 1-4-4 Fast Read Instructions: 0xeb 1-1-4 Fast Read Number of Wait States Needed: 8 1-1-4 Fast Read Number of Mode Clocks: 0 1-1-4 Fast Read Instructions: 0x6b 1-1-2 Fast Read Number of Wait States Needed: 8 1-1-2 Fast Read Number of Mode Clocks: 0 1-1-2 Fast Read Instructions: 0x3b 1-2-2 Fast Read Number of Wait States Needed: 0 1-2-2 Fast Read Number of Mode Clocks: 4 1-2-2 Fast Read Instructions: 0xbb 2-2-2 Fast Read: 0 (not supported) 4-4-4 Fast Read: 1 (supported) 2-2-2 Fast Read Number of Wait States Needed: 0 2-2-2 Fast Read Number of Mode Clocks: 0 2-2-2 Fast Read Instructions: 0xff 4-4-4 Fast Read Number of Wait States Needed: 4 4-4-4 Fast Read Number of Mode Clocks: 2 4-4-4 Fast Read Instructions: 0xeb Erase Type 1 Size: 4096 (in bytes) Erase Type 1 Instruction: 0x20 Erase Type 2 Size: 32768 (in bytes) Erase Type 2 Instruction: 0x52 Erase Type 3 Size: 65536 (in bytes) Erase Type 3 Instruction: 0xd8 Erase Type 4 Size: 1 (not supported) Erase Type 4 Instruction: 0xff Typical Erase Time to Maximum Erase Time Multiplier: 8 Erase Type 1 Typical Time: 256 (in milliseconds) Erase Type 2 Typical Time: 160 (in milliseconds) Erase Type 4 Typical Time: 304 (in milliseconds) Erase Type 4 Typical Time: 1 (in milliseconds) Typical Program Time to Maximum Program Time Multiplier: 6 Page Size: 256 Typical Page Program Time: 200 (in microseconds) Typical First Byte Program Time: 8 (in microseconds) Typical Additional Byte Program Time: 3 (in microseconds) Typical Chip Erase Time: 32000 (in milliseconds) Parameter 1 (Unknown parameter) Major: 0x29d Major: 1 Minor: 5 Offset: 128 Length: 12 Word 0: 0x16501950 Word 1: 0x64c0f99c Word 2: 0xffffec8f [-- Attachment #3: Type: text/plain, Size: 144 bytes --] ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2022-05-24 20:51 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-23 5:55 [PATCH] mtd: spi-nor: gigadevice: add support for gd25lq128e Tom Fitzhenry 2022-05-23 5:55 ` Tom Fitzhenry 2022-05-23 8:03 ` Michael Walle 2022-05-23 8:03 ` Michael Walle 2022-05-24 20:50 ` Tom Fitzhenry [this message] 2022-05-24 20:50 ` Tom Fitzhenry 2022-05-24 22:30 ` Michael Walle 2022-05-24 22:30 ` Michael Walle 2022-05-29 3:21 ` Tom Fitzhenry
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