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From: Steven Price <steven.price@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	qemu-devel@nongnu.org, Juan Quintela <quintela@redhat.com>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Peter Maydell <peter.maydell@linaro.org>,
	Haibo Xu <Haibo.Xu@arm.com>, Andrew Jones <drjones@redhat.com>
Subject: Re: [PATCH v12 6/8] arm64: kvm: Expose KVM_ARM_CAP_MTE
Date: Thu, 20 May 2021 11:51:21 +0100	[thread overview]
Message-ID: <2dff0e85-abfd-4261-a670-6008ff9195ff@arm.com> (raw)
In-Reply-To: <8735uhvhqz.wl-maz@kernel.org>

On 20/05/2021 11:09, Marc Zyngier wrote:
> On Wed, 19 May 2021 14:26:31 +0100,
> Steven Price <steven.price@arm.com> wrote:
>>
>> On 17/05/2021 18:40, Marc Zyngier wrote:
>>> On Mon, 17 May 2021 13:32:37 +0100,
>>> Steven Price <steven.price@arm.com> wrote:
>>>>
>>>> It's now safe for the VMM to enable MTE in a guest, so expose the
>>>> capability to user space.
>>>>
>>>> Signed-off-by: Steven Price <steven.price@arm.com>
>>>> ---
>>>>  arch/arm64/kvm/arm.c      | 9 +++++++++
>>>>  arch/arm64/kvm/sys_regs.c | 3 +++
>>>>  2 files changed, 12 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>>>> index 1cb39c0803a4..e89a5e275e25 100644
>>>> --- a/arch/arm64/kvm/arm.c
>>>> +++ b/arch/arm64/kvm/arm.c
>>>> @@ -93,6 +93,12 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
>>>>  		r = 0;
>>>>  		kvm->arch.return_nisv_io_abort_to_user = true;
>>>>  		break;
>>>> +	case KVM_CAP_ARM_MTE:
>>>> +		if (!system_supports_mte() || kvm->created_vcpus)
>>>> +			return -EINVAL;
>>>> +		r = 0;
>>>> +		kvm->arch.mte_enabled = true;
>>>
>>> As far as I can tell from the architecture, this isn't valid for a
>>> 32bit guest.
>>
>> Indeed, however the MTE flag is a property of the VM not of the vCPU.
>> And, unless I'm mistaken, it's technically possible to create a VM where
>> some CPUs are 32 bit and some 64 bit. Not that I can see much use of a
>> configuration like that.
> 
> It looks that this is indeed a bug, and I'm on my way to squash it.
> Can't believe we allowed that for so long...

Ah, well if you're going to kill off mixed 32bit/64bit VMs then...

> But the architecture clearly states:
> 
> <quote>
> These features are supported in AArch64 state only.
> </quote>
> 
> So I'd expect something like:
> 
> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
> index 956cdc240148..50635eacfa43 100644
> --- a/arch/arm64/kvm/reset.c
> +++ b/arch/arm64/kvm/reset.c
> @@ -220,7 +220,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
>  	switch (vcpu->arch.target) {
>  	default:
>  		if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
> -			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1)) {
> +			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) ||
> +			    vcpu->kvm->arch.mte_enabled) {
>  				ret = -EINVAL;
>  				goto out;
>  			}
> 
> that makes it completely impossible to create 32bit CPUs within a
> MTE-enabled guest.

... that makes complete sense, and I'll include this hunk in my next
posting.

Thanks,

Steve

WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Andrew Jones <drjones@redhat.com>, Haibo Xu <Haibo.Xu@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	qemu-devel@nongnu.org, Catalin Marinas <catalin.marinas@arm.com>,
	Juan Quintela <quintela@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
	James Morse <james.morse@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: Re: [PATCH v12 6/8] arm64: kvm: Expose KVM_ARM_CAP_MTE
Date: Thu, 20 May 2021 11:51:21 +0100	[thread overview]
Message-ID: <2dff0e85-abfd-4261-a670-6008ff9195ff@arm.com> (raw)
In-Reply-To: <8735uhvhqz.wl-maz@kernel.org>

On 20/05/2021 11:09, Marc Zyngier wrote:
> On Wed, 19 May 2021 14:26:31 +0100,
> Steven Price <steven.price@arm.com> wrote:
>>
>> On 17/05/2021 18:40, Marc Zyngier wrote:
>>> On Mon, 17 May 2021 13:32:37 +0100,
>>> Steven Price <steven.price@arm.com> wrote:
>>>>
>>>> It's now safe for the VMM to enable MTE in a guest, so expose the
>>>> capability to user space.
>>>>
>>>> Signed-off-by: Steven Price <steven.price@arm.com>
>>>> ---
>>>>  arch/arm64/kvm/arm.c      | 9 +++++++++
>>>>  arch/arm64/kvm/sys_regs.c | 3 +++
>>>>  2 files changed, 12 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>>>> index 1cb39c0803a4..e89a5e275e25 100644
>>>> --- a/arch/arm64/kvm/arm.c
>>>> +++ b/arch/arm64/kvm/arm.c
>>>> @@ -93,6 +93,12 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
>>>>  		r = 0;
>>>>  		kvm->arch.return_nisv_io_abort_to_user = true;
>>>>  		break;
>>>> +	case KVM_CAP_ARM_MTE:
>>>> +		if (!system_supports_mte() || kvm->created_vcpus)
>>>> +			return -EINVAL;
>>>> +		r = 0;
>>>> +		kvm->arch.mte_enabled = true;
>>>
>>> As far as I can tell from the architecture, this isn't valid for a
>>> 32bit guest.
>>
>> Indeed, however the MTE flag is a property of the VM not of the vCPU.
>> And, unless I'm mistaken, it's technically possible to create a VM where
>> some CPUs are 32 bit and some 64 bit. Not that I can see much use of a
>> configuration like that.
> 
> It looks that this is indeed a bug, and I'm on my way to squash it.
> Can't believe we allowed that for so long...

Ah, well if you're going to kill off mixed 32bit/64bit VMs then...

> But the architecture clearly states:
> 
> <quote>
> These features are supported in AArch64 state only.
> </quote>
> 
> So I'd expect something like:
> 
> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
> index 956cdc240148..50635eacfa43 100644
> --- a/arch/arm64/kvm/reset.c
> +++ b/arch/arm64/kvm/reset.c
> @@ -220,7 +220,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
>  	switch (vcpu->arch.target) {
>  	default:
>  		if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
> -			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1)) {
> +			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) ||
> +			    vcpu->kvm->arch.mte_enabled) {
>  				ret = -EINVAL;
>  				goto out;
>  			}
> 
> that makes it completely impossible to create 32bit CPUs within a
> MTE-enabled guest.

... that makes complete sense, and I'll include this hunk in my next
posting.

Thanks,

Steve


WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	qemu-devel@nongnu.org, Catalin Marinas <catalin.marinas@arm.com>,
	Juan Quintela <quintela@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v12 6/8] arm64: kvm: Expose KVM_ARM_CAP_MTE
Date: Thu, 20 May 2021 11:51:21 +0100	[thread overview]
Message-ID: <2dff0e85-abfd-4261-a670-6008ff9195ff@arm.com> (raw)
In-Reply-To: <8735uhvhqz.wl-maz@kernel.org>

On 20/05/2021 11:09, Marc Zyngier wrote:
> On Wed, 19 May 2021 14:26:31 +0100,
> Steven Price <steven.price@arm.com> wrote:
>>
>> On 17/05/2021 18:40, Marc Zyngier wrote:
>>> On Mon, 17 May 2021 13:32:37 +0100,
>>> Steven Price <steven.price@arm.com> wrote:
>>>>
>>>> It's now safe for the VMM to enable MTE in a guest, so expose the
>>>> capability to user space.
>>>>
>>>> Signed-off-by: Steven Price <steven.price@arm.com>
>>>> ---
>>>>  arch/arm64/kvm/arm.c      | 9 +++++++++
>>>>  arch/arm64/kvm/sys_regs.c | 3 +++
>>>>  2 files changed, 12 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>>>> index 1cb39c0803a4..e89a5e275e25 100644
>>>> --- a/arch/arm64/kvm/arm.c
>>>> +++ b/arch/arm64/kvm/arm.c
>>>> @@ -93,6 +93,12 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
>>>>  		r = 0;
>>>>  		kvm->arch.return_nisv_io_abort_to_user = true;
>>>>  		break;
>>>> +	case KVM_CAP_ARM_MTE:
>>>> +		if (!system_supports_mte() || kvm->created_vcpus)
>>>> +			return -EINVAL;
>>>> +		r = 0;
>>>> +		kvm->arch.mte_enabled = true;
>>>
>>> As far as I can tell from the architecture, this isn't valid for a
>>> 32bit guest.
>>
>> Indeed, however the MTE flag is a property of the VM not of the vCPU.
>> And, unless I'm mistaken, it's technically possible to create a VM where
>> some CPUs are 32 bit and some 64 bit. Not that I can see much use of a
>> configuration like that.
> 
> It looks that this is indeed a bug, and I'm on my way to squash it.
> Can't believe we allowed that for so long...

Ah, well if you're going to kill off mixed 32bit/64bit VMs then...

> But the architecture clearly states:
> 
> <quote>
> These features are supported in AArch64 state only.
> </quote>
> 
> So I'd expect something like:
> 
> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
> index 956cdc240148..50635eacfa43 100644
> --- a/arch/arm64/kvm/reset.c
> +++ b/arch/arm64/kvm/reset.c
> @@ -220,7 +220,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
>  	switch (vcpu->arch.target) {
>  	default:
>  		if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
> -			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1)) {
> +			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) ||
> +			    vcpu->kvm->arch.mte_enabled) {
>  				ret = -EINVAL;
>  				goto out;
>  			}
> 
> that makes it completely impossible to create 32bit CPUs within a
> MTE-enabled guest.

... that makes complete sense, and I'll include this hunk in my next
posting.

Thanks,

Steve
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,  James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Dave Martin <Dave.Martin@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	qemu-devel@nongnu.org, Juan Quintela <quintela@redhat.com>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Peter Maydell <peter.maydell@linaro.org>,
	Haibo Xu <Haibo.Xu@arm.com>, Andrew Jones <drjones@redhat.com>
Subject: Re: [PATCH v12 6/8] arm64: kvm: Expose KVM_ARM_CAP_MTE
Date: Thu, 20 May 2021 11:51:21 +0100	[thread overview]
Message-ID: <2dff0e85-abfd-4261-a670-6008ff9195ff@arm.com> (raw)
In-Reply-To: <8735uhvhqz.wl-maz@kernel.org>

On 20/05/2021 11:09, Marc Zyngier wrote:
> On Wed, 19 May 2021 14:26:31 +0100,
> Steven Price <steven.price@arm.com> wrote:
>>
>> On 17/05/2021 18:40, Marc Zyngier wrote:
>>> On Mon, 17 May 2021 13:32:37 +0100,
>>> Steven Price <steven.price@arm.com> wrote:
>>>>
>>>> It's now safe for the VMM to enable MTE in a guest, so expose the
>>>> capability to user space.
>>>>
>>>> Signed-off-by: Steven Price <steven.price@arm.com>
>>>> ---
>>>>  arch/arm64/kvm/arm.c      | 9 +++++++++
>>>>  arch/arm64/kvm/sys_regs.c | 3 +++
>>>>  2 files changed, 12 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>>>> index 1cb39c0803a4..e89a5e275e25 100644
>>>> --- a/arch/arm64/kvm/arm.c
>>>> +++ b/arch/arm64/kvm/arm.c
>>>> @@ -93,6 +93,12 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
>>>>  		r = 0;
>>>>  		kvm->arch.return_nisv_io_abort_to_user = true;
>>>>  		break;
>>>> +	case KVM_CAP_ARM_MTE:
>>>> +		if (!system_supports_mte() || kvm->created_vcpus)
>>>> +			return -EINVAL;
>>>> +		r = 0;
>>>> +		kvm->arch.mte_enabled = true;
>>>
>>> As far as I can tell from the architecture, this isn't valid for a
>>> 32bit guest.
>>
>> Indeed, however the MTE flag is a property of the VM not of the vCPU.
>> And, unless I'm mistaken, it's technically possible to create a VM where
>> some CPUs are 32 bit and some 64 bit. Not that I can see much use of a
>> configuration like that.
> 
> It looks that this is indeed a bug, and I'm on my way to squash it.
> Can't believe we allowed that for so long...

Ah, well if you're going to kill off mixed 32bit/64bit VMs then...

> But the architecture clearly states:
> 
> <quote>
> These features are supported in AArch64 state only.
> </quote>
> 
> So I'd expect something like:
> 
> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
> index 956cdc240148..50635eacfa43 100644
> --- a/arch/arm64/kvm/reset.c
> +++ b/arch/arm64/kvm/reset.c
> @@ -220,7 +220,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
>  	switch (vcpu->arch.target) {
>  	default:
>  		if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) {
> -			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1)) {
> +			if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) ||
> +			    vcpu->kvm->arch.mte_enabled) {
>  				ret = -EINVAL;
>  				goto out;
>  			}
> 
> that makes it completely impossible to create 32bit CPUs within a
> MTE-enabled guest.

... that makes complete sense, and I'll include this hunk in my next
posting.

Thanks,

Steve

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-05-20 11:11 UTC|newest]

Thread overview: 196+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 12:32 [PATCH v12 0/8] MTE support for KVM guest Steven Price
2021-05-17 12:32 ` Steven Price
2021-05-17 12:32 ` Steven Price
2021-05-17 12:32 ` Steven Price
2021-05-17 12:32 ` [PATCH v12 1/8] arm64: mte: Handle race when synchronising tags Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 14:03   ` Marc Zyngier
2021-05-17 14:03     ` Marc Zyngier
2021-05-17 14:03     ` Marc Zyngier
2021-05-17 14:03     ` Marc Zyngier
2021-05-17 14:56     ` Steven Price
2021-05-17 14:56       ` Steven Price
2021-05-17 14:56       ` Steven Price
2021-05-17 14:56       ` Steven Price
2021-05-19 17:32   ` Catalin Marinas
2021-05-19 17:32     ` Catalin Marinas
2021-05-19 17:32     ` Catalin Marinas
2021-05-19 17:32     ` Catalin Marinas
2021-05-17 12:32 ` [PATCH v12 2/8] arm64: Handle MTE tags zeroing in __alloc_zeroed_user_highpage() Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32 ` [PATCH v12 3/8] arm64: mte: Sync tags for pages where PTE is untagged Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 16:14   ` Marc Zyngier
2021-05-17 16:14     ` Marc Zyngier
2021-05-17 16:14     ` Marc Zyngier
2021-05-17 16:14     ` Marc Zyngier
2021-05-19  9:32     ` Steven Price
2021-05-19  9:32       ` Steven Price
2021-05-19  9:32       ` Steven Price
2021-05-19  9:32       ` Steven Price
2021-05-19 17:48       ` Catalin Marinas
2021-05-19 17:48         ` Catalin Marinas
2021-05-19 17:48         ` Catalin Marinas
2021-05-19 17:48         ` Catalin Marinas
2021-05-19 18:06   ` Catalin Marinas
2021-05-19 18:06     ` Catalin Marinas
2021-05-19 18:06     ` Catalin Marinas
2021-05-19 18:06     ` Catalin Marinas
2021-05-20 11:55     ` Steven Price
2021-05-20 11:55       ` Steven Price
2021-05-20 11:55       ` Steven Price
2021-05-20 11:55       ` Steven Price
2021-05-20 12:25       ` Catalin Marinas
2021-05-20 12:25         ` Catalin Marinas
2021-05-20 12:25         ` Catalin Marinas
2021-05-20 12:25         ` Catalin Marinas
2021-05-20 13:02         ` Catalin Marinas
2021-05-20 13:02           ` Catalin Marinas
2021-05-20 13:02           ` Catalin Marinas
2021-05-20 13:02           ` Catalin Marinas
2021-05-20 13:03         ` Steven Price
2021-05-20 13:03           ` Steven Price
2021-05-20 13:03           ` Steven Price
2021-05-20 13:03           ` Steven Price
2021-05-17 12:32 ` [PATCH v12 4/8] arm64: kvm: Introduce MTE VM feature Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 16:45   ` Marc Zyngier
2021-05-17 16:45     ` Marc Zyngier
2021-05-17 16:45     ` Marc Zyngier
2021-05-17 16:45     ` Marc Zyngier
2021-05-19 10:48     ` Steven Price
2021-05-19 10:48       ` Steven Price
2021-05-19 10:48       ` Steven Price
2021-05-19 10:48       ` Steven Price
2021-05-20  8:51       ` Marc Zyngier
2021-05-20  8:51         ` Marc Zyngier
2021-05-20  8:51         ` Marc Zyngier
2021-05-20  8:51         ` Marc Zyngier
2021-05-20 14:46         ` Steven Price
2021-05-20 14:46           ` Steven Price
2021-05-20 14:46           ` Steven Price
2021-05-20 14:46           ` Steven Price
2021-05-20 11:54   ` Catalin Marinas
2021-05-20 11:54     ` Catalin Marinas
2021-05-20 11:54     ` Catalin Marinas
2021-05-20 11:54     ` Catalin Marinas
2021-05-20 15:05     ` Steven Price
2021-05-20 15:05       ` Steven Price
2021-05-20 15:05       ` Steven Price
2021-05-20 15:05       ` Steven Price
2021-05-20 17:50       ` Catalin Marinas
2021-05-20 17:50         ` Catalin Marinas
2021-05-20 17:50         ` Catalin Marinas
2021-05-20 17:50         ` Catalin Marinas
2021-05-21  9:28         ` Steven Price
2021-05-21  9:28           ` Steven Price
2021-05-21  9:28           ` Steven Price
2021-05-21  9:28           ` Steven Price
2021-05-17 12:32 ` [PATCH v12 5/8] arm64: kvm: Save/restore MTE registers Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 17:17   ` Marc Zyngier
2021-05-17 17:17     ` Marc Zyngier
2021-05-17 17:17     ` Marc Zyngier
2021-05-17 17:17     ` Marc Zyngier
2021-05-19 13:04     ` Steven Price
2021-05-19 13:04       ` Steven Price
2021-05-19 13:04       ` Steven Price
2021-05-19 13:04       ` Steven Price
2021-05-20  9:46       ` Marc Zyngier
2021-05-20  9:46         ` Marc Zyngier
2021-05-20  9:46         ` Marc Zyngier
2021-05-20  9:46         ` Marc Zyngier
2021-05-20 15:21         ` Steven Price
2021-05-20 15:21           ` Steven Price
2021-05-20 15:21           ` Steven Price
2021-05-20 15:21           ` Steven Price
2021-05-17 12:32 ` [PATCH v12 6/8] arm64: kvm: Expose KVM_ARM_CAP_MTE Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 17:40   ` Marc Zyngier
2021-05-17 17:40     ` Marc Zyngier
2021-05-17 17:40     ` Marc Zyngier
2021-05-17 17:40     ` Marc Zyngier
2021-05-19 13:26     ` Steven Price
2021-05-19 13:26       ` Steven Price
2021-05-19 13:26       ` Steven Price
2021-05-19 13:26       ` Steven Price
2021-05-20 10:09       ` Marc Zyngier
2021-05-20 10:09         ` Marc Zyngier
2021-05-20 10:09         ` Marc Zyngier
2021-05-20 10:09         ` Marc Zyngier
2021-05-20 10:51         ` Steven Price [this message]
2021-05-20 10:51           ` Steven Price
2021-05-20 10:51           ` Steven Price
2021-05-20 10:51           ` Steven Price
2021-05-17 12:32 ` [PATCH v12 7/8] KVM: arm64: ioctl to fetch/store tags in a guest Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 18:04   ` Marc Zyngier
2021-05-17 18:04     ` Marc Zyngier
2021-05-17 18:04     ` Marc Zyngier
2021-05-17 18:04     ` Marc Zyngier
2021-05-19 13:51     ` Steven Price
2021-05-19 13:51       ` Steven Price
2021-05-19 13:51       ` Steven Price
2021-05-19 13:51       ` Steven Price
2021-05-20 12:05   ` Catalin Marinas
2021-05-20 12:05     ` Catalin Marinas
2021-05-20 12:05     ` Catalin Marinas
2021-05-20 12:05     ` Catalin Marinas
2021-05-20 15:58     ` Steven Price
2021-05-20 15:58       ` Steven Price
2021-05-20 15:58       ` Steven Price
2021-05-20 15:58       ` Steven Price
2021-05-20 17:27       ` Catalin Marinas
2021-05-20 17:27         ` Catalin Marinas
2021-05-20 17:27         ` Catalin Marinas
2021-05-20 17:27         ` Catalin Marinas
2021-05-21  9:42         ` Steven Price
2021-05-21  9:42           ` Steven Price
2021-05-21  9:42           ` Steven Price
2021-05-21  9:42           ` Steven Price
2021-05-24 18:11           ` Catalin Marinas
2021-05-24 18:11             ` Catalin Marinas
2021-05-24 18:11             ` Catalin Marinas
2021-05-24 18:11             ` Catalin Marinas
2021-05-27  7:50             ` Steven Price
2021-05-27  7:50               ` Steven Price
2021-05-27  7:50               ` Steven Price
2021-05-27  7:50               ` Steven Price
2021-05-27 13:08               ` Catalin Marinas
2021-05-27 13:08                 ` Catalin Marinas
2021-05-27 13:08                 ` Catalin Marinas
2021-05-27 13:08                 ` Catalin Marinas
2021-05-17 12:32 ` [PATCH v12 8/8] KVM: arm64: Document MTE capability and ioctl Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 12:32   ` Steven Price
2021-05-17 18:09   ` Marc Zyngier
2021-05-17 18:09     ` Marc Zyngier
2021-05-17 18:09     ` Marc Zyngier
2021-05-17 18:09     ` Marc Zyngier
2021-05-19 14:09     ` Steven Price
2021-05-19 14:09       ` Steven Price
2021-05-19 14:09       ` Steven Price
2021-05-19 14:09       ` Steven Price
2021-05-20 10:24       ` Marc Zyngier
2021-05-20 10:24         ` Marc Zyngier
2021-05-20 10:24         ` Marc Zyngier
2021-05-20 10:24         ` Marc Zyngier
2021-05-20 10:52         ` Steven Price
2021-05-20 10:52           ` Steven Price
2021-05-20 10:52           ` Steven Price
2021-05-20 10:52           ` Steven Price

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