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From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
Subject: Re: [PATCH 05/15] drm/i915/guc/slpc: Allocate, initialize and release SLPC
Date: Tue, 27 Jul 2021 16:03:39 +0200	[thread overview]
Message-ID: <34c13b10-994b-7fe2-650f-3bdfd5b6c294@intel.com> (raw)
In-Reply-To: <20210726190800.26762-6-vinay.belgaumkar@intel.com>



On 26.07.2021 21:07, Vinay Belgaumkar wrote:
> Allocate data structures for SLPC and functions for
> initializing on host side.
> 
> v2: Address review comments (Michal W)
> v3: Remove unnecessary header includes (Michal W)
> 
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 11 ++++++
>  drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   | 36 ++++++++++++++++++-
>  .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h |  2 ++
>  3 files changed, 48 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 5b0f8c541b69..13d162353b1a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -336,6 +336,12 @@ int intel_guc_init(struct intel_guc *guc)
>  			goto err_ct;
>  	}
>  
> +	if (intel_guc_slpc_is_used(guc)) {
> +		ret = intel_guc_slpc_init(&guc->slpc);
> +		if (ret)
> +			goto err_submission;
> +	}
> +
>  	/* now that everything is perma-pinned, initialize the parameters */
>  	guc_init_params(guc);
>  
> @@ -346,6 +352,8 @@ int intel_guc_init(struct intel_guc *guc)
>  
>  	return 0;
>  
> +err_submission:
> +	intel_guc_submission_fini(guc);
>  err_ct:
>  	intel_guc_ct_fini(&guc->ct);
>  err_ads:
> @@ -368,6 +376,9 @@ void intel_guc_fini(struct intel_guc *guc)
>  
>  	i915_ggtt_disable_guc(gt->ggtt);
>  
> +	if (intel_guc_slpc_is_used(guc))
> +		intel_guc_slpc_fini(&guc->slpc);
> +
>  	if (intel_guc_submission_is_used(guc))
>  		intel_guc_submission_fini(guc);
>  
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 7275100ef8f8..bae4e33db0f8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -12,6 +12,16 @@ static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)
>  	return container_of(slpc, struct intel_guc, slpc);
>  }
>  
> +static inline struct intel_gt *slpc_to_gt(struct intel_guc_slpc *slpc)
> +{
> +	return guc_to_gt(slpc_to_guc(slpc));
> +}
> +
> +static inline struct drm_i915_private *slpc_to_i915(struct intel_guc_slpc *slpc)
> +{
> +	return slpc_to_gt(slpc)->i915;
> +}
> +
>  static bool __detect_slpc_supported(struct intel_guc *guc)
>  {
>  	/* GuC SLPC is unavailable for pre-Gen12 */
> @@ -35,11 +45,35 @@ void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc)
>  	guc->slpc_selected = __guc_slpc_selected(guc);
>  }
>  
> +static int slpc_shared_data_init(struct intel_guc_slpc *slpc)
> +{
> +	struct intel_guc *guc = slpc_to_guc(slpc);
> +	struct drm_i915_private *i915 = slpc_to_i915(slpc);
> +	u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
> +	int err;
> +
> +	err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, (void **)&slpc->vaddr);
> +	if (unlikely(err)) {
> +		drm_err(&i915->drm,
> +			"Failed to allocate SLPC struct (err=%pe)\n",
> +			ERR_PTR(err));
> +		return err;
> +	}
> +
> +	return err;
> +}
> +
>  int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
>  {
> -	return 0;
> +	GEM_BUG_ON(slpc->vma);
> +
> +	return slpc_shared_data_init(slpc);
>  }
>  
>  void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
>  {
> +	if (!slpc->vma)
> +		return;
> +
> +	i915_vma_unpin_and_release(&slpc->vma, I915_VMA_RELEASE_MAP);
>  }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
> index bfe4a7f9ce15..edcf4c05bd9f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
> @@ -7,6 +7,8 @@
>  #define _INTEL_GUC_SLPC_TYPES_H_
>  
>  struct intel_guc_slpc {
> +	struct i915_vma *vma;
> +	struct slpc_shared_data *vaddr;
>  };
>  
>  #endif
> 

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

WARNING: multiple messages have this Message-ID (diff)
From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 05/15] drm/i915/guc/slpc: Allocate, initialize and release SLPC
Date: Tue, 27 Jul 2021 16:03:39 +0200	[thread overview]
Message-ID: <34c13b10-994b-7fe2-650f-3bdfd5b6c294@intel.com> (raw)
In-Reply-To: <20210726190800.26762-6-vinay.belgaumkar@intel.com>



On 26.07.2021 21:07, Vinay Belgaumkar wrote:
> Allocate data structures for SLPC and functions for
> initializing on host side.
> 
> v2: Address review comments (Michal W)
> v3: Remove unnecessary header includes (Michal W)
> 
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_guc.c        | 11 ++++++
>  drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c   | 36 ++++++++++++++++++-
>  .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h |  2 ++
>  3 files changed, 48 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 5b0f8c541b69..13d162353b1a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -336,6 +336,12 @@ int intel_guc_init(struct intel_guc *guc)
>  			goto err_ct;
>  	}
>  
> +	if (intel_guc_slpc_is_used(guc)) {
> +		ret = intel_guc_slpc_init(&guc->slpc);
> +		if (ret)
> +			goto err_submission;
> +	}
> +
>  	/* now that everything is perma-pinned, initialize the parameters */
>  	guc_init_params(guc);
>  
> @@ -346,6 +352,8 @@ int intel_guc_init(struct intel_guc *guc)
>  
>  	return 0;
>  
> +err_submission:
> +	intel_guc_submission_fini(guc);
>  err_ct:
>  	intel_guc_ct_fini(&guc->ct);
>  err_ads:
> @@ -368,6 +376,9 @@ void intel_guc_fini(struct intel_guc *guc)
>  
>  	i915_ggtt_disable_guc(gt->ggtt);
>  
> +	if (intel_guc_slpc_is_used(guc))
> +		intel_guc_slpc_fini(&guc->slpc);
> +
>  	if (intel_guc_submission_is_used(guc))
>  		intel_guc_submission_fini(guc);
>  
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 7275100ef8f8..bae4e33db0f8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -12,6 +12,16 @@ static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)
>  	return container_of(slpc, struct intel_guc, slpc);
>  }
>  
> +static inline struct intel_gt *slpc_to_gt(struct intel_guc_slpc *slpc)
> +{
> +	return guc_to_gt(slpc_to_guc(slpc));
> +}
> +
> +static inline struct drm_i915_private *slpc_to_i915(struct intel_guc_slpc *slpc)
> +{
> +	return slpc_to_gt(slpc)->i915;
> +}
> +
>  static bool __detect_slpc_supported(struct intel_guc *guc)
>  {
>  	/* GuC SLPC is unavailable for pre-Gen12 */
> @@ -35,11 +45,35 @@ void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc)
>  	guc->slpc_selected = __guc_slpc_selected(guc);
>  }
>  
> +static int slpc_shared_data_init(struct intel_guc_slpc *slpc)
> +{
> +	struct intel_guc *guc = slpc_to_guc(slpc);
> +	struct drm_i915_private *i915 = slpc_to_i915(slpc);
> +	u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
> +	int err;
> +
> +	err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, (void **)&slpc->vaddr);
> +	if (unlikely(err)) {
> +		drm_err(&i915->drm,
> +			"Failed to allocate SLPC struct (err=%pe)\n",
> +			ERR_PTR(err));
> +		return err;
> +	}
> +
> +	return err;
> +}
> +
>  int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
>  {
> -	return 0;
> +	GEM_BUG_ON(slpc->vma);
> +
> +	return slpc_shared_data_init(slpc);
>  }
>  
>  void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
>  {
> +	if (!slpc->vma)
> +		return;
> +
> +	i915_vma_unpin_and_release(&slpc->vma, I915_VMA_RELEASE_MAP);
>  }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
> index bfe4a7f9ce15..edcf4c05bd9f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
> @@ -7,6 +7,8 @@
>  #define _INTEL_GUC_SLPC_TYPES_H_
>  
>  struct intel_guc_slpc {
> +	struct i915_vma *vma;
> +	struct slpc_shared_data *vaddr;
>  };
>  
>  #endif
> 

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-07-27 14:03 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-26 19:07 [PATCH v3 00/15] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-26 19:07 ` [Intel-gfx] " Vinay Belgaumkar
2021-07-26 19:07 ` [PATCH 01/15] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-26 19:07 ` [PATCH 02/15] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 13:43   ` Michal Wajdeczko
2021-07-27 13:43     ` [Intel-gfx] " Michal Wajdeczko
2021-07-27 18:47     ` Belgaumkar, Vinay
2021-07-27 18:47       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 03/15] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 22:44   ` Matthew Brost
2021-07-27 22:44     ` [Intel-gfx] " Matthew Brost
2021-07-27 22:48     ` Belgaumkar, Vinay
2021-07-27 22:48       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-27 22:50       ` Matthew Brost
2021-07-27 22:50         ` [Intel-gfx] " Matthew Brost
2021-07-26 19:07 ` [PATCH 04/15] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 13:59   ` Michal Wajdeczko
2021-07-27 13:59     ` [Intel-gfx] " Michal Wajdeczko
2021-07-27 19:03     ` Belgaumkar, Vinay
2021-07-27 19:03       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 05/15] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 14:03   ` Michal Wajdeczko [this message]
2021-07-27 14:03     ` Michal Wajdeczko
2021-07-26 19:07 ` [PATCH 06/15] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:12   ` Michal Wajdeczko
2021-07-27 15:12     ` Michal Wajdeczko
2021-07-27 20:00     ` Belgaumkar, Vinay
2021-07-27 20:00       ` Belgaumkar, Vinay
2021-07-27 20:19       ` Michal Wajdeczko
2021-07-27 20:19         ` Michal Wajdeczko
2021-07-27 20:52         ` Belgaumkar, Vinay
2021-07-27 20:52           ` Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 07/15] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-28  0:20   ` Matthew Brost
2021-07-28  0:20     ` [Intel-gfx] " Matthew Brost
2021-07-28  1:01     ` Belgaumkar, Vinay
2021-07-28  1:01       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-28  1:06       ` Matthew Brost
2021-07-28  1:06         ` [Intel-gfx] " Matthew Brost
2021-07-26 19:07 ` [PATCH 08/15] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:24   ` Michal Wajdeczko
2021-07-27 15:24     ` Michal Wajdeczko
2021-07-27 22:35     ` Belgaumkar, Vinay
2021-07-27 22:35       ` Belgaumkar, Vinay
2021-07-28  4:03     ` Belgaumkar, Vinay
2021-07-28  4:03       ` Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 09/15] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:32   ` Michal Wajdeczko
2021-07-27 15:32     ` Michal Wajdeczko
2021-07-27 23:10     ` Belgaumkar, Vinay
2021-07-27 23:10       ` Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 10/15] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:37   ` Michal Wajdeczko
2021-07-27 15:37     ` [Intel-gfx] " Michal Wajdeczko
2021-07-28  0:10     ` Belgaumkar, Vinay
2021-07-28  0:10       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 11/15] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:40   ` Matthew Brost
2021-07-27 15:40     ` [Intel-gfx] " Matthew Brost
2021-07-28  0:15     ` Belgaumkar, Vinay
2021-07-28  0:15       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 12/15] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 16:00   ` Michal Wajdeczko
2021-07-27 16:00     ` [Intel-gfx] " Michal Wajdeczko
2021-07-28  1:27     ` Belgaumkar, Vinay
2021-07-28  1:27       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 13/15] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 16:59   ` Michal Wajdeczko
2021-07-27 16:59     ` [Intel-gfx] " Michal Wajdeczko
2021-07-28 15:29     ` Belgaumkar, Vinay
2021-07-28 15:29       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 14/15] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 19:16   ` Matthew Brost
2021-07-27 19:16     ` [Intel-gfx] " Matthew Brost
2021-07-27 22:25     ` Belgaumkar, Vinay
2021-07-27 22:25       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:08 ` [PATCH 15/15] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-26 19:08   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:37   ` Matt Roper
2021-07-27 15:37     ` [Intel-gfx] " Matt Roper
2021-07-27 16:18     ` Belgaumkar, Vinay
2021-07-27 16:18       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-27 19:49       ` Matt Roper
2021-07-27 19:49         ` [Intel-gfx] " Matt Roper
2021-07-26 19:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features Patchwork
2021-07-26 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-26 19:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-26 23:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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