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From: sathyanarayanan.kuppuswamy@linux.intel.com
To: gnurou@gmail.com, linus.walleij@linaro.org, edubezval@gmail.com,
	dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org,
	andy@infradead.org, hdegoede@redhat.com
Cc: linux-gpio@vger.kernel.org, platform-driver-x86@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	sathyaosid@gmail.com,
	Kuppuswamy Sathyanarayanan
	<sathyanarayanan.kuppuswamy@linux.intel.com>
Subject: [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device
Date: Mon, 10 Apr 2017 11:52:26 -0700	[thread overview]
Message-ID: <50fd2e28a661a0b62f7d270a511a354d56d19bda.1491848776.git.sathyanarayanan.kuppuswamy@linux.intel.com> (raw)
In-Reply-To: <b8e952de94ed1902b922224de11f0814371b08b0.1491848776.git.sathyanarayanan.kuppuswamy@linux.intel.com>

From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

Currently all PMIC GPIO domain irqs are consumed by the same
device(bxt_wcove_gpio), so there is no need to export them as
separate interrupts. We can just export only the first level
GPIO irq(BXTWC_GPIO_LVL1_IRQ) as an irq resource and let the
GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain
irqs based on status value of GPIO level2 interrupt status
register. Also, just using only the first level irq will eliminate
the bug involved in requesting only the second level irq and not
explicitly enable the first level irq. For more info on this
issue please read the details at,

https://lkml.org/lkml/2017/2/27/148

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
 drivers/mfd/intel_soc_pmic_bxtwc.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c
index c08d514..dc8af1d 100644
--- a/drivers/mfd/intel_soc_pmic_bxtwc.c
+++ b/drivers/mfd/intel_soc_pmic_bxtwc.c
@@ -88,8 +88,6 @@ enum bxtwc_irqs_level2 {
 	BXTWC_USBC_IRQ,
 	BXTWC_CHGR0_IRQ,
 	BXTWC_CHGR1_IRQ,
-	BXTWC_GPIO0_IRQ,
-	BXTWC_GPIO1_IRQ,
 	BXTWC_CRIT_IRQ,
 };
 
@@ -115,8 +113,6 @@ static const struct regmap_irq bxtwc_regmap_irqs_level2[] = {
 	REGMAP_IRQ_REG(BXTWC_USBC_IRQ, 2, BIT(5)),
 	REGMAP_IRQ_REG(BXTWC_CHGR0_IRQ, 2, 0x1f),
 	REGMAP_IRQ_REG(BXTWC_CHGR1_IRQ, 3, 0x1f),
-	REGMAP_IRQ_REG(BXTWC_GPIO0_IRQ, 4, 0xff),
-	REGMAP_IRQ_REG(BXTWC_GPIO1_IRQ, 5, 0x3f),
 	REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 6, 0x03),
 };
 
@@ -152,8 +148,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = {
 };
 
 static struct resource gpio_resources[] = {
-	DEFINE_RES_IRQ_NAMED(BXTWC_GPIO0_IRQ, "GPIO0"),
-	DEFINE_RES_IRQ_NAMED(BXTWC_GPIO1_IRQ, "GPIO1"),
+	DEFINE_RES_IRQ_NAMED(BXTWC_GPIO_LVL1_IRQ, "GPIO"),
 };
 
 static struct resource adc_resources[] = {
-- 
2.7.4

  parent reply	other threads:[~2017-04-10 18:52 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-10 18:52 [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index sathyanarayanan.kuppuswamy
2017-04-10 18:52 ` sathyanarayanan.kuppuswamy
2017-04-10 18:52 ` [PATCH v1 2/7] mfd: intel_soc_pmic_bxtwc: remove thermal second level irqs sathyanarayanan.kuppuswamy
2017-04-10 18:52   ` sathyanarayanan.kuppuswamy
2017-04-12 11:45   ` Lee Jones
2017-04-10 18:52 ` [PATCH v1 3/7] thermal: intel_bxt_pmic_thermal: use first level PMIC thermal irq sathyanarayanan.kuppuswamy
2017-04-10 18:52   ` sathyanarayanan.kuppuswamy
2017-04-10 18:52 ` sathyanarayanan.kuppuswamy [this message]
2017-04-10 18:52   ` [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: remove second level irq for gpio device sathyanarayanan.kuppuswamy
2017-04-12 11:46   ` Lee Jones
2017-04-10 18:52 ` [PATCH v1 5/7] gpio: gpio-wcove: use first level PMIC GPIO irq sathyanarayanan.kuppuswamy
2017-04-10 18:52   ` sathyanarayanan.kuppuswamy
2017-04-10 18:52 ` [PATCH v1 6/7] mfd: intel_soc_pmic_bxtwc: use chained irqs for second level irq chips sathyanarayanan.kuppuswamy
2017-04-10 18:52   ` sathyanarayanan.kuppuswamy
2017-04-12 11:53   ` Lee Jones
2017-04-13 21:45     ` sathyanarayanan kuppuswamy
2017-04-13 21:45       ` sathyanarayanan kuppuswamy
2017-04-10 18:52 ` [PATCH v1 7/7] platform: x86: intel_bxtwc_tmu: remove first level irq unmask sathyanarayanan.kuppuswamy
2017-04-10 18:52   ` sathyanarayanan.kuppuswamy
2017-04-12 10:45 ` [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index Lee Jones
2017-04-12 17:59   ` Sathyanarayanan Kuppuswamy Natarajan
2017-04-12 17:59     ` Sathyanarayanan Kuppuswamy Natarajan
2017-04-12 20:59     ` Lee Jones
2017-04-12 20:59       ` Lee Jones

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