* [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc
@ 2015-10-26 12:44 Anju T
2015-10-26 12:44 ` [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Anju T @ 2015-10-26 12:44 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: sukadev, maddy, jolsa, dsahern, acme, mpe, khandual, hemant,
naveen.n.rao
This short patch series add the ability to sample the interrupted
machine state for each hardware sample
Anju (3):
perf/powerpc:add ability to sample intr machine state in power
tools/perf:Map the ID values with register names
perf/powerpc:add support for sampling intr machine state
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++
arch/powerpc/perf/Makefile | 1 +
arch/powerpc/perf/perf_regs.c | 87 ++++++++++++++++++++
tools/perf/arch/powerpc/include/perf_regs.h | 118 ++++++++++++++++++++++++++++
tools/perf/config/Makefile | 5 ++
6 files changed, 267 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
create mode 100644 arch/powerpc/perf/perf_regs.c
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
--
2.1.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power
2015-10-26 12:44 [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
@ 2015-10-26 12:44 ` Anju T
2015-10-28 10:20 ` Madhavan Srinivasan
2015-10-26 12:44 ` [PATCH V2 2/3] tools/perf:Map the ID values with register names Anju T
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Anju T @ 2015-10-26 12:44 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: sukadev, maddy, jolsa, dsahern, acme, mpe, khandual, hemant,
naveen.n.rao
The enum definition assigns an 'id' to each register in "struct pt_regs"
of arch/powerpc.The order of these values in the enum definition are
based on the corresponding macros in
arch/powerpc/include/uapi/asm/ptrace.h .
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
new file mode 100644
index 0000000..b97727c
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -0,0 +1,55 @@
+#ifndef _ASM_POWERPC_PERF_REGS_H
+#define _ASM_POWERPC_PERF_REGS_H
+
+enum perf_event_powerpc_regs {
+ PERF_REG_POWERPC_GPR0,
+ PERF_REG_POWERPC_GPR1,
+ PERF_REG_POWERPC_GPR2,
+ PERF_REG_POWERPC_GPR3,
+ PERF_REG_POWERPC_GPR4,
+ PERF_REG_POWERPC_GPR5,
+ PERF_REG_POWERPC_GPR6,
+ PERF_REG_POWERPC_GPR7,
+ PERF_REG_POWERPC_GPR8,
+ PERF_REG_POWERPC_GPR9,
+ PERF_REG_POWERPC_GPR10,
+ PERF_REG_POWERPC_GPR11,
+ PERF_REG_POWERPC_GPR12,
+ PERF_REG_POWERPC_GPR13,
+ PERF_REG_POWERPC_GPR14,
+ PERF_REG_POWERPC_GPR15,
+ PERF_REG_POWERPC_GPR16,
+ PERF_REG_POWERPC_GPR17,
+ PERF_REG_POWERPC_GPR18,
+ PERF_REG_POWERPC_GPR19,
+ PERF_REG_POWERPC_GPR20,
+ PERF_REG_POWERPC_GPR21,
+ PERF_REG_POWERPC_GPR22,
+ PERF_REG_POWERPC_GPR23,
+ PERF_REG_POWERPC_GPR24,
+ PERF_REG_POWERPC_GPR25,
+ PERF_REG_POWERPC_GPR26,
+ PERF_REG_POWERPC_GPR27,
+ PERF_REG_POWERPC_GPR28,
+ PERF_REG_POWERPC_GPR29,
+ PERF_REG_POWERPC_GPR30,
+ PERF_REG_POWERPC_GPR31,
+ PERF_REG_POWERPC_NIP,
+ PERF_REG_POWERPC_MSR,
+ PERF_REG_POWERPC_ORIG_R3,
+ PERF_REG_POWERPC_CTR,
+ PERF_REG_POWERPC_LNK,
+ PERF_REG_POWERPC_XER,
+ PERF_REG_POWERPC_CCR,
+#ifdef __powerpc64__
+ PERF_REG_POWERPC_SOFTE,
+#else
+ PERF_REG_POWERPC_MQ,
+#endif
+ PERF_REG_POWERPC_TRAP,
+ PERF_REG_POWERPC_DAR,
+ PERF_REG_POWERPC_DSISR,
+ PERF_REG_POWERPC_RESULT,
+ PERF_REG_POWERPC_MAX,
+};
+#endif /* _ASM_POWERPC_PERF_REGS_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH V2 2/3] tools/perf:Map the ID values with register names
2015-10-26 12:44 [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-26 12:44 ` [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
@ 2015-10-26 12:44 ` Anju T
2015-10-26 12:44 ` [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state Anju T
2015-10-26 13:17 ` [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Denis Kirjanov
3 siblings, 0 replies; 9+ messages in thread
From: Anju T @ 2015-10-26 12:44 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: sukadev, maddy, jolsa, dsahern, acme, mpe, khandual, hemant,
naveen.n.rao
The id values are mapped with the corresponding register names.
This names are displayed while using a perf report/perf script command.
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
tools/perf/arch/powerpc/include/perf_regs.h | 118 ++++++++++++++++++++++++++++
1 file changed, 118 insertions(+)
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
new file mode 100644
index 0000000..621aa94
--- /dev/null
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -0,0 +1,118 @@
+#ifndef ARCH_PERF_REGS_H
+#define ARCH_PERF_REGS_H
+
+#include <stdlib.h>
+#include <linux/types.h>
+#include <asm/perf_regs.h>
+
+void perf_regs_load(u64 *regs);
+
+#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
+#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
+#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
+
+#define PERF_REG_IP PERF_REG_POWERPC_NIP
+#define PERF_REG_SP PERF_REG_POWERPC_R1
+
+static inline const char *perf_reg_name(int id)
+{
+ switch (id) {
+ case PERF_REG_POWERPC_GPR0:
+ return "gpr0";
+ case PERF_REG_POWERPC_GPR1:
+ return "gpr1";
+ case PERF_REG_POWERPC_GPR2:
+ return "gpr2";
+ case PERF_REG_POWERPC_GPR3:
+ return "gpr3";
+ case PERF_REG_POWERPC_GPR4:
+ return "gpr4";
+ case PERF_REG_POWERPC_GPR5:
+ return "gpr5";
+ case PERF_REG_POWERPC_GPR6:
+ return "gpr6";
+ case PERF_REG_POWERPC_GPR7:
+ return "gpr7";
+ case PERF_REG_POWERPC_GPR8:
+ return "gpr8";
+ case PERF_REG_POWERPC_GPR9:
+ return "gpr9";
+ case PERF_REG_POWERPC_GPR10:
+ return "gpr10";
+ case PERF_REG_POWERPC_GPR11:
+ return "gpr11";
+ case PERF_REG_POWERPC_GPR12:
+ return "gpr12";
+ case PERF_REG_POWERPC_GPR13:
+ return "gpr13";
+ case PERF_REG_POWERPC_GPR14:
+ return "gpr14";
+ case PERF_REG_POWERPC_GPR15:
+ return "gpr15";
+ case PERF_REG_POWERPC_GPR16:
+ return "gpr16";
+ case PERF_REG_POWERPC_GPR17:
+ return "gpr17";
+ case PERF_REG_POWERPC_GPR18:
+ return "gpr18";
+ case PERF_REG_POWERPC_GPR19:
+ return "gpr19";
+ case PERF_REG_POWERPC_GPR20:
+ return "gpr20";
+ case PERF_REG_POWERPC_GPR21:
+ return "gpr21";
+ case PERF_REG_POWERPC_GPR22:
+ return "gpr22";
+ case PERF_REG_POWERPC_GPR23:
+ return "gpr23";
+ case PERF_REG_POWERPC_GPR24:
+ return "gpr24";
+ case PERF_REG_POWERPC_GPR25:
+ return "gpr25";
+ case PERF_REG_POWERPC_GPR26:
+ return "gpr26";
+ case PERF_REG_POWERPC_GPR27:
+ return "gpr27";
+ case PERF_REG_POWERPC_GPR28:
+ return "gpr28";
+ case PERF_REG_POWERPC_GPR29:
+ return "gpr29";
+ case PERF_REG_POWERPC_GPR30:
+ return "gpr30";
+ case PERF_REG_POWERPC_GPR31:
+ return "gpr31";
+ case PERF_REG_POWERPC_NIP:
+ return "nip";
+ case PERF_REG_POWERPC_MSR:
+ return "msr";
+ case PERF_REG_POWERPC_ORIG_R3:
+ return "orig_r3";
+ case PERF_REG_POWERPC_CTR:
+ return "ctr";
+ case PERF_REG_POWERPC_LNK:
+ return "link";
+ case PERF_REG_POWERPC_XER:
+ return "xer";
+ case PERF_REG_POWERPC_CCR:
+ return "ccr";
+#ifdef __powerpc64__
+ case PERF_REG_POWERPC_SOFTE:
+ return "softe";
+#else
+ case PERF_REG_POWERPC_MQ:
+ return "mq";
+#endif
+ case PERF_REG_POWERPC_TRAP:
+ return "trap";
+ case PERF_REG_POWERPC_DAR:
+ return "dar";
+ case PERF_REG_POWERPC_DSISR:
+ return "dsisr";
+ case PERF_REG_POWERPC_RESULT:
+ return "result";
+ default:
+ return NULL;
+ }
+ return NULL;
+}
+#endif /*ARCH_PERF_REGS_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state
2015-10-26 12:44 [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-26 12:44 ` [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
2015-10-26 12:44 ` [PATCH V2 2/3] tools/perf:Map the ID values with register names Anju T
@ 2015-10-26 12:44 ` Anju T
2015-10-30 7:34 ` Madhavan Srinivasan
2015-10-26 13:17 ` [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Denis Kirjanov
3 siblings, 1 reply; 9+ messages in thread
From: Anju T @ 2015-10-26 12:44 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
Cc: sukadev, maddy, jolsa, dsahern, acme, mpe, khandual, hemant,
naveen.n.rao
The registers to sample are passed through the sample_regs_intr bitmask.
The name and bit position for each register is defined in asm/perf_regs.h.
This feature can be enabled by using -I option with perf record command.
To display the sampled register values use perf script -D.
The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'.
CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state.
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/perf/Makefile | 1 +
arch/powerpc/perf/perf_regs.c | 87 +++++++++++++++++++++++++++++++++++++++++++
tools/perf/config/Makefile | 5 +++
4 files changed, 94 insertions(+)
create mode 100644 arch/powerpc/perf/perf_regs.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5ef2711..768d700 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -116,6 +116,7 @@ config PPC
select GENERIC_ATOMIC64 if PPC32
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select HAVE_PERF_EVENTS
+ select HAVE_PERF_REGS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
select ARCH_WANT_IPC_PARSE_VERSION
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index f9c083a..0d53815 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o
+obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
obj-$(CONFIG_PPC64) += $(obj64-y)
obj-$(CONFIG_PPC32) += $(obj32-y)
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
new file mode 100644
index 0000000..2474dc4
--- /dev/null
+++ b/arch/powerpc/perf/perf_regs.c
@@ -0,0 +1,87 @@
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/bug.h>
+#include <linux/stddef.h>
+#include <asm/ptrace.h>
+#include <asm/perf_regs.h>
+
+#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
+
+#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
+
+static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
+#ifdef __powerpc64__
+ PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
+#else
+ PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq),
+#endif
+ PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result),
+};
+u64 perf_reg_value(struct pt_regs *regs, int idx)
+{
+ if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
+ return 0;
+ return regs_get_register(regs, pt_regs_offset[idx]);
+}
+int perf_reg_validate(u64 mask)
+{
+ if (!mask || mask & REG_RESERVED)
+ return -EINVAL;
+ return 0;
+}
+u64 perf_reg_abi(struct task_struct *task)
+{
+ return PERF_SAMPLE_REGS_ABI_64;
+}
+void perf_get_regs_user(struct perf_regs *regs_user,
+ struct pt_regs *regs,
+ struct pt_regs *regs_user_copy)
+{
+ return;
+ /*TODO :Update this function when
+ PERF_SAMPLE_REGS_USER is enabled */
+}
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 094ddae..64e5af3 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -23,6 +23,11 @@ $(call detected_var,ARCH)
NO_PERF_REGS := 1
+#Additional ARCH settings for ppc64
+ifeq ($(ARCH),powerpc)
+ NO_PERF_REGS := 0
+endif
+
# Additional ARCH settings for x86
ifeq ($(ARCH),x86)
$(call detected,CONFIG_X86)
--
2.1.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc
2015-10-26 12:44 [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
` (2 preceding siblings ...)
2015-10-26 12:44 ` [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state Anju T
@ 2015-10-26 13:17 ` Denis Kirjanov
2015-10-27 18:52 ` Anju T
2015-10-28 5:33 ` Anju T
3 siblings, 2 replies; 9+ messages in thread
From: Denis Kirjanov @ 2015-10-26 13:17 UTC (permalink / raw)
To: Anju T
Cc: linuxppc-dev, linux-kernel, maddy, acme, hemant, dsahern,
naveen.n.rao, sukadev, jolsa, khandual
On 10/26/15, Anju T <anju@linux.vnet.ibm.com> wrote:
> This short patch series add the ability to sample the interrupted
> machine state for each hardware sample
Hi,
how can we check your patch series without testing details?
>
> Anju (3):
> perf/powerpc:add ability to sample intr machine state in power
> tools/perf:Map the ID values with register names
> perf/powerpc:add support for sampling intr machine state
>
>
> arch/powerpc/Kconfig | 1 +
> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++
> arch/powerpc/perf/Makefile | 1 +
> arch/powerpc/perf/perf_regs.c | 87 ++++++++++++++++++++
> tools/perf/arch/powerpc/include/perf_regs.h | 118
> ++++++++++++++++++++++++++++
> tools/perf/config/Makefile | 5 ++
> 6 files changed, 267 insertions(+)
> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
> create mode 100644 arch/powerpc/perf/perf_regs.c
> create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
>
> --
> 2.1.0
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc
2015-10-26 13:17 ` [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Denis Kirjanov
@ 2015-10-27 18:52 ` Anju T
2015-10-28 5:33 ` Anju T
1 sibling, 0 replies; 9+ messages in thread
From: Anju T @ 2015-10-27 18:52 UTC (permalink / raw)
To: Denis Kirjanov
Cc: linuxppc-dev, linux-kernel, maddy, acme, hemant, dsahern,
naveen.n.rao, sukadev, jolsa, khandual, mpe, anju
[-- Attachment #1: Type: text/plain, Size: 3102 bytes --]
Hi Denis,
On Monday 26 October 2015 06:47 PM, Denis Kirjanov wrote:
> On 10/26/15, Anju T <anju@linux.vnet.ibm.com> wrote:
>> This short patch series add the ability to sample the interrupted
>> machine state for each hardware sample
> Hi,
> how can we check your patch series without testing details?
I have mentioned about the commands to test this feature in the 3rd
patch of this series,but not detailed.
To test this patch,
Eg:
$perf record -I ls // record machine state at interrupt
$perf script -D //read the perf.data file
Sample output obtained for this patch / output looks like as follows:
179614739048 0xb90 [0x190]: PERF_RECORD_SAMPLE(IP, 0x1): 4130/4130:
0xc0000000001dde88 period: 1 addr: 0
... intr regs: mask 0xfffffffffff ABI 64-bit
.... gpr0 0xc0000000001e6974
.... gpr1 0xc000001e48ad79a0
.... gpr2 0xc000000001523400
.... gpr3 0x1
.... gpr4 0xc000000fd7c76600
.... gpr5 0x29d1df51d8
.... gpr6 0x1e000000
.... gpr7 0x0
.... gpr8 0x0
.... gpr9 0x0
.... gpr10 0x1
.... gpr11 0x0
.... gpr12 0x24022822
.... gpr13 0xc00000000fee4c80
.... gpr14 0x0
.... gpr15 0xc0000000fcab3800
.... gpr16 0x0
.... gpr17 0xc000000ffa445000
.... gpr18 0xc000001e48ad78a0
.... gpr19 0xc000000001523400
.... gpr20 0xc0000000000a09bc
.... gpr21 0xc000001e3c11d100
.... gpr22 0xc0000000001e54a8
.... gpr23 0xc000000001523400
.... gpr24 0xc000001e48ad7850
.... gpr25 0xc000001e3c11d100
.... gpr26 0xc000001e48a71790
.... gpr27 0xfffffffffffffead
.... gpr28 0x0
.... gpr29 0xc000001e3c11d100
.... gpr30 0x1
.... gpr31 0x0
.... nip 0xc00000000000fe8c
.... msr 0x9000000000009032
.... orig_r3 0xc0000000001e6978
.... ctr 0xc00000000009e1f0
.... link 0xc0000000001e697c
.... xer 0x0
.... ccr 0x84022884
.... softe 0x1
.... trap 0xf01
.... dar 0x0
.... dsisr 0x300040060000004
.... result 0x0
... thread: :4130:4130
...... dso: /root/.debug/.build-id/82/8d2c7bac560dc9aac8bf6289f26504e22d6883
:4130 4130 179.614739: 1 cycles: c0000000001dde88 .perf_ctx_unlock
(/boot/vmlinux)
0xd20 [0x190]: event: 9
>> Anju (3):
>> perf/powerpc:add ability to sample intr machine state in power
>> tools/perf:Map the ID values with register names
>> perf/powerpc:add support for sampling intr machine state
>>
>>
>> arch/powerpc/Kconfig | 1 +
>> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++
>> arch/powerpc/perf/Makefile | 1 +
>> arch/powerpc/perf/perf_regs.c | 87 ++++++++++++++++++++
>> tools/perf/arch/powerpc/include/perf_regs.h | 118
>> ++++++++++++++++++++++++++++
>> tools/perf/config/Makefile | 5 ++
>> 6 files changed, 267 insertions(+)
>> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>> create mode 100644 arch/powerpc/perf/perf_regs.c
>> create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
>>
>> --
>> 2.1.0
>>
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@lists.ozlabs.org
>> https://lists.ozlabs.org/listinfo/linuxppc-dev
Thanks and regards
Anju
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc
2015-10-26 13:17 ` [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Denis Kirjanov
2015-10-27 18:52 ` Anju T
@ 2015-10-28 5:33 ` Anju T
1 sibling, 0 replies; 9+ messages in thread
From: Anju T @ 2015-10-28 5:33 UTC (permalink / raw)
To: Denis Kirjanov
Cc: linux-kernel, maddy, acme, hemant, dsahern, naveen.n.rao,
sukadev, jolsa, khandual, mpe, anju
Hi Denis,
On Monday 26 October 2015 06:47 PM, Denis Kirjanov wrote:
> On 10/26/15, Anju T <anju@linux.vnet.ibm.com> wrote:
>> This short patch series add the ability to sample the interrupted
>> machine state for each hardware sample
> Hi,
> how can we check your patch series without testing details?
I have mentioned about the commands to test this feature in the 3rd
patch of this series,but not detailed.
To test this patch,
Eg:
$perf record -I ls // record machine state at interrupt
$perf script -D //read the perf.data file
Sample output obtained for this patch / output looks like as follows:
179614739048 0xb90 [0x190]: PERF_RECORD_SAMPLE(IP, 0x1): 4130/4130:
0xc0000000001dde88 period: 1 addr: 0
... intr regs: mask 0xfffffffffff ABI 64-bit
.... gpr0 0xc0000000001e6974
.... gpr1 0xc000001e48ad79a0
.... gpr2 0xc000000001523400
.... gpr3 0x1
.... gpr4 0xc000000fd7c76600
.... gpr5 0x29d1df51d8
.... gpr6 0x1e000000
.... gpr7 0x0
.... gpr8 0x0
.... gpr9 0x0
.... gpr10 0x1
.... gpr11 0x0
.... gpr12 0x24022822
.... gpr13 0xc00000000fee4c80
.... gpr14 0x0
.... gpr15 0xc0000000fcab3800
.... gpr16 0x0
.... gpr17 0xc000000ffa445000
.... gpr18 0xc000001e48ad78a0
.... gpr19 0xc000000001523400
.... gpr20 0xc0000000000a09bc
.... gpr21 0xc000001e3c11d100
.... gpr22 0xc0000000001e54a8
.... gpr23 0xc000000001523400
.... gpr24 0xc000001e48ad7850
.... gpr25 0xc000001e3c11d100
.... gpr26 0xc000001e48a71790
.... gpr27 0xfffffffffffffead
.... gpr28 0x0
.... gpr29 0xc000001e3c11d100
.... gpr30 0x1
.... gpr31 0x0
.... nip 0xc00000000000fe8c
.... msr 0x9000000000009032
.... orig_r3 0xc0000000001e6978
.... ctr 0xc00000000009e1f0
.... link 0xc0000000001e697c
.... xer 0x0
.... ccr 0x84022884
.... softe 0x1
.... trap 0xf01
.... dar 0x0
.... dsisr 0x300040060000004
.... result 0x0
... thread: :4130:4130
...... dso: /root/.debug/.build-id/82/8d2c7bac560dc9aac8bf6289f26504e22d6883
:4130 4130 179.614739: 1 cycles: c0000000001dde88 .perf_ctx_unlock
(/boot/vmlinux)
0xd20 [0x190]: event: 9
>
>> Anju (3):
>> perf/powerpc:add ability to sample intr machine state in power
>> tools/perf:Map the ID values with register names
>> perf/powerpc:add support for sampling intr machine state
>>
>>
>> arch/powerpc/Kconfig | 1 +
>> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++
>> arch/powerpc/perf/Makefile | 1 +
>> arch/powerpc/perf/perf_regs.c | 87 ++++++++++++++++++++
>> tools/perf/arch/powerpc/include/perf_regs.h | 118
>> ++++++++++++++++++++++++++++
>> tools/perf/config/Makefile | 5 ++
>> 6 files changed, 267 insertions(+)
>> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>> create mode 100644 arch/powerpc/perf/perf_regs.c
>> create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
>>
>> --
>> 2.1.0
>>
>> _______________________________________________
>>
Thanks and regards
Anju
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power
2015-10-26 12:44 ` [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
@ 2015-10-28 10:20 ` Madhavan Srinivasan
0 siblings, 0 replies; 9+ messages in thread
From: Madhavan Srinivasan @ 2015-10-28 10:20 UTC (permalink / raw)
To: Anju T, linuxppc-dev, linux-kernel
Cc: acme, hemant, dsahern, naveen.n.rao, sukadev, jolsa, khandual
On Monday 26 October 2015 06:14 PM, Anju T wrote:
> The enum definition assigns an 'id' to each register in "struct pt_regs"
> of arch/powerpc.The order of these values in the enum definition are
> based on the corresponding macros in
> arch/powerpc/include/uapi/asm/ptrace.h .
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>
> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
> new file mode 100644
> index 0000000..b97727c
> --- /dev/null
> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
> @@ -0,0 +1,55 @@
> +#ifndef _ASM_POWERPC_PERF_REGS_H
> +#define _ASM_POWERPC_PERF_REGS_H
> +
> +enum perf_event_powerpc_regs {
> + PERF_REG_POWERPC_GPR0,
> + PERF_REG_POWERPC_GPR1,
> + PERF_REG_POWERPC_GPR2,
> + PERF_REG_POWERPC_GPR3,
> + PERF_REG_POWERPC_GPR4,
> + PERF_REG_POWERPC_GPR5,
> + PERF_REG_POWERPC_GPR6,
> + PERF_REG_POWERPC_GPR7,
> + PERF_REG_POWERPC_GPR8,
> + PERF_REG_POWERPC_GPR9,
> + PERF_REG_POWERPC_GPR10,
> + PERF_REG_POWERPC_GPR11,
> + PERF_REG_POWERPC_GPR12,
> + PERF_REG_POWERPC_GPR13,
> + PERF_REG_POWERPC_GPR14,
> + PERF_REG_POWERPC_GPR15,
> + PERF_REG_POWERPC_GPR16,
> + PERF_REG_POWERPC_GPR17,
> + PERF_REG_POWERPC_GPR18,
> + PERF_REG_POWERPC_GPR19,
> + PERF_REG_POWERPC_GPR20,
> + PERF_REG_POWERPC_GPR21,
> + PERF_REG_POWERPC_GPR22,
> + PERF_REG_POWERPC_GPR23,
> + PERF_REG_POWERPC_GPR24,
> + PERF_REG_POWERPC_GPR25,
> + PERF_REG_POWERPC_GPR26,
> + PERF_REG_POWERPC_GPR27,
> + PERF_REG_POWERPC_GPR28,
> + PERF_REG_POWERPC_GPR29,
> + PERF_REG_POWERPC_GPR30,
> + PERF_REG_POWERPC_GPR31,
> + PERF_REG_POWERPC_NIP,
> + PERF_REG_POWERPC_MSR,
> + PERF_REG_POWERPC_ORIG_R3,
> + PERF_REG_POWERPC_CTR,
> + PERF_REG_POWERPC_LNK,
> + PERF_REG_POWERPC_XER,
> + PERF_REG_POWERPC_CCR,
> +#ifdef __powerpc64__
> + PERF_REG_POWERPC_SOFTE,
> +#else
> + PERF_REG_POWERPC_MQ,
> +#endif
> + PERF_REG_POWERPC_TRAP,
> + PERF_REG_POWERPC_DAR,
> + PERF_REG_POWERPC_DSISR,
> + PERF_REG_POWERPC_RESULT,
IIUC, We dont need "result". "PERF_REG_POWERPC_RESULT" will
always be zero, because of regs_get_register (asm/ptrace.h),
that you call in patch 3 of this patchset, will check for MAX_REG_OFFSET
and return 0 for "result".
Maddy
> + PERF_REG_POWERPC_MAX,
> +};
> +#endif /* _ASM_POWERPC_PERF_REGS_H */
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state
2015-10-26 12:44 ` [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state Anju T
@ 2015-10-30 7:34 ` Madhavan Srinivasan
0 siblings, 0 replies; 9+ messages in thread
From: Madhavan Srinivasan @ 2015-10-30 7:34 UTC (permalink / raw)
To: Anju T, linuxppc-dev, linux-kernel
Cc: acme, hemant, dsahern, naveen.n.rao, sukadev, jolsa, khandual
On Monday 26 October 2015 06:14 PM, Anju T wrote:
> The registers to sample are passed through the sample_regs_intr bitmask.
> The name and bit position for each register is defined in asm/perf_regs.h.
> This feature can be enabled by using -I option with perf record command.
> To display the sampled register values use perf script -D.
> The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'.
> CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
> arch/powerpc/Kconfig | 1 +
> arch/powerpc/perf/Makefile | 1 +
> arch/powerpc/perf/perf_regs.c | 87 +++++++++++++++++++++++++++++++++++++++++++
> tools/perf/config/Makefile | 5 +++
> 4 files changed, 94 insertions(+)
> create mode 100644 arch/powerpc/perf/perf_regs.c
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 5ef2711..768d700 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -116,6 +116,7 @@ config PPC
> select GENERIC_ATOMIC64 if PPC32
> select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
> select HAVE_PERF_EVENTS
> + select HAVE_PERF_REGS
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
> select ARCH_WANT_IPC_PARSE_VERSION
> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
> index f9c083a..0d53815 100644
> --- a/arch/powerpc/perf/Makefile
> +++ b/arch/powerpc/perf/Makefile
> @@ -12,6 +12,7 @@ obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
> obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
>
> obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o
> +obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
>
> obj-$(CONFIG_PPC64) += $(obj64-y)
> obj-$(CONFIG_PPC32) += $(obj32-y)
> diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
> new file mode 100644
> index 0000000..2474dc4
> --- /dev/null
> +++ b/arch/powerpc/perf/perf_regs.c
> @@ -0,0 +1,87 @@
> +#include <linux/errno.h>
> +#include <linux/kernel.h>
> +#include <linux/sched.h>
> +#include <linux/perf_event.h>
> +#include <linux/bug.h>
> +#include <linux/stddef.h>
> +#include <asm/ptrace.h>
> +#include <asm/perf_regs.h>
> +
> +#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
> +
> +#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
> +
> +static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
> +#ifdef __powerpc64__
> + PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
> +#else
> + PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq),
> +#endif
> + PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result),
> +};
> +u64 perf_reg_value(struct pt_regs *regs, int idx)
> +{
> + if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
> + return 0;
> + return regs_get_register(regs, pt_regs_offset[idx]);
> +}
> +int perf_reg_validate(u64 mask)
> +{
> + if (!mask || mask & REG_RESERVED)
> + return -EINVAL;
> + return 0;
> +}
> +u64 perf_reg_abi(struct task_struct *task)
> +{
> + return PERF_SAMPLE_REGS_ABI_64;
> +}
> +void perf_get_regs_user(struct perf_regs *regs_user,
> + struct pt_regs *regs,
> + struct pt_regs *regs_user_copy)
> +{
> + return;
> + /*TODO :Update this function when
> + PERF_SAMPLE_REGS_USER is enabled */
> +}
> diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
> index 094ddae..64e5af3 100644
> --- a/tools/perf/config/Makefile
> +++ b/tools/perf/config/Makefile
This should be part of the second patch (tools/perf).
and kindly re-arrange the patch series to have the tools/perf
patch (currently patch 2 in this patchset) as the last patch to avoid
any compile time issues.
Maddy.
> @@ -23,6 +23,11 @@ $(call detected_var,ARCH)
>
> NO_PERF_REGS := 1
>
> +#Additional ARCH settings for ppc64
> +ifeq ($(ARCH),powerpc)
> + NO_PERF_REGS := 0
> +endif
> +
> # Additional ARCH settings for x86
> ifeq ($(ARCH),x86)
> $(call detected,CONFIG_X86)
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2015-10-30 7:46 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-10-26 12:44 [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-26 12:44 ` [PATCH V2 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
2015-10-28 10:20 ` Madhavan Srinivasan
2015-10-26 12:44 ` [PATCH V2 2/3] tools/perf:Map the ID values with register names Anju T
2015-10-26 12:44 ` [PATCH V2 3/3] perf/powerpc :add support for sampling intr machine state Anju T
2015-10-30 7:34 ` Madhavan Srinivasan
2015-10-26 13:17 ` [PATCH V2 0/3] perf/powerpc:Add ability to sample intr machine state in powerpc Denis Kirjanov
2015-10-27 18:52 ` Anju T
2015-10-28 5:33 ` Anju T
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