* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
@ 2015-12-19 4:16 Bryan Hundven
2015-12-23 15:40 ` Bryan Hundven
0 siblings, 1 reply; 10+ messages in thread
From: Bryan Hundven @ 2015-12-19 4:16 UTC (permalink / raw)
To: u-boot
As I work to re-add p1_p2_rdb, CONFIG_P2020RDB conflicts with
p1_p2_rdb's CONFIG_P2020RDB.
Rename p1_p2_rdb_pc's CONFIG_P2020RDB to CONFIG_P2020RDB_PC.
Signed-off-by: Bryan Hundven <bryanhundven@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: York Sun <yorksun@freescale.com>
---
board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +-
configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +-
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +-
configs/P2020RDB-PC_36BIT_defconfig | 2 +-
configs/P2020RDB-PC_NAND_defconfig | 2 +-
configs/P2020RDB-PC_SDCARD_defconfig | 2 +-
configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +-
configs/P2020RDB-PC_defconfig | 2 +-
include/configs/p1_p2_rdb_pc.h | 8 ++++----
10 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 946d503..ef59b58 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -49,7 +49,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 7800000,
.tfaw_ps = 37500,
};
-#elif defined(CONFIG_P2020RDB)
+#elif defined(CONFIG_P2020RDB_PC)
/* Micron MT41J128M16_15E */
dimm_params_t ddr_raw_timing = {
.n_ranks = 1,
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 578bfc5..c7bb971 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 19c795a..c79399e 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index bdc5e43..898993f 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index b9d4a47..16af720 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -1,7 +1,7 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index ea9f830..19ec9d2 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
CONFIG_TPL=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,NAND"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 997887d..ee0fd33 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SDCARD"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index e547ea4..40190c4 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SPIFLASH"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index fdad880..6629285 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -1,7 +1,7 @@
CONFIG_PPC=y
CONFIG_MPC85xx=y
CONFIG_TARGET_P1_P2_RDB_PC=y
-CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
+CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC"
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_NETDEVICES=y
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 60bedaa..e64805a 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -154,7 +154,7 @@
#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
-#if defined(CONFIG_P2020RDB)
+#if defined(CONFIG_P2020RDB_PC)
#define CONFIG_BOARDNAME "P2020RDB-PCA"
#define CONFIG_NAND_FSL_ELBC
#define CONFIG_P2020
@@ -323,7 +323,7 @@
#define CONFIG_LIBATA
#define CONFIG_LBA48
-#if defined(CONFIG_P2020RDB)
+#if defined(CONFIG_P2020RDB_PC)
#define CONFIG_SYS_CLK_FREQ 100000000
#else
#define CONFIG_SYS_CLK_FREQ 66666666
@@ -382,7 +382,7 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Default settings for DDR3 */
-#ifndef CONFIG_P2020RDB
+#ifndef CONFIG_P2020RDB_PC
#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
@@ -618,7 +618,7 @@
#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
-#if defined(CONFIG_P2020RDB)
+#if defined(CONFIG_P2020RDB_PC)
#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
#else
#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
--
2.5.0
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2015-12-19 4:16 [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC Bryan Hundven
@ 2015-12-23 15:40 ` Bryan Hundven
2015-12-23 18:26 ` Sinan Akman
2016-01-05 17:01 ` York Sun
0 siblings, 2 replies; 10+ messages in thread
From: Bryan Hundven @ 2015-12-23 15:40 UTC (permalink / raw)
To: u-boot
York,
Just checking if you had seen this patch?
Cheers,
-Bryan
On Fri, Dec 18, 2015 at 8:16 PM, Bryan Hundven <bryanhundven@gmail.com> wrote:
> As I work to re-add p1_p2_rdb, CONFIG_P2020RDB conflicts with
> p1_p2_rdb's CONFIG_P2020RDB.
>
> Rename p1_p2_rdb_pc's CONFIG_P2020RDB to CONFIG_P2020RDB_PC.
>
> Signed-off-by: Bryan Hundven <bryanhundven@gmail.com>
> Cc: Andy Fleming <afleming@freescale.com>
> Cc: York Sun <yorksun@freescale.com>
> ---
> board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
> configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +-
> configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +-
> configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +-
> configs/P2020RDB-PC_36BIT_defconfig | 2 +-
> configs/P2020RDB-PC_NAND_defconfig | 2 +-
> configs/P2020RDB-PC_SDCARD_defconfig | 2 +-
> configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +-
> configs/P2020RDB-PC_defconfig | 2 +-
> include/configs/p1_p2_rdb_pc.h | 8 ++++----
> 10 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
> index 946d503..ef59b58 100644
> --- a/board/freescale/p1_p2_rdb_pc/ddr.c
> +++ b/board/freescale/p1_p2_rdb_pc/ddr.c
> @@ -49,7 +49,7 @@ dimm_params_t ddr_raw_timing = {
> .refresh_rate_ps = 7800000,
> .tfaw_ps = 37500,
> };
> -#elif defined(CONFIG_P2020RDB)
> +#elif defined(CONFIG_P2020RDB_PC)
> /* Micron MT41J128M16_15E */
> dimm_params_t ddr_raw_timing = {
> .n_ranks = 1,
> diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> index 578bfc5..c7bb971 100644
> --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> CONFIG_TPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,NAND"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> index 19c795a..c79399e 100644
> --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SDCARD"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> index bdc5e43..898993f 100644
> --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SPIFLASH"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
> index b9d4a47..16af720 100644
> --- a/configs/P2020RDB-PC_36BIT_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_defconfig
> @@ -1,7 +1,7 @@
> CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
> index ea9f830..19ec9d2 100644
> --- a/configs/P2020RDB-PC_NAND_defconfig
> +++ b/configs/P2020RDB-PC_NAND_defconfig
> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> CONFIG_TPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,NAND"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
> index 997887d..ee0fd33 100644
> --- a/configs/P2020RDB-PC_SDCARD_defconfig
> +++ b/configs/P2020RDB-PC_SDCARD_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SDCARD"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
> index e547ea4..40190c4 100644
> --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
> +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
> @@ -2,7 +2,7 @@ CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> CONFIG_SPL=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SPIFLASH"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
> index fdad880..6629285 100644
> --- a/configs/P2020RDB-PC_defconfig
> +++ b/configs/P2020RDB-PC_defconfig
> @@ -1,7 +1,7 @@
> CONFIG_PPC=y
> CONFIG_MPC85xx=y
> CONFIG_TARGET_P1_P2_RDB_PC=y
> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC"
> CONFIG_SPI_FLASH=y
> CONFIG_SPI_FLASH_SPANSION=y
> CONFIG_NETDEVICES=y
> diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
> index 60bedaa..e64805a 100644
> --- a/include/configs/p1_p2_rdb_pc.h
> +++ b/include/configs/p1_p2_rdb_pc.h
> @@ -154,7 +154,7 @@
> #define CONFIG_SYS_L2_SIZE (256 << 10)
> #endif
>
> -#if defined(CONFIG_P2020RDB)
> +#if defined(CONFIG_P2020RDB_PC)
> #define CONFIG_BOARDNAME "P2020RDB-PCA"
> #define CONFIG_NAND_FSL_ELBC
> #define CONFIG_P2020
> @@ -323,7 +323,7 @@
> #define CONFIG_LIBATA
> #define CONFIG_LBA48
>
> -#if defined(CONFIG_P2020RDB)
> +#if defined(CONFIG_P2020RDB_PC)
> #define CONFIG_SYS_CLK_FREQ 100000000
> #else
> #define CONFIG_SYS_CLK_FREQ 66666666
> @@ -382,7 +382,7 @@
> #define CONFIG_DIMM_SLOTS_PER_CTLR 1
>
> /* Default settings for DDR3 */
> -#ifndef CONFIG_P2020RDB
> +#ifndef CONFIG_P2020RDB_PC
> #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
> #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
> #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
> @@ -618,7 +618,7 @@
> #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
> #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
> #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
> -#if defined(CONFIG_P2020RDB)
> +#if defined(CONFIG_P2020RDB_PC)
> #define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
> #else
> #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
> --
> 2.5.0
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2015-12-23 15:40 ` Bryan Hundven
@ 2015-12-23 18:26 ` Sinan Akman
2015-12-23 18:39 ` Bryan Hundven
2016-01-05 17:01 ` York Sun
1 sibling, 1 reply; 10+ messages in thread
From: Sinan Akman @ 2015-12-23 18:26 UTC (permalink / raw)
To: u-boot
Hi Bryan
On 23/12/15 10:40 AM, Bryan Hundven wrote:
> York,
>
> Just checking if you had seen this patch?
>
> Cheers,
>
> -Bryan
>
> On Fri, Dec 18, 2015 at 8:16 PM, Bryan Hundven <bryanhundven@gmail.com> wrote:
>> As I work to re-add p1_p2_rdb, CONFIG_P2020RDB conflicts with
>> p1_p2_rdb's CONFIG_P2020RDB.
>>
>> Rename p1_p2_rdb_pc's CONFIG_P2020RDB to CONFIG_P2020RDB_PC.
>>
>> Signed-off-by: Bryan Hundven <bryanhundven@gmail.com>
>> Cc: Andy Fleming <afleming@freescale.com>
>> Cc: York Sun <yorksun@freescale.com>
>> ---
>> board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
>> configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +-
>> configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +-
>> configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +-
>> configs/P2020RDB-PC_36BIT_defconfig | 2 +-
>> configs/P2020RDB-PC_NAND_defconfig | 2 +-
>> configs/P2020RDB-PC_SDCARD_defconfig | 2 +-
>> configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +-
>> configs/P2020RDB-PC_defconfig | 2 +-
>> include/configs/p1_p2_rdb_pc.h | 8 ++++----
>> 10 files changed, 13 insertions(+), 13 deletions(-)
>>
>> diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
>> index 946d503..ef59b58 100644
>> --- a/board/freescale/p1_p2_rdb_pc/ddr.c
>> +++ b/board/freescale/p1_p2_rdb_pc/ddr.c
>> @@ -49,7 +49,7 @@ dimm_params_t ddr_raw_timing = {
>> .refresh_rate_ps = 7800000,
>> .tfaw_ps = 37500,
>> };
>> -#elif defined(CONFIG_P2020RDB)
>> +#elif defined(CONFIG_P2020RDB_PC)
>> /* Micron MT41J128M16_15E */
>> dimm_params_t ddr_raw_timing = {
>> .n_ranks = 1,
>> diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
>> index 578bfc5..c7bb971 100644
>> --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
>> +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
>> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> CONFIG_SPL=y
>> CONFIG_TPL=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,NAND"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>> index 19c795a..c79399e 100644
>> --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>> +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>> CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SDCARD"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>> index bdc5e43..898993f 100644
>> --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>> +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>> CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SPIFLASH"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
>> index b9d4a47..16af720 100644
>> --- a/configs/P2020RDB-PC_36BIT_defconfig
>> +++ b/configs/P2020RDB-PC_36BIT_defconfig
>> @@ -1,7 +1,7 @@
>> CONFIG_PPC=y
>> CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
>> index ea9f830..19ec9d2 100644
>> --- a/configs/P2020RDB-PC_NAND_defconfig
>> +++ b/configs/P2020RDB-PC_NAND_defconfig
>> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> CONFIG_SPL=y
>> CONFIG_TPL=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,NAND"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
>> index 997887d..ee0fd33 100644
>> --- a/configs/P2020RDB-PC_SDCARD_defconfig
>> +++ b/configs/P2020RDB-PC_SDCARD_defconfig
>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>> CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SDCARD"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
>> index e547ea4..40190c4 100644
>> --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
>> +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>> CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> CONFIG_SPL=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SPIFLASH"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
>> index fdad880..6629285 100644
>> --- a/configs/P2020RDB-PC_defconfig
>> +++ b/configs/P2020RDB-PC_defconfig
>> @@ -1,7 +1,7 @@
>> CONFIG_PPC=y
>> CONFIG_MPC85xx=y
>> CONFIG_TARGET_P1_P2_RDB_PC=y
>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC"
>> CONFIG_SPI_FLASH=y
>> CONFIG_SPI_FLASH_SPANSION=y
>> CONFIG_NETDEVICES=y
>> diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
>> index 60bedaa..e64805a 100644
>> --- a/include/configs/p1_p2_rdb_pc.h
>> +++ b/include/configs/p1_p2_rdb_pc.h
>> @@ -154,7 +154,7 @@
>> #define CONFIG_SYS_L2_SIZE (256 << 10)
>> #endif
>>
>> -#if defined(CONFIG_P2020RDB)
>> +#if defined(CONFIG_P2020RDB_PC)
>> #define CONFIG_BOARDNAME "P2020RDB-PCA"
>> #define CONFIG_NAND_FSL_ELBC
>> #define CONFIG_P2020
>> @@ -323,7 +323,7 @@
>> #define CONFIG_LIBATA
>> #define CONFIG_LBA48
>>
>> -#if defined(CONFIG_P2020RDB)
>> +#if defined(CONFIG_P2020RDB_PC)
>> #define CONFIG_SYS_CLK_FREQ 100000000
>> #else
>> #define CONFIG_SYS_CLK_FREQ 66666666
>> @@ -382,7 +382,7 @@
>> #define CONFIG_DIMM_SLOTS_PER_CTLR 1
>>
>> /* Default settings for DDR3 */
>> -#ifndef CONFIG_P2020RDB
>> +#ifndef CONFIG_P2020RDB_PC
>> #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
>> #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
>> #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
>> @@ -618,7 +618,7 @@
>> #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
>> #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
>> #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
>> -#if defined(CONFIG_P2020RDB)
>> +#if defined(CONFIG_P2020RDB_PC)
>> #define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
>> #else
>> #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
I wonder if it would better that you create a new macro
e.g. CONFIG_P2020RDB_PAB and leave the existing p1_p2_rdb_pc
unmodified. I thought this way you could continue developing
the support for older boards without changing anything in
the current version so the potential risk would be lower.
Just my two cents ;)
Regards
Sinan Akman
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2015-12-23 18:26 ` Sinan Akman
@ 2015-12-23 18:39 ` Bryan Hundven
0 siblings, 0 replies; 10+ messages in thread
From: Bryan Hundven @ 2015-12-23 18:39 UTC (permalink / raw)
To: u-boot
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA512
Sinan, List,
On December 23, 2015 10:26:28 AM PST, Sinan Akman <sinan@writeme.com> wrote:
>
> Hi Bryan
>
>On 23/12/15 10:40 AM, Bryan Hundven wrote:
>> York,
>>
>> Just checking if you had seen this patch?
>>
>> Cheers,
>>
>> -Bryan
>>
>> On Fri, Dec 18, 2015 at 8:16 PM, Bryan Hundven
><bryanhundven@gmail.com> wrote:
>>> As I work to re-add p1_p2_rdb, CONFIG_P2020RDB conflicts with
>>> p1_p2_rdb's CONFIG_P2020RDB.
>>>
>>> Rename p1_p2_rdb_pc's CONFIG_P2020RDB to CONFIG_P2020RDB_PC.
>>>
>>> Signed-off-by: Bryan Hundven <bryanhundven@gmail.com>
>>> Cc: Andy Fleming <afleming@freescale.com>
>>> Cc: York Sun <yorksun@freescale.com>
>>> ---
>>> board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
>>> configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +-
>>> configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +-
>>> configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +-
>>> configs/P2020RDB-PC_36BIT_defconfig | 2 +-
>>> configs/P2020RDB-PC_NAND_defconfig | 2 +-
>>> configs/P2020RDB-PC_SDCARD_defconfig | 2 +-
>>> configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +-
>>> configs/P2020RDB-PC_defconfig | 2 +-
>>> include/configs/p1_p2_rdb_pc.h | 8 ++++----
>>> 10 files changed, 13 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c
>b/board/freescale/p1_p2_rdb_pc/ddr.c
>>> index 946d503..ef59b58 100644
>>> --- a/board/freescale/p1_p2_rdb_pc/ddr.c
>>> +++ b/board/freescale/p1_p2_rdb_pc/ddr.c
>>> @@ -49,7 +49,7 @@ dimm_params_t ddr_raw_timing = {
>>> .refresh_rate_ps = 7800000,
>>> .tfaw_ps = 37500,
>>> };
>>> -#elif defined(CONFIG_P2020RDB)
>>> +#elif defined(CONFIG_P2020RDB_PC)
>>> /* Micron MT41J128M16_15E */
>>> dimm_params_t ddr_raw_timing = {
>>> .n_ranks = 1,
>>> diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig
>b/configs/P2020RDB-PC_36BIT_NAND_defconfig
>>> index 578bfc5..c7bb971 100644
>>> --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
>>> +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
>>> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> CONFIG_SPL=y
>>> CONFIG_TPL=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,NAND"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>>> index 19c795a..c79399e 100644
>>> --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>>> +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
>>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>>> CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> CONFIG_SPL=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SDCARD"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>>> index bdc5e43..898993f 100644
>>> --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>>> +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
>>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>>> CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> CONFIG_SPL=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT,SPIFLASH"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_36BIT_defconfig
>b/configs/P2020RDB-PC_36BIT_defconfig
>>> index b9d4a47..16af720 100644
>>> --- a/configs/P2020RDB-PC_36BIT_defconfig
>>> +++ b/configs/P2020RDB-PC_36BIT_defconfig
>>> @@ -1,7 +1,7 @@
>>> CONFIG_PPC=y
>>> CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,36BIT"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_NAND_defconfig
>b/configs/P2020RDB-PC_NAND_defconfig
>>> index ea9f830..19ec9d2 100644
>>> --- a/configs/P2020RDB-PC_NAND_defconfig
>>> +++ b/configs/P2020RDB-PC_NAND_defconfig
>>> @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> CONFIG_SPL=y
>>> CONFIG_TPL=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,NAND"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_SDCARD_defconfig
>b/configs/P2020RDB-PC_SDCARD_defconfig
>>> index 997887d..ee0fd33 100644
>>> --- a/configs/P2020RDB-PC_SDCARD_defconfig
>>> +++ b/configs/P2020RDB-PC_SDCARD_defconfig
>>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>>> CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> CONFIG_SPL=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SDCARD"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig
>b/configs/P2020RDB-PC_SPIFLASH_defconfig
>>> index e547ea4..40190c4 100644
>>> --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
>>> +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
>>> @@ -2,7 +2,7 @@ CONFIG_PPC=y
>>> CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> CONFIG_SPL=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC,SPIFLASH"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/configs/P2020RDB-PC_defconfig
>b/configs/P2020RDB-PC_defconfig
>>> index fdad880..6629285 100644
>>> --- a/configs/P2020RDB-PC_defconfig
>>> +++ b/configs/P2020RDB-PC_defconfig
>>> @@ -1,7 +1,7 @@
>>> CONFIG_PPC=y
>>> CONFIG_MPC85xx=y
>>> CONFIG_TARGET_P1_P2_RDB_PC=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
>>> +CONFIG_SYS_EXTRA_OPTIONS="P2020RDB_PC"
>>> CONFIG_SPI_FLASH=y
>>> CONFIG_SPI_FLASH_SPANSION=y
>>> CONFIG_NETDEVICES=y
>>> diff --git a/include/configs/p1_p2_rdb_pc.h
>b/include/configs/p1_p2_rdb_pc.h
>>> index 60bedaa..e64805a 100644
>>> --- a/include/configs/p1_p2_rdb_pc.h
>>> +++ b/include/configs/p1_p2_rdb_pc.h
>>> @@ -154,7 +154,7 @@
>>> #define CONFIG_SYS_L2_SIZE (256 << 10)
>>> #endif
>>>
>>> -#if defined(CONFIG_P2020RDB)
>>> +#if defined(CONFIG_P2020RDB_PC)
>>> #define CONFIG_BOARDNAME "P2020RDB-PCA"
>>> #define CONFIG_NAND_FSL_ELBC
>>> #define CONFIG_P2020
>>> @@ -323,7 +323,7 @@
>>> #define CONFIG_LIBATA
>>> #define CONFIG_LBA48
>>>
>>> -#if defined(CONFIG_P2020RDB)
>>> +#if defined(CONFIG_P2020RDB_PC)
>>> #define CONFIG_SYS_CLK_FREQ 100000000
>>> #else
>>> #define CONFIG_SYS_CLK_FREQ 66666666
>>> @@ -382,7 +382,7 @@
>>> #define CONFIG_DIMM_SLOTS_PER_CTLR 1
>>>
>>> /* Default settings for DDR3 */
>>> -#ifndef CONFIG_P2020RDB
>>> +#ifndef CONFIG_P2020RDB_PC
>>> #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f
>>> #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
>>> #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000
>>> @@ -618,7 +618,7 @@
>>> #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR +
>116 * 1024)
>>> #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
>>> #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR +
>148 * 1024)
>>> -#if defined(CONFIG_P2020RDB)
>>> +#if defined(CONFIG_P2020RDB_PC)
>>> #define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10)
>>> #else
>>> #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10)
>
> I wonder if it would better that you create a new macro
>e.g. CONFIG_P2020RDB_PAB and leave the existing p1_p2_rdb_pc
>unmodified. I thought this way you could continue developing
>the support for older boards without changing anything in
>the current version so the potential risk would be lower.
>
> Just my two cents ;)
The goal is to re-add p1011rdb, p1020rdb, p2010rdb, and p2020rdb into the same directory and rename p1_p2_rdb_pc to p1_p2_rdb as they are all subtle variants of the same board.
As far as I can tell, the risk of changing CONFIG_P2020 to CONFIG_P2020_PC is already pretty low.
It's also a matter of consistency. All of the other boards are suffixed with '_PC' or '_PD' except this one.
I am also considering giving the '_PA' and '_PB' suffix to the older boards. If that happens, which board is newer? P2020 or P2020_PA?
- -Bryan
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2015-12-23 15:40 ` Bryan Hundven
2015-12-23 18:26 ` Sinan Akman
@ 2016-01-05 17:01 ` York Sun
2016-01-05 18:38 ` Bryan Hundven
1 sibling, 1 reply; 10+ messages in thread
From: York Sun @ 2016-01-05 17:01 UTC (permalink / raw)
To: u-boot
On 12/23/2015 07:40 AM, Bryan Hundven wrote:
> York,
>
> Just checking if you had seen this patch?
>
Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another patch
using P2020RDB?
York
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2016-01-05 17:01 ` York Sun
@ 2016-01-05 18:38 ` Bryan Hundven
2016-01-05 21:37 ` York Sun
0 siblings, 1 reply; 10+ messages in thread
From: Bryan Hundven @ 2016-01-05 18:38 UTC (permalink / raw)
To: u-boot
On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:
>
>
> On 12/23/2015 07:40 AM, Bryan Hundven wrote:
> > York,
> >
> > Just checking if you had seen this patch?
> >
>
> Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another patch
> using P2020RDB?
It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
want to support p2020rdb-pb (which I don't have, and cannot test), you can
ignore this one.
I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
where I have reverted removing the p1_p2_rdb board, but have started to
clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
add the small difference for p1011rdb/p1020rdb-pb.
What are your opinions on that?
The things that are difficult right now are:
* ddr(2) does not use spd on pb?
* I have the ltib cds that came with the board, but I still feel like
I'm missing a reference manual that is for the pb version. I can find
the pc and pd versions of the 1020RM online. pb just seems a little
different.
-Bryan
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2016-01-05 18:38 ` Bryan Hundven
@ 2016-01-05 21:37 ` York Sun
2016-01-05 21:57 ` york sun
[not found] ` <568C3C57.4050207@nxp.com>
0 siblings, 2 replies; 10+ messages in thread
From: York Sun @ 2016-01-05 21:37 UTC (permalink / raw)
To: u-boot
On 01/05/2016 10:40 AM, Bryan Hundven wrote:
> On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:
>>
>>
>> On 12/23/2015 07:40 AM, Bryan Hundven wrote:
>>> York,
>>>
>>> Just checking if you had seen this patch?
>>>
>>
>> Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another patch
>> using P2020RDB?
>
> It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
> want to support p2020rdb-pb (which I don't have, and cannot test), you can
> ignore this one.
>
> I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
> where I have reverted removing the p1_p2_rdb board, but have started to
> clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
> it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
> and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
> add the small difference for p1011rdb/p1020rdb-pb.
> What are your opinions on that?
I like clean and small changes.
>
> The things that are difficult right now are:
> * ddr(2) does not use spd on pb?
If I remember correctly, these boards have fixed DDR. RAW timing method was
introduced to p1_p2_rdb_pc. You are welcome to use this method. It should be
easy to back port.
> * I have the ltib cds that came with the board, but I still feel like
> I'm missing a reference manual that is for the pb version. I can find
> the pc and pd versions of the 1020RM online. pb just seems a little
> different.
These boards are actually made by third parties. I have P1010RDB on my hand. If
you need P1020RDB, I can find it for you.
York
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2016-01-05 21:37 ` York Sun
@ 2016-01-05 21:57 ` york sun
[not found] ` <568C3C57.4050207@nxp.com>
1 sibling, 0 replies; 10+ messages in thread
From: york sun @ 2016-01-05 21:57 UTC (permalink / raw)
To: u-boot
On 01/05/2016 01:38 PM, York Sun wrote:
>
>
> On 01/05/2016 10:40 AM, Bryan Hundven wrote:
>> On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:
>>>
>>>
>>> On 12/23/2015 07:40 AM, Bryan Hundven wrote:
>>>> York,
>>>>
>>>> Just checking if you had seen this patch?
>>>>
>>>
>>> Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another patch
>>> using P2020RDB?
>>
>> It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
>> want to support p2020rdb-pb (which I don't have, and cannot test), you can
>> ignore this one.
>>
>> I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
>> where I have reverted removing the p1_p2_rdb board, but have started to
>> clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
>> it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
>> and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
>> add the small difference for p1011rdb/p1020rdb-pb.
>> What are your opinions on that?
>
> I like clean and small changes.
>
>>
>> The things that are difficult right now are:
>> * ddr(2) does not use spd on pb?
>
> If I remember correctly, these boards have fixed DDR. RAW timing method was
> introduced to p1_p2_rdb_pc. You are welcome to use this method. It should be
> easy to back port.
>
>> * I have the ltib cds that came with the board, but I still feel like
>> I'm missing a reference manual that is for the pb version. I can find
>> the pc and pd versions of the 1020RM online. pb just seems a little
>> different.
>
> These boards are actually made by third parties. I have P1010RDB on my hand. If
> you need P1020RDB, I can find it for you.
>
Bryan,
I checked the last release for P1020RDB. It was on 2010-11-01. The schematic is
included in the LTIB DVD under help/Hardware/P1020RDB.
York
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
[not found] ` <568C3C57.4050207@nxp.com>
@ 2016-07-19 21:50 ` york sun
2016-07-19 21:51 ` Bryan Hundven
0 siblings, 1 reply; 10+ messages in thread
From: york sun @ 2016-07-19 21:50 UTC (permalink / raw)
To: u-boot
On 01/05/2016 01:57 PM, york.sun at nxp.com wrote:
> On 01/05/2016 01:38 PM, York Sun wrote:
>>
>>
>> On 01/05/2016 10:40 AM, Bryan Hundven wrote:
>>> On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:
>>>>
>>>>
>>>> On 12/23/2015 07:40 AM, Bryan Hundven wrote:
>>>>> York,
>>>>>
>>>>> Just checking if you had seen this patch?
>>>>>
>>>>
>>>> Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another patch
>>>> using P2020RDB?
>>>
>>> It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
>>> want to support p2020rdb-pb (which I don't have, and cannot test), you can
>>> ignore this one.
>>>
>>> I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
>>> where I have reverted removing the p1_p2_rdb board, but have started to
>>> clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
>>> it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
>>> and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
>>> add the small difference for p1011rdb/p1020rdb-pb.
>>> What are your opinions on that?
>>
>> I like clean and small changes.
>>
>>>
>>> The things that are difficult right now are:
>>> * ddr(2) does not use spd on pb?
>>
>> If I remember correctly, these boards have fixed DDR. RAW timing method was
>> introduced to p1_p2_rdb_pc. You are welcome to use this method. It should be
>> easy to back port.
>>
>>> * I have the ltib cds that came with the board, but I still feel like
>>> I'm missing a reference manual that is for the pb version. I can find
>>> the pc and pd versions of the 1020RM online. pb just seems a little
>>> different.
>>
>> These boards are actually made by third parties. I have P1010RDB on my hand. If
>> you need P1020RDB, I can find it for you.
>>
>
> Bryan,
>
> I checked the last release for P1020RDB. It was on 2010-11-01. The schematic is
> included in the LTIB DVD under help/Hardware/P1020RDB.
>
Bryan,
Where are we on this patch? If you don't want to move forward, I can
drop this for now.
York
^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC
2016-07-19 21:50 ` york sun
@ 2016-07-19 21:51 ` Bryan Hundven
0 siblings, 0 replies; 10+ messages in thread
From: Bryan Hundven @ 2016-07-19 21:51 UTC (permalink / raw)
To: u-boot
On Tue, Jul 19, 2016 at 2:50 PM, york sun <york.sun@nxp.com> wrote:
> On 01/05/2016 01:57 PM, york.sun at nxp.com wrote:
>> On 01/05/2016 01:38 PM, York Sun wrote:
>>>
>>>
>>> On 01/05/2016 10:40 AM, Bryan Hundven wrote:
>>>> On Tue, Jan 05, 2016 at 09:01:17AM -0800, York Sun wrote:
>>>>>
>>>>>
>>>>> On 12/23/2015 07:40 AM, Bryan Hundven wrote:
>>>>>> York,
>>>>>>
>>>>>> Just checking if you had seen this patch?
>>>>>>
>>>>>
>>>>> Yes, I noticed. You rename P2020RDB to P2020RDB_PC. Do you have another patch
>>>>> using P2020RDB?
>>>>
>>>> It may be irrelevant. I have a p1020rdb-pb. So technically, unless we
>>>> want to support p2020rdb-pb (which I don't have, and cannot test), you can
>>>> ignore this one.
>>>>
>>>> I have work here: https://github.com/bhundven/u-boot/tree/p1_p2_rdb-wip
>>>> where I have reverted removing the p1_p2_rdb board, but have started to
>>>> clean up the difference between p1_p2_rdb and p1_p2_rdb_pc. Eventually,
>>>> it makes sense to me to move p1_p2_rdb_pc to p1_p2_rdb, as it has pc,
>>>> and pd. If I can get time to finish, it would have p1020rdb-pb. Then just
>>>> add the small difference for p1011rdb/p1020rdb-pb.
>>>> What are your opinions on that?
>>>
>>> I like clean and small changes.
>>>
>>>>
>>>> The things that are difficult right now are:
>>>> * ddr(2) does not use spd on pb?
>>>
>>> If I remember correctly, these boards have fixed DDR. RAW timing method was
>>> introduced to p1_p2_rdb_pc. You are welcome to use this method. It should be
>>> easy to back port.
>>>
>>>> * I have the ltib cds that came with the board, but I still feel like
>>>> I'm missing a reference manual that is for the pb version. I can find
>>>> the pc and pd versions of the 1020RM online. pb just seems a little
>>>> different.
>>>
>>> These boards are actually made by third parties. I have P1010RDB on my hand. If
>>> you need P1020RDB, I can find it for you.
>>>
>>
>> Bryan,
>>
>> I checked the last release for P1020RDB. It was on 2010-11-01. The schematic is
>> included in the LTIB DVD under help/Hardware/P1020RDB.
>>
>
>
> Bryan,
>
> Where are we on this patch? If you don't want to move forward, I can
> drop this for now.
>
> York
>
York,
Yea, for now I'm not even tracking u-boot. You can drop this.
-Bryan
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-07-19 21:51 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-12-19 4:16 [U-Boot] [PATCH] powerpc: p1_p2_rdb_pc: rename to P2020RDB_PC Bryan Hundven
2015-12-23 15:40 ` Bryan Hundven
2015-12-23 18:26 ` Sinan Akman
2015-12-23 18:39 ` Bryan Hundven
2016-01-05 17:01 ` York Sun
2016-01-05 18:38 ` Bryan Hundven
2016-01-05 21:37 ` York Sun
2016-01-05 21:57 ` york sun
[not found] ` <568C3C57.4050207@nxp.com>
2016-07-19 21:50 ` york sun
2016-07-19 21:51 ` Bryan Hundven
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