All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10 VMPT
@ 2017-03-31  2:52 Junwei Zhang
       [not found] ` <1490928723-2184-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Junwei Zhang @ 2017-03-31  2:52 UTC (permalink / raw)
  To: alexander.deucher-5C7GfCeVMHo, christian.koenig-5C7GfCeVMHo
  Cc: Zhang, Jerry, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

From: "Zhang, Jerry" <Jerry.Zhang@amd.com>

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  8 --------
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      | 15 ++++++++-------
 2 files changed, 8 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 363d73c..98555fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1041,14 +1041,6 @@ static bool amdgpu_check_pot_argument(int arg)
 
 static void amdgpu_get_block_size(struct amdgpu_device *adev)
 {
-	/* from AI, asic starts to support multiple level VMPT */
-	if (adev->asic_type >= CHIP_VEGA10) {
-		if (amdgpu_vm_block_size != 9)
-			dev_warn(adev->dev,
-				 "Multi-VMPT limits block size to one page!\n");
-		amdgpu_vm_block_size = 9;
-		return;
-	}
 	/* defines number of bits in page table versus page directory,
 	 * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
 	 * page table and the remaining bits are in the page directory */
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index df69aae..081a676 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -546,6 +546,14 @@ static int gmc_v9_0_sw_init(void *handle)
 	} else {
 		/* XXX Don't know how to get VRAM type yet. */
 		adev->mc.vram_type = AMDGPU_VRAM_TYPE_HBM;
+
+		/*
+		 * To fulfill 4-level page support,
+		 * vm size is 256TB (48bit), maximum size of Vega10,
+		 * block size 512 (9bit)
+		 */
+		amdgpu_vm_size = 1U << 18;
+		amdgpu_vm_block_size = 9;
 	}
 
 	/* This interrupt is VMC page fault.*/
@@ -557,13 +565,6 @@ static int gmc_v9_0_sw_init(void *handle)
 	if (r)
 		return r;
 
-	/* Because of four level VMPTs, vm size is at least 512GB.
-	 * The maximum size is 256TB (48bit).
-	 */
-	if (amdgpu_vm_size < 512) {
-		DRM_WARN("VM size is at least 512GB!\n");
-		amdgpu_vm_size = 512;
-	}
 	adev->vm_manager.max_pfn = (uint64_t)amdgpu_vm_size << 18;
 
 	/* Set the internal MC address mask
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH 2/2] drm/amdgpu: rename amdgpu_get_block_size to amdgpu_check_block_size
       [not found] ` <1490928723-2184-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
@ 2017-03-31  2:52   ` Junwei Zhang
  2017-03-31  4:05   ` [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10 VMPT Deucher, Alexander
  1 sibling, 0 replies; 4+ messages in thread
From: Junwei Zhang @ 2017-03-31  2:52 UTC (permalink / raw)
  To: alexander.deucher-5C7GfCeVMHo, christian.koenig-5C7GfCeVMHo
  Cc: Junwei Zhang, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Here just check if the block size is reasonable,
otherwise set it as default vaule.
The entity actual vaule should be set globally or in gmc.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 98555fd..714be3c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1039,7 +1039,7 @@ static bool amdgpu_check_pot_argument(int arg)
 	return (arg & (arg - 1)) == 0;
 }
 
-static void amdgpu_get_block_size(struct amdgpu_device *adev)
+static void amdgpu_check_block_size(struct amdgpu_device *adev)
 {
 	/* defines number of bits in page table versus page directory,
 	 * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
@@ -1131,7 +1131,7 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
 
 	amdgpu_check_vm_size(adev);
 
-	amdgpu_get_block_size(adev);
+	amdgpu_check_block_size(adev);
 
 	if (amdgpu_vram_page_split != -1 && (amdgpu_vram_page_split < 16 ||
 	    !amdgpu_check_pot_argument(amdgpu_vram_page_split))) {
-- 
1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* RE: [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10 VMPT
       [not found] ` <1490928723-2184-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
  2017-03-31  2:52   ` [PATCH 2/2] drm/amdgpu: rename amdgpu_get_block_size to amdgpu_check_block_size Junwei Zhang
@ 2017-03-31  4:05   ` Deucher, Alexander
       [not found]     ` <CY4PR12MB1653A907A71FB7C02DE39EE5F7370-rpdhrqHFk06apTa93KjAaQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
  1 sibling, 1 reply; 4+ messages in thread
From: Deucher, Alexander @ 2017-03-31  4:05 UTC (permalink / raw)
  To: Koenig, Christian; +Cc: Zhang, Jerry, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

> -----Original Message-----
> From: Junwei Zhang [mailto:Jerry.Zhang@amd.com]
> Sent: Thursday, March 30, 2017 10:52 PM
> To: Deucher, Alexander; Koenig, Christian
> Cc: amd-gfx@lists.freedesktop.org; Zhang, Jerry
> Subject: [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10
> VMPT
> 
> From: "Zhang, Jerry" <Jerry.Zhang@amd.com>
> 
> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  8 --------
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      | 15 ++++++++-------
>  2 files changed, 8 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 363d73c..98555fd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1041,14 +1041,6 @@ static bool amdgpu_check_pot_argument(int arg)
> 
>  static void amdgpu_get_block_size(struct amdgpu_device *adev)
>  {
> -	/* from AI, asic starts to support multiple level VMPT */
> -	if (adev->asic_type >= CHIP_VEGA10) {
> -		if (amdgpu_vm_block_size != 9)
> -			dev_warn(adev->dev,
> -				 "Multi-VMPT limits block size to one
> page!\n");
> -		amdgpu_vm_block_size = 9;
> -		return;
> -	}
>  	/* defines number of bits in page table versus page directory,
>  	 * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
>  	 * page table and the remaining bits are in the page directory */
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index df69aae..081a676 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -546,6 +546,14 @@ static int gmc_v9_0_sw_init(void *handle)
>  	} else {
>  		/* XXX Don't know how to get VRAM type yet. */
>  		adev->mc.vram_type = AMDGPU_VRAM_TYPE_HBM;
> +
> +		/*
> +		 * To fulfill 4-level page support,
> +		 * vm size is 256TB (48bit), maximum size of Vega10,
> +		 * block size 512 (9bit)
> +		 */
> +		amdgpu_vm_size = 1U << 18;
> +		amdgpu_vm_block_size = 9;

This won't work.  You are still changing the amdgpu_vm_* global variables so if you have 2 GPUs in the systems, you'll change them both.

>  	}
> 
>  	/* This interrupt is VMC page fault.*/
> @@ -557,13 +565,6 @@ static int gmc_v9_0_sw_init(void *handle)
>  	if (r)
>  		return r;
> 
> -	/* Because of four level VMPTs, vm size is at least 512GB.
> -	 * The maximum size is 256TB (48bit).
> -	 */
> -	if (amdgpu_vm_size < 512) {
> -		DRM_WARN("VM size is at least 512GB!\n");
> -		amdgpu_vm_size = 512;
> -	}
>  	adev->vm_manager.max_pfn = (uint64_t)amdgpu_vm_size << 18;

Instead of changing amdgpu_vm_size, change adev->vm_manager.max_pfn directly, that way you won't be changing the global variable and possibly messing up other driver instances.  The alternative, and cleaner in my opinion, would be to add new variables to the vm_manager, e.g., adev->vm_manager.size and adev->vm_manager.block_size, and set them to something reasonable based on the module parameters and them use them in the code rather than the global variables.

Alex

> 
>  	/* Set the internal MC address mask
> --
> 1.9.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10 VMPT
       [not found]     ` <CY4PR12MB1653A907A71FB7C02DE39EE5F7370-rpdhrqHFk06apTa93KjAaQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2017-04-01  2:50       ` Zhang, Jerry (Junwei)
  0 siblings, 0 replies; 4+ messages in thread
From: Zhang, Jerry (Junwei) @ 2017-04-01  2:50 UTC (permalink / raw)
  To: Deucher, Alexander, Koenig, Christian
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

On 03/31/2017 12:05 PM, Deucher, Alexander wrote:
>> -----Original Message-----
>> From: Junwei Zhang [mailto:Jerry.Zhang@amd.com]
>> Sent: Thursday, March 30, 2017 10:52 PM
>> To: Deucher, Alexander; Koenig, Christian
>> Cc: amd-gfx@lists.freedesktop.org; Zhang, Jerry
>> Subject: [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10
>> VMPT
>>
>> From: "Zhang, Jerry" <Jerry.Zhang@amd.com>
>>
>> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  8 --------
>>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c      | 15 ++++++++-------
>>  2 files changed, 8 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> index 363d73c..98555fd 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
>> @@ -1041,14 +1041,6 @@ static bool amdgpu_check_pot_argument(int arg)
>>
>>  static void amdgpu_get_block_size(struct amdgpu_device *adev)
>>  {
>> -     /* from AI, asic starts to support multiple level VMPT */
>> -     if (adev->asic_type >= CHIP_VEGA10) {
>> -             if (amdgpu_vm_block_size != 9)
>> -                     dev_warn(adev->dev,
>> -                              "Multi-VMPT limits block size to one
>> page!\n");
>> -             amdgpu_vm_block_size = 9;
>> -             return;
>> -     }
>>        /* defines number of bits in page table versus page directory,
>>         * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
>>         * page table and the remaining bits are in the page directory */
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> index df69aae..081a676 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
>> @@ -546,6 +546,14 @@ static int gmc_v9_0_sw_init(void *handle)
>>        } else {
>>                /* XXX Don't know how to get VRAM type yet. */
>>                adev->mc.vram_type = AMDGPU_VRAM_TYPE_HBM;
>> +
>> +             /*
>> +              * To fulfill 4-level page support,
>> +              * vm size is 256TB (48bit), maximum size of Vega10,
>> +              * block size 512 (9bit)
>> +              */
>> +             amdgpu_vm_size = 1U << 18;
>> +             amdgpu_vm_block_size = 9;
>
> This won't work.  You are still changing the amdgpu_vm_* global variables so if
> you have 2 GPUs in the systems, you'll change them both.
>
>>        }
>>
>>        /* This interrupt is VMC page fault.*/
>> @@ -557,13 +565,6 @@ static int gmc_v9_0_sw_init(void *handle)
>>        if (r)
>>                return r;
>>
>> -     /* Because of four level VMPTs, vm size is at least 512GB.
>> -      * The maximum size is 256TB (48bit).
>> -      */
>> -     if (amdgpu_vm_size < 512) {
>> -             DRM_WARN("VM size is at least 512GB!\n");
>> -             amdgpu_vm_size = 512;
>> -     }
>>        adev->vm_manager.max_pfn = (uint64_t)amdgpu_vm_size << 18;
>
> Instead of changing amdgpu_vm_size, change adev->vm_manager.max_pfn directly,
> that way you won't be changing the global variable and possibly messing up
> other driver instances.  The alternative, and cleaner in my opinion, would be
> to add new variables to the vm_manager, e.g., adev->vm_manager.size and
> adev->vm_manager.block_size, and set them to something reasonable based on the
> module parameters and them use them in the code rather than the global variables.

Yeah, thanks to point it out.
I prepared another patch, please check it too.

Jerry

>
> Alex
>
>>
>>        /* Set the internal MC address mask
>> --
>> 1.9.1
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-04-01  2:50 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-03-31  2:52 [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10 VMPT Junwei Zhang
     [not found] ` <1490928723-2184-1-git-send-email-Jerry.Zhang-5C7GfCeVMHo@public.gmane.org>
2017-03-31  2:52   ` [PATCH 2/2] drm/amdgpu: rename amdgpu_get_block_size to amdgpu_check_block_size Junwei Zhang
2017-03-31  4:05   ` [PATCH 1/2 v2] drm/amdgpu: fix vm size and block size for Vega10 VMPT Deucher, Alexander
     [not found]     ` <CY4PR12MB1653A907A71FB7C02DE39EE5F7370-rpdhrqHFk06apTa93KjAaQdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2017-04-01  2:50       ` Zhang, Jerry (Junwei)

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.