* [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-06 1:42 ` Manasi Navare
0 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-06 1:42 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Manasi Navare, Kazlauskas Nicholas
This patch adds defines for the detailed monitor
range flags as per the EDID specification.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
include/drm/drm_edid.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index f0b03d401c27..f89c97623845 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -91,6 +91,11 @@ struct detailed_data_string {
u8 str[13];
} __attribute__((packed));
+#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
+#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
+#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
+#define EDID_CVT_SUPPORT_FLAG 0x04
+
struct detailed_data_monitor_range {
u8 min_vfreq;
u8 max_vfreq;
--
2.19.1
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-06 1:42 ` Manasi Navare
0 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-06 1:42 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Harry Wentland, Kazlauskas Nicholas
This patch adds defines for the detailed monitor
range flags as per the EDID specification.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
include/drm/drm_edid.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index f0b03d401c27..f89c97623845 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -91,6 +91,11 @@ struct detailed_data_string {
u8 str[13];
} __attribute__((packed));
+#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
+#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
+#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
+#define EDID_CVT_SUPPORT_FLAG 0x04
+
struct detailed_data_monitor_range {
u8 min_vfreq;
u8 max_vfreq;
--
2.19.1
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
@ 2020-03-06 1:42 ` Manasi Navare
-1 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-06 1:42 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Manasi Navare, Kazlauskas Nicholas
Adaptive Sync is a VESA feature so add a DRM core helper to parse
the EDID's detailed descritors to obtain the adaptive sync monitor range.
Store this info as part fo drm_display_info so it can be used
across all drivers.
This part of the code is stripped out of amdgpu's function
amdgpu_dm_update_freesync_caps() to make it generic and be used
across all DRM drivers
v4:
* Use is_display_descriptor() (Ville)
* Name the monitor range flags (Ville)
v3:
* Remove the edid parsing restriction for just DP (Nicholas)
* Use drm_for_each_detailed_block (Ville)
* Make the drm_get_adaptive_sync_range function static (Harry, Jani)
v2:
* Change vmin and vmax to use u8 (Ville)
* Dont store pixel clock since that is just a max dotclock
and not related to VRR mode (Manasi)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++
include/drm/drm_connector.h | 22 +++++++++++++++++++
2 files changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ad41764a4ebe..61ed544d9535 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
}
}
+static
+void get_adaptive_sync_range(struct detailed_timing *timing,
+ void *info_adaptive_sync)
+{
+ struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
+ const struct detailed_non_pixel *data = &timing->data.other_data;
+ const struct detailed_data_monitor_range *range = &data->data.range;
+
+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
+ return;
+
+ /*
+ * Check for flag range limits only. If flag == 1 then
+ * no additional timing information provided.
+ * Default GTF, GTF Secondary curve and CVT are not
+ * supported
+ */
+ if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
+ return;
+
+ adaptive_sync->min_vfreq = range->min_vfreq;
+ adaptive_sync->max_vfreq = range->max_vfreq;
+}
+
+static
+void drm_get_adaptive_sync_range(struct drm_connector *connector,
+ const struct edid *edid)
+{
+ struct drm_display_info *info = &connector->display_info;
+
+ if (!version_greater(edid, 1, 1))
+ return;
+
+ drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
+ &info->adaptive_sync);
+
+ DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
+ info->adaptive_sync.min_vfreq,
+ info->adaptive_sync.max_vfreq);
+}
+
/* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
* all of the values which would have been set from EDID
*/
@@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
memset(&info->hdmi, 0, sizeof(info->hdmi));
info->non_desktop = 0;
+ memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
}
u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
@@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
+ drm_get_adaptive_sync_range(connector, edid);
+
DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
if (edid->revision < 3)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 0df7a95ca5d9..2b22c0fa42c4 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -254,6 +254,23 @@ enum drm_panel_orientation {
DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
};
+/**
+ * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
+ * &drm_display_info
+ *
+ * This struct is used to store a Panel's Adaptive Sync capabilities
+ * as parsed from EDID's detailed monitor range descriptor block.
+ *
+ * @min_vfreq: This is the min supported refresh rate in Hz from
+ * EDID's detailed monitor range.
+ * @max_vfreq: This is the max supported refresh rate in Hz from
+ * EDID's detailed monitor range
+ */
+struct drm_adaptive_sync_info {
+ u8 min_vfreq;
+ u8 max_vfreq;
+};
+
/*
* This is a consolidated colorimetry list supported by HDMI and
* DP protocol standard. The respective connectors will register
@@ -473,6 +490,11 @@ struct drm_display_info {
* @non_desktop: Non desktop display (HMD).
*/
bool non_desktop;
+
+ /**
+ * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
+ */
+ struct drm_adaptive_sync_info adaptive_sync;
};
int drm_display_info_set_bus_formats(struct drm_display_info *info,
--
2.19.1
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
@ 2020-03-06 1:42 ` Manasi Navare
0 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-06 1:42 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Harry Wentland, Kazlauskas Nicholas
Adaptive Sync is a VESA feature so add a DRM core helper to parse
the EDID's detailed descritors to obtain the adaptive sync monitor range.
Store this info as part fo drm_display_info so it can be used
across all drivers.
This part of the code is stripped out of amdgpu's function
amdgpu_dm_update_freesync_caps() to make it generic and be used
across all DRM drivers
v4:
* Use is_display_descriptor() (Ville)
* Name the monitor range flags (Ville)
v3:
* Remove the edid parsing restriction for just DP (Nicholas)
* Use drm_for_each_detailed_block (Ville)
* Make the drm_get_adaptive_sync_range function static (Harry, Jani)
v2:
* Change vmin and vmax to use u8 (Ville)
* Dont store pixel clock since that is just a max dotclock
and not related to VRR mode (Manasi)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++
include/drm/drm_connector.h | 22 +++++++++++++++++++
2 files changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ad41764a4ebe..61ed544d9535 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
}
}
+static
+void get_adaptive_sync_range(struct detailed_timing *timing,
+ void *info_adaptive_sync)
+{
+ struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
+ const struct detailed_non_pixel *data = &timing->data.other_data;
+ const struct detailed_data_monitor_range *range = &data->data.range;
+
+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
+ return;
+
+ /*
+ * Check for flag range limits only. If flag == 1 then
+ * no additional timing information provided.
+ * Default GTF, GTF Secondary curve and CVT are not
+ * supported
+ */
+ if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
+ return;
+
+ adaptive_sync->min_vfreq = range->min_vfreq;
+ adaptive_sync->max_vfreq = range->max_vfreq;
+}
+
+static
+void drm_get_adaptive_sync_range(struct drm_connector *connector,
+ const struct edid *edid)
+{
+ struct drm_display_info *info = &connector->display_info;
+
+ if (!version_greater(edid, 1, 1))
+ return;
+
+ drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
+ &info->adaptive_sync);
+
+ DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
+ info->adaptive_sync.min_vfreq,
+ info->adaptive_sync.max_vfreq);
+}
+
/* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
* all of the values which would have been set from EDID
*/
@@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
memset(&info->hdmi, 0, sizeof(info->hdmi));
info->non_desktop = 0;
+ memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
}
u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
@@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
+ drm_get_adaptive_sync_range(connector, edid);
+
DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
if (edid->revision < 3)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 0df7a95ca5d9..2b22c0fa42c4 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -254,6 +254,23 @@ enum drm_panel_orientation {
DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
};
+/**
+ * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
+ * &drm_display_info
+ *
+ * This struct is used to store a Panel's Adaptive Sync capabilities
+ * as parsed from EDID's detailed monitor range descriptor block.
+ *
+ * @min_vfreq: This is the min supported refresh rate in Hz from
+ * EDID's detailed monitor range.
+ * @max_vfreq: This is the max supported refresh rate in Hz from
+ * EDID's detailed monitor range
+ */
+struct drm_adaptive_sync_info {
+ u8 min_vfreq;
+ u8 max_vfreq;
+};
+
/*
* This is a consolidated colorimetry list supported by HDMI and
* DP protocol standard. The respective connectors will register
@@ -473,6 +490,11 @@ struct drm_display_info {
* @non_desktop: Non desktop display (HMD).
*/
bool non_desktop;
+
+ /**
+ * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
+ */
+ struct drm_adaptive_sync_info adaptive_sync;
};
int drm_display_info_set_bus_formats(struct drm_display_info *info,
--
2.19.1
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^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
(?)
(?)
@ 2020-03-06 8:39 ` Patchwork
-1 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-03-06 8:39 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
URL : https://patchwork.freedesktop.org/series/74364/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs'
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
` (2 preceding siblings ...)
(?)
@ 2020-03-06 8:46 ` Patchwork
-1 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-03-06 8:46 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
URL : https://patchwork.freedesktop.org/series/74364/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8074 -> Patchwork_16855
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/index.html
Known issues
------------
Here are the changes found in Patchwork_16855 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@prime_self_import@basic-with_two_bos:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([CI#94] / [i915#402]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
#### Possible fixes ####
* igt@prime_vgem@basic-gtt:
- fi-tgl-y: [DMESG-WARN][3] ([CI#94] / [i915#402]) -> [PASS][4] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/fi-tgl-y/igt@prime_vgem@basic-gtt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/fi-tgl-y/igt@prime_vgem@basic-gtt.html
#### Warnings ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][5] ([fdo#111096] / [i915#323]) -> [FAIL][6] ([fdo#111407])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (50 -> 44)
------------------------------
Additional (1): fi-kbl-7560u
Missing (7): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-x1275 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8074 -> Patchwork_16855
CI-20190529: 20190529
CI_DRM_8074: 0dd63259839ca847514d9999749219635f311015 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5495: 22df72de8affcec22d9f354bb6148d77f60cc580 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16855: 1a34fea554d6ab46b313d6cef1670a292b72e616 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1a34fea554d6 drm/dp: Add function to parse EDID descriptors for adaptive sync limits
50c133bbb0b6 drm/edid: Name the detailed monitor range flags
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/index.html
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^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
@ 2020-03-06 10:30 ` Jani Nikula
-1 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-03-06 10:30 UTC (permalink / raw)
To: Manasi Navare, intel-gfx, dri-devel; +Cc: Kazlauskas Nicholas
On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> This patch adds defines for the detailed monitor
> range flags as per the EDID specification.
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> include/drm/drm_edid.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index f0b03d401c27..f89c97623845 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -91,6 +91,11 @@ struct detailed_data_string {
> u8 str[13];
> } __attribute__((packed));
>
> +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> +#define EDID_CVT_SUPPORT_FLAG 0x04
Bikeshed for consideration:
drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
prefix, and then some with no prefix at all really. Should we start
consolidating on something when we add more?
BR,
Jani.
> +
> struct detailed_data_monitor_range {
> u8 min_vfreq;
> u8 max_vfreq;
--
Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-06 10:30 ` Jani Nikula
0 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-03-06 10:30 UTC (permalink / raw)
To: Manasi Navare, intel-gfx, dri-devel; +Cc: Harry Wentland, Kazlauskas Nicholas
On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> This patch adds defines for the detailed monitor
> range flags as per the EDID specification.
>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> include/drm/drm_edid.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> index f0b03d401c27..f89c97623845 100644
> --- a/include/drm/drm_edid.h
> +++ b/include/drm/drm_edid.h
> @@ -91,6 +91,11 @@ struct detailed_data_string {
> u8 str[13];
> } __attribute__((packed));
>
> +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> +#define EDID_CVT_SUPPORT_FLAG 0x04
Bikeshed for consideration:
drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
prefix, and then some with no prefix at all really. Should we start
consolidating on something when we add more?
BR,
Jani.
> +
> struct detailed_data_monitor_range {
> u8 min_vfreq;
> u8 max_vfreq;
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
@ 2020-03-06 15:02 ` Kazlauskas, Nicholas
-1 siblings, 0 replies; 19+ messages in thread
From: Kazlauskas, Nicholas @ 2020-03-06 15:02 UTC (permalink / raw)
To: Manasi Navare, intel-gfx, dri-devel
On 2020-03-05 8:42 p.m., Manasi Navare wrote:
> Adaptive Sync is a VESA feature so add a DRM core helper to parse
> the EDID's detailed descritors to obtain the adaptive sync monitor range.
> Store this info as part fo drm_display_info so it can be used
> across all drivers.
> This part of the code is stripped out of amdgpu's function
> amdgpu_dm_update_freesync_caps() to make it generic and be used
> across all DRM drivers
>
> v4:
> * Use is_display_descriptor() (Ville)
> * Name the monitor range flags (Ville)
> v3:
> * Remove the edid parsing restriction for just DP (Nicholas)
> * Use drm_for_each_detailed_block (Ville)
> * Make the drm_get_adaptive_sync_range function static (Harry, Jani)
> v2:
> * Change vmin and vmax to use u8 (Ville)
> * Dont store pixel clock since that is just a max dotclock
> and not related to VRR mode (Manasi)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Looks good to me now. I'm fine with whether we want to rename the flags
or not, I don't have much of a preference either way.
Series is:
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Regards,
Nicholas Kazlauskas
> ---
> drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++
> include/drm/drm_connector.h | 22 +++++++++++++++++++
> 2 files changed, 66 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index ad41764a4ebe..61ed544d9535 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
> }
> }
>
> +static
> +void get_adaptive_sync_range(struct detailed_timing *timing,
> + void *info_adaptive_sync)
> +{
> + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
> + const struct detailed_non_pixel *data = &timing->data.other_data;
> + const struct detailed_data_monitor_range *range = &data->data.range;
> +
> + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> + return;
> +
> + /*
> + * Check for flag range limits only. If flag == 1 then
> + * no additional timing information provided.
> + * Default GTF, GTF Secondary curve and CVT are not
> + * supported
> + */
> + if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
> + return;
> +
> + adaptive_sync->min_vfreq = range->min_vfreq;
> + adaptive_sync->max_vfreq = range->max_vfreq;
> +}
> +
> +static
> +void drm_get_adaptive_sync_range(struct drm_connector *connector,
> + const struct edid *edid)
> +{
> + struct drm_display_info *info = &connector->display_info;
> +
> + if (!version_greater(edid, 1, 1))
> + return;
> +
> + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
> + &info->adaptive_sync);
> +
> + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
> + info->adaptive_sync.min_vfreq,
> + info->adaptive_sync.max_vfreq);
> +}
> +
> /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
> * all of the values which would have been set from EDID
> */
> @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
> memset(&info->hdmi, 0, sizeof(info->hdmi));
>
> info->non_desktop = 0;
> + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
> }
>
> u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
> @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
>
> info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
>
> + drm_get_adaptive_sync_range(connector, edid);
> +
> DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
>
> if (edid->revision < 3)
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 0df7a95ca5d9..2b22c0fa42c4 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -254,6 +254,23 @@ enum drm_panel_orientation {
> DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
> };
>
> +/**
> + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
> + * &drm_display_info
> + *
> + * This struct is used to store a Panel's Adaptive Sync capabilities
> + * as parsed from EDID's detailed monitor range descriptor block.
> + *
> + * @min_vfreq: This is the min supported refresh rate in Hz from
> + * EDID's detailed monitor range.
> + * @max_vfreq: This is the max supported refresh rate in Hz from
> + * EDID's detailed monitor range
> + */
> +struct drm_adaptive_sync_info {
> + u8 min_vfreq;
> + u8 max_vfreq;
> +};
> +
> /*
> * This is a consolidated colorimetry list supported by HDMI and
> * DP protocol standard. The respective connectors will register
> @@ -473,6 +490,11 @@ struct drm_display_info {
> * @non_desktop: Non desktop display (HMD).
> */
> bool non_desktop;
> +
> + /**
> + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
> + */
> + struct drm_adaptive_sync_info adaptive_sync;
> };
>
> int drm_display_info_set_bus_formats(struct drm_display_info *info,
>
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^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
@ 2020-03-06 15:02 ` Kazlauskas, Nicholas
0 siblings, 0 replies; 19+ messages in thread
From: Kazlauskas, Nicholas @ 2020-03-06 15:02 UTC (permalink / raw)
To: Manasi Navare, intel-gfx, dri-devel; +Cc: Harry Wentland
On 2020-03-05 8:42 p.m., Manasi Navare wrote:
> Adaptive Sync is a VESA feature so add a DRM core helper to parse
> the EDID's detailed descritors to obtain the adaptive sync monitor range.
> Store this info as part fo drm_display_info so it can be used
> across all drivers.
> This part of the code is stripped out of amdgpu's function
> amdgpu_dm_update_freesync_caps() to make it generic and be used
> across all DRM drivers
>
> v4:
> * Use is_display_descriptor() (Ville)
> * Name the monitor range flags (Ville)
> v3:
> * Remove the edid parsing restriction for just DP (Nicholas)
> * Use drm_for_each_detailed_block (Ville)
> * Make the drm_get_adaptive_sync_range function static (Harry, Jani)
> v2:
> * Change vmin and vmax to use u8 (Ville)
> * Dont store pixel clock since that is just a max dotclock
> and not related to VRR mode (Manasi)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Looks good to me now. I'm fine with whether we want to rename the flags
or not, I don't have much of a preference either way.
Series is:
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Regards,
Nicholas Kazlauskas
> ---
> drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++
> include/drm/drm_connector.h | 22 +++++++++++++++++++
> 2 files changed, 66 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index ad41764a4ebe..61ed544d9535 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
> }
> }
>
> +static
> +void get_adaptive_sync_range(struct detailed_timing *timing,
> + void *info_adaptive_sync)
> +{
> + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
> + const struct detailed_non_pixel *data = &timing->data.other_data;
> + const struct detailed_data_monitor_range *range = &data->data.range;
> +
> + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> + return;
> +
> + /*
> + * Check for flag range limits only. If flag == 1 then
> + * no additional timing information provided.
> + * Default GTF, GTF Secondary curve and CVT are not
> + * supported
> + */
> + if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
> + return;
> +
> + adaptive_sync->min_vfreq = range->min_vfreq;
> + adaptive_sync->max_vfreq = range->max_vfreq;
> +}
> +
> +static
> +void drm_get_adaptive_sync_range(struct drm_connector *connector,
> + const struct edid *edid)
> +{
> + struct drm_display_info *info = &connector->display_info;
> +
> + if (!version_greater(edid, 1, 1))
> + return;
> +
> + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
> + &info->adaptive_sync);
> +
> + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
> + info->adaptive_sync.min_vfreq,
> + info->adaptive_sync.max_vfreq);
> +}
> +
> /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
> * all of the values which would have been set from EDID
> */
> @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
> memset(&info->hdmi, 0, sizeof(info->hdmi));
>
> info->non_desktop = 0;
> + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
> }
>
> u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
> @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
>
> info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
>
> + drm_get_adaptive_sync_range(connector, edid);
> +
> DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
>
> if (edid->revision < 3)
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 0df7a95ca5d9..2b22c0fa42c4 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -254,6 +254,23 @@ enum drm_panel_orientation {
> DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
> };
>
> +/**
> + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
> + * &drm_display_info
> + *
> + * This struct is used to store a Panel's Adaptive Sync capabilities
> + * as parsed from EDID's detailed monitor range descriptor block.
> + *
> + * @min_vfreq: This is the min supported refresh rate in Hz from
> + * EDID's detailed monitor range.
> + * @max_vfreq: This is the max supported refresh rate in Hz from
> + * EDID's detailed monitor range
> + */
> +struct drm_adaptive_sync_info {
> + u8 min_vfreq;
> + u8 max_vfreq;
> +};
> +
> /*
> * This is a consolidated colorimetry list supported by HDMI and
> * DP protocol standard. The respective connectors will register
> @@ -473,6 +490,11 @@ struct drm_display_info {
> * @non_desktop: Non desktop display (HMD).
> */
> bool non_desktop;
> +
> + /**
> + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
> + */
> + struct drm_adaptive_sync_info adaptive_sync;
> };
>
> int drm_display_info_set_bus_formats(struct drm_display_info *info,
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
2020-03-06 10:30 ` Jani Nikula
@ 2020-03-06 18:40 ` Manasi Navare
-1 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-06 18:40 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, Kazlauskas Nicholas, dri-devel
On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
> On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> > This patch adds defines for the detailed monitor
> > range flags as per the EDID specification.
> >
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > include/drm/drm_edid.h | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> > index f0b03d401c27..f89c97623845 100644
> > --- a/include/drm/drm_edid.h
> > +++ b/include/drm/drm_edid.h
> > @@ -91,6 +91,11 @@ struct detailed_data_string {
> > u8 str[13];
> > } __attribute__((packed));
> >
> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> > +#define EDID_CVT_SUPPORT_FLAG 0x04
>
> Bikeshed for consideration:
>
> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
> prefix, and then some with no prefix at all really. Should we start
> consolidating on something when we add more?
>
Yes Jani I did notice the same thing and didnt know which convention
to continue to follow but I noticed that majority of the defines were
just EDID_ so just used that for these new defines.
Is there a particular way you wish to consolidate this and use a specific
convention for #defines?
I can atleast change these new defines based on a preferred convention and then
separate patches to change the rest in .h and corresponding usages in .c files.
Regards
Manasi
> BR,
> Jani.
>
>
> > +
> > struct detailed_data_monitor_range {
> > u8 min_vfreq;
> > u8 max_vfreq;
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-06 18:40 ` Manasi Navare
0 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-06 18:40 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, Harry Wentland, Kazlauskas Nicholas, dri-devel
On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
> On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> > This patch adds defines for the detailed monitor
> > range flags as per the EDID specification.
> >
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> > include/drm/drm_edid.h | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> > index f0b03d401c27..f89c97623845 100644
> > --- a/include/drm/drm_edid.h
> > +++ b/include/drm/drm_edid.h
> > @@ -91,6 +91,11 @@ struct detailed_data_string {
> > u8 str[13];
> > } __attribute__((packed));
> >
> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> > +#define EDID_CVT_SUPPORT_FLAG 0x04
>
> Bikeshed for consideration:
>
> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
> prefix, and then some with no prefix at all really. Should we start
> consolidating on something when we add more?
>
Yes Jani I did notice the same thing and didnt know which convention
to continue to follow but I noticed that majority of the defines were
just EDID_ so just used that for these new defines.
Is there a particular way you wish to consolidate this and use a specific
convention for #defines?
I can atleast change these new defines based on a preferred convention and then
separate patches to change the rest in .h and corresponding usages in .c files.
Regards
Manasi
> BR,
> Jani.
>
>
> > +
> > struct detailed_data_monitor_range {
> > u8 min_vfreq;
> > u8 max_vfreq;
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
2020-03-06 15:02 ` [Intel-gfx] " Kazlauskas, Nicholas
@ 2020-03-06 18:52 ` Mario Kleiner
-1 siblings, 0 replies; 19+ messages in thread
From: Mario Kleiner @ 2020-03-06 18:52 UTC (permalink / raw)
To: Kazlauskas, Nicholas; +Cc: Manasi Navare, intel-gfx, dri-devel
Just as a comment, u8 for max_vfreq in struct drm_adaptive_sync_info
might be not very future proof?
I just read that ASUS announced a "TUF Gaming VG259QM" monitor which
seems to have an adaptive sync range of 48 Hz to 280 Hz, exceeding the
max 255 Hz of u8?
-mario
On Fri, Mar 6, 2020 at 4:02 PM Kazlauskas, Nicholas
<nicholas.kazlauskas@amd.com> wrote:
>
> On 2020-03-05 8:42 p.m., Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to obtain the adaptive sync monitor range.
> > Store this info as part fo drm_display_info so it can be used
> > across all drivers.
> > This part of the code is stripped out of amdgpu's function
> > amdgpu_dm_update_freesync_caps() to make it generic and be used
> > across all DRM drivers
> >
> > v4:
> > * Use is_display_descriptor() (Ville)
> > * Name the monitor range flags (Ville)
> > v3:
> > * Remove the edid parsing restriction for just DP (Nicholas)
> > * Use drm_for_each_detailed_block (Ville)
> > * Make the drm_get_adaptive_sync_range function static (Harry, Jani)
> > v2:
> > * Change vmin and vmax to use u8 (Ville)
> > * Dont store pixel clock since that is just a max dotclock
> > and not related to VRR mode (Manasi)
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>
> Looks good to me now. I'm fine with whether we want to rename the flags
> or not, I don't have much of a preference either way.
>
> Series is:
>
> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
>
> Regards,
> Nicholas Kazlauskas
>
> > ---
> > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++
> > include/drm/drm_connector.h | 22 +++++++++++++++++++
> > 2 files changed, 66 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index ad41764a4ebe..61ed544d9535 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
> > }
> > }
> >
> > +static
> > +void get_adaptive_sync_range(struct detailed_timing *timing,
> > + void *info_adaptive_sync)
> > +{
> > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
> > + const struct detailed_non_pixel *data = &timing->data.other_data;
> > + const struct detailed_data_monitor_range *range = &data->data.range;
> > +
> > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> > + return;
> > +
> > + /*
> > + * Check for flag range limits only. If flag == 1 then
> > + * no additional timing information provided.
> > + * Default GTF, GTF Secondary curve and CVT are not
> > + * supported
> > + */
> > + if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
> > + return;
> > +
> > + adaptive_sync->min_vfreq = range->min_vfreq;
> > + adaptive_sync->max_vfreq = range->max_vfreq;
> > +}
> > +
> > +static
> > +void drm_get_adaptive_sync_range(struct drm_connector *connector,
> > + const struct edid *edid)
> > +{
> > + struct drm_display_info *info = &connector->display_info;
> > +
> > + if (!version_greater(edid, 1, 1))
> > + return;
> > +
> > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
> > + &info->adaptive_sync);
> > +
> > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
> > + info->adaptive_sync.min_vfreq,
> > + info->adaptive_sync.max_vfreq);
> > +}
> > +
> > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
> > * all of the values which would have been set from EDID
> > */
> > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
> > memset(&info->hdmi, 0, sizeof(info->hdmi));
> >
> > info->non_desktop = 0;
> > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
> > }
> >
> > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
> > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
> >
> > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
> >
> > + drm_get_adaptive_sync_range(connector, edid);
> > +
> > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
> >
> > if (edid->revision < 3)
> > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> > index 0df7a95ca5d9..2b22c0fa42c4 100644
> > --- a/include/drm/drm_connector.h
> > +++ b/include/drm/drm_connector.h
> > @@ -254,6 +254,23 @@ enum drm_panel_orientation {
> > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
> > };
> >
> > +/**
> > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
> > + * &drm_display_info
> > + *
> > + * This struct is used to store a Panel's Adaptive Sync capabilities
> > + * as parsed from EDID's detailed monitor range descriptor block.
> > + *
> > + * @min_vfreq: This is the min supported refresh rate in Hz from
> > + * EDID's detailed monitor range.
> > + * @max_vfreq: This is the max supported refresh rate in Hz from
> > + * EDID's detailed monitor range
> > + */
> > +struct drm_adaptive_sync_info {
> > + u8 min_vfreq;
> > + u8 max_vfreq;
> > +};
> > +
> > /*
> > * This is a consolidated colorimetry list supported by HDMI and
> > * DP protocol standard. The respective connectors will register
> > @@ -473,6 +490,11 @@ struct drm_display_info {
> > * @non_desktop: Non desktop display (HMD).
> > */
> > bool non_desktop;
> > +
> > + /**
> > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
> > + */
> > + struct drm_adaptive_sync_info adaptive_sync;
> > };
> >
> > int drm_display_info_set_bus_formats(struct drm_display_info *info,
> >
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
@ 2020-03-06 18:52 ` Mario Kleiner
0 siblings, 0 replies; 19+ messages in thread
From: Mario Kleiner @ 2020-03-06 18:52 UTC (permalink / raw)
To: Kazlauskas, Nicholas; +Cc: intel-gfx, Harry Wentland, dri-devel
Just as a comment, u8 for max_vfreq in struct drm_adaptive_sync_info
might be not very future proof?
I just read that ASUS announced a "TUF Gaming VG259QM" monitor which
seems to have an adaptive sync range of 48 Hz to 280 Hz, exceeding the
max 255 Hz of u8?
-mario
On Fri, Mar 6, 2020 at 4:02 PM Kazlauskas, Nicholas
<nicholas.kazlauskas@amd.com> wrote:
>
> On 2020-03-05 8:42 p.m., Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to obtain the adaptive sync monitor range.
> > Store this info as part fo drm_display_info so it can be used
> > across all drivers.
> > This part of the code is stripped out of amdgpu's function
> > amdgpu_dm_update_freesync_caps() to make it generic and be used
> > across all DRM drivers
> >
> > v4:
> > * Use is_display_descriptor() (Ville)
> > * Name the monitor range flags (Ville)
> > v3:
> > * Remove the edid parsing restriction for just DP (Nicholas)
> > * Use drm_for_each_detailed_block (Ville)
> > * Make the drm_get_adaptive_sync_range function static (Harry, Jani)
> > v2:
> > * Change vmin and vmax to use u8 (Ville)
> > * Dont store pixel clock since that is just a max dotclock
> > and not related to VRR mode (Manasi)
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>
> Looks good to me now. I'm fine with whether we want to rename the flags
> or not, I don't have much of a preference either way.
>
> Series is:
>
> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
>
> Regards,
> Nicholas Kazlauskas
>
> > ---
> > drivers/gpu/drm/drm_edid.c | 44 +++++++++++++++++++++++++++++++++++++
> > include/drm/drm_connector.h | 22 +++++++++++++++++++
> > 2 files changed, 66 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index ad41764a4ebe..61ed544d9535 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
> > }
> > }
> >
> > +static
> > +void get_adaptive_sync_range(struct detailed_timing *timing,
> > + void *info_adaptive_sync)
> > +{
> > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
> > + const struct detailed_non_pixel *data = &timing->data.other_data;
> > + const struct detailed_data_monitor_range *range = &data->data.range;
> > +
> > + if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
> > + return;
> > +
> > + /*
> > + * Check for flag range limits only. If flag == 1 then
> > + * no additional timing information provided.
> > + * Default GTF, GTF Secondary curve and CVT are not
> > + * supported
> > + */
> > + if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
> > + return;
> > +
> > + adaptive_sync->min_vfreq = range->min_vfreq;
> > + adaptive_sync->max_vfreq = range->max_vfreq;
> > +}
> > +
> > +static
> > +void drm_get_adaptive_sync_range(struct drm_connector *connector,
> > + const struct edid *edid)
> > +{
> > + struct drm_display_info *info = &connector->display_info;
> > +
> > + if (!version_greater(edid, 1, 1))
> > + return;
> > +
> > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
> > + &info->adaptive_sync);
> > +
> > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
> > + info->adaptive_sync.min_vfreq,
> > + info->adaptive_sync.max_vfreq);
> > +}
> > +
> > /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
> > * all of the values which would have been set from EDID
> > */
> > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
> > memset(&info->hdmi, 0, sizeof(info->hdmi));
> >
> > info->non_desktop = 0;
> > + memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
> > }
> >
> > u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
> > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
> >
> > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
> >
> > + drm_get_adaptive_sync_range(connector, edid);
> > +
> > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
> >
> > if (edid->revision < 3)
> > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> > index 0df7a95ca5d9..2b22c0fa42c4 100644
> > --- a/include/drm/drm_connector.h
> > +++ b/include/drm/drm_connector.h
> > @@ -254,6 +254,23 @@ enum drm_panel_orientation {
> > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
> > };
> >
> > +/**
> > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
> > + * &drm_display_info
> > + *
> > + * This struct is used to store a Panel's Adaptive Sync capabilities
> > + * as parsed from EDID's detailed monitor range descriptor block.
> > + *
> > + * @min_vfreq: This is the min supported refresh rate in Hz from
> > + * EDID's detailed monitor range.
> > + * @max_vfreq: This is the max supported refresh rate in Hz from
> > + * EDID's detailed monitor range
> > + */
> > +struct drm_adaptive_sync_info {
> > + u8 min_vfreq;
> > + u8 max_vfreq;
> > +};
> > +
> > /*
> > * This is a consolidated colorimetry list supported by HDMI and
> > * DP protocol standard. The respective connectors will register
> > @@ -473,6 +490,11 @@ struct drm_display_info {
> > * @non_desktop: Non desktop display (HMD).
> > */
> > bool non_desktop;
> > +
> > + /**
> > + * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
> > + */
> > + struct drm_adaptive_sync_info adaptive_sync;
> > };
> >
> > int drm_display_info_set_bus_formats(struct drm_display_info *info,
> >
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
` (4 preceding siblings ...)
(?)
@ 2020-03-07 2:53 ` Patchwork
-1 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-03-07 2:53 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
URL : https://patchwork.freedesktop.org/series/74364/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8074_full -> Patchwork_16855_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16855_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16855_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16855_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox:
- shard-iclb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
Known issues
------------
Here are the changes found in Patchwork_16855_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@legacy-engines-mixed-process@blt:
- shard-iclb: [PASS][3] -> [FAIL][4] ([i915#679])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110854])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_balancer@smoke.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +13 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_exec_schedule@independent-bsd2.html
* igt@gem_exec_schedule@pi-common-bsd:
- shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@gem_exec_schedule@pi-common-bsd.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb1/igt@gem_exec_schedule@pi-common-bsd.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +5 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@gem_exec_schedule@wide-bsd.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl6/igt@gem_exec_suspend@basic-s3.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-kbl2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_workarounds@suspend-resume-context:
- shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#69]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl6/igt@gem_workarounds@suspend-resume-context.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl8/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_pm_dc@dc5-dpms:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#447])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb7/igt@i915_pm_dc@dc5-dpms.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html
* igt@i915_selftest@mock@buddy:
- shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#1310] / [i915#1360])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl2/igt@i915_selftest@mock@buddy.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl1/igt@i915_selftest@mock@buddy.html
* igt@kms_frontbuffer_tracking@fbc-tilingchange:
- shard-snb: [PASS][21] -> [SKIP][22] ([fdo#109271])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-snb2/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-snb4/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-skl: [PASS][23] -> [FAIL][24] ([i915#49])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-apl: [PASS][25] -> [DMESG-WARN][26] ([i915#180]) +3 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][27] -> [FAIL][28] ([fdo#108145]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145] / [i915#265])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][33] -> [FAIL][34] ([i915#31])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-apl1/igt@kms_setmode@basic.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-apl2/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-check-all-vcs1:
- shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#112080]) +8 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@perf_pmu@busy-check-all-vcs1.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@perf_pmu@busy-check-all-vcs1.html
#### Possible fixes ####
* igt@gem_ctx_isolation@vcs1-dirty-create:
- shard-iclb: [SKIP][37] ([fdo#112080]) -> [PASS][38] +9 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb3/igt@gem_ctx_isolation@vcs1-dirty-create.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb4/igt@gem_ctx_isolation@vcs1-dirty-create.html
* igt@gem_exec_schedule@implicit-write-read-bsd:
- shard-iclb: [SKIP][39] ([i915#677]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb4/igt@gem_exec_schedule@implicit-write-read-bsd.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb7/igt@gem_exec_schedule@implicit-write-read-bsd.html
* igt@gem_exec_schedule@implicit-write-read-bsd1:
- shard-iclb: [SKIP][41] ([fdo#109276] / [i915#677]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb5/igt@gem_exec_schedule@implicit-write-read-bsd1.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb4/igt@gem_exec_schedule@implicit-write-read-bsd1.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [SKIP][43] ([fdo#109276]) -> [PASS][44] +16 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd1.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@promotion-bsd:
- shard-iclb: [SKIP][45] ([fdo#112146]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb4/igt@gem_exec_schedule@promotion-bsd.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb7/igt@gem_exec_schedule@promotion-bsd.html
* igt@gem_exec_whisper@basic-queues-priority:
- shard-glk: [DMESG-WARN][47] ([i915#118] / [i915#95]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-glk5/igt@gem_exec_whisper@basic-queues-priority.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-glk3/igt@gem_exec_whisper@basic-queues-priority.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][49] ([i915#644]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-glk2/igt@gem_ppgtt@flink-and-close-vma-leak.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-glk8/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@i915_pm_dc@dc5-dpms:
- shard-skl: [INCOMPLETE][51] ([i915#198]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl9/igt@i915_pm_dc@dc5-dpms.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl5/igt@i915_pm_dc@dc5-dpms.html
* igt@i915_suspend@debugfs-reader:
- shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl2/igt@i915_suspend@debugfs-reader.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-kbl6/igt@i915_suspend@debugfs-reader.html
* igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge:
- shard-snb: [SKIP][55] ([fdo#109271]) -> [PASS][56] +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-snb6/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-snb5/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][57] ([fdo#108145] / [i915#265]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][59] ([fdo#109642] / [fdo#111068]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb3/igt@kms_psr2_su@page_flip.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][61] ([fdo#109441]) -> [PASS][62] +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@kms_psr@psr2_suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb2/igt@kms_psr@psr2_suspend.html
* igt@kms_setmode@basic:
- shard-skl: [FAIL][63] ([i915#31]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl8/igt@kms_setmode@basic.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl8/igt@kms_setmode@basic.html
#### Warnings ####
* igt@gem_exec_schedule@pi-userfault-bsd1:
- shard-iclb: [SKIP][65] ([fdo#109276]) -> [INCOMPLETE][66] ([i915#1381])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb3/igt@gem_exec_schedule@pi-userfault-bsd1.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd1.html
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1310]: https://gitlab.freedesktop.org/drm/intel/issues/1310
[i915#1360]: https://gitlab.freedesktop.org/drm/intel/issues/1360
[i915#1381]: https://gitlab.freedesktop.org/drm/intel/issues/1381
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#447]: https://gitlab.freedesktop.org/drm/intel/issues/447
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8074 -> Patchwork_16855
CI-20190529: 20190529
CI_DRM_8074: 0dd63259839ca847514d9999749219635f311015 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5495: 22df72de8affcec22d9f354bb6148d77f60cc580 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16855: 1a34fea554d6ab46b313d6cef1670a292b72e616 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
2020-03-06 18:40 ` Manasi Navare
@ 2020-03-09 8:35 ` Jani Nikula
-1 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-03-09 8:35 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx, Kazlauskas Nicholas, dri-devel
On Fri, 06 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
>> On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
>> > This patch adds defines for the detailed monitor
>> > range flags as per the EDID specification.
>> >
>> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Cc: Harry Wentland <harry.wentland@amd.com>
>> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
>> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
>> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>> > ---
>> > include/drm/drm_edid.h | 5 +++++
>> > 1 file changed, 5 insertions(+)
>> >
>> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
>> > index f0b03d401c27..f89c97623845 100644
>> > --- a/include/drm/drm_edid.h
>> > +++ b/include/drm/drm_edid.h
>> > @@ -91,6 +91,11 @@ struct detailed_data_string {
>> > u8 str[13];
>> > } __attribute__((packed));
>> >
>> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
>> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
>> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
>> > +#define EDID_CVT_SUPPORT_FLAG 0x04
>>
>> Bikeshed for consideration:
>>
>> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
>> prefix, and then some with no prefix at all really. Should we start
>> consolidating on something when we add more?
>>
>
> Yes Jani I did notice the same thing and didnt know which convention
> to continue to follow but I noticed that majority of the defines were
> just EDID_ so just used that for these new defines.
Ah, look again, DRM_EDID_ trumps EDID_ 51 to 15.
> Is there a particular way you wish to consolidate this and use a specific
> convention for #defines?
>
> I can atleast change these new defines based on a preferred convention and then
> separate patches to change the rest in .h and corresponding usages in .c files.
I'd suggest DRM_EDID_ for new ones, perhaps eventually rename old ones.
BR,
Jani.
>
> Regards
> Manasi
>
>> BR,
>> Jani.
>>
>>
>> > +
>> > struct detailed_data_monitor_range {
>> > u8 min_vfreq;
>> > u8 max_vfreq;
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-09 8:35 ` Jani Nikula
0 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-03-09 8:35 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx, Harry Wentland, Kazlauskas Nicholas, dri-devel
On Fri, 06 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
>> On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
>> > This patch adds defines for the detailed monitor
>> > range flags as per the EDID specification.
>> >
>> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Cc: Harry Wentland <harry.wentland@amd.com>
>> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
>> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
>> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>> > ---
>> > include/drm/drm_edid.h | 5 +++++
>> > 1 file changed, 5 insertions(+)
>> >
>> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
>> > index f0b03d401c27..f89c97623845 100644
>> > --- a/include/drm/drm_edid.h
>> > +++ b/include/drm/drm_edid.h
>> > @@ -91,6 +91,11 @@ struct detailed_data_string {
>> > u8 str[13];
>> > } __attribute__((packed));
>> >
>> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
>> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
>> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
>> > +#define EDID_CVT_SUPPORT_FLAG 0x04
>>
>> Bikeshed for consideration:
>>
>> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
>> prefix, and then some with no prefix at all really. Should we start
>> consolidating on something when we add more?
>>
>
> Yes Jani I did notice the same thing and didnt know which convention
> to continue to follow but I noticed that majority of the defines were
> just EDID_ so just used that for these new defines.
Ah, look again, DRM_EDID_ trumps EDID_ 51 to 15.
> Is there a particular way you wish to consolidate this and use a specific
> convention for #defines?
>
> I can atleast change these new defines based on a preferred convention and then
> separate patches to change the rest in .h and corresponding usages in .c files.
I'd suggest DRM_EDID_ for new ones, perhaps eventually rename old ones.
BR,
Jani.
>
> Regards
> Manasi
>
>> BR,
>> Jani.
>>
>>
>> > +
>> > struct detailed_data_monitor_range {
>> > u8 min_vfreq;
>> > u8 max_vfreq;
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
2020-03-09 8:35 ` Jani Nikula
@ 2020-03-09 20:34 ` Manasi Navare
-1 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-09 20:34 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, Kazlauskas Nicholas, dri-devel
On Mon, Mar 09, 2020 at 10:35:52AM +0200, Jani Nikula wrote:
> On Fri, 06 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> > On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
> >> On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> >> > This patch adds defines for the detailed monitor
> >> > range flags as per the EDID specification.
> >> >
> >> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> > Cc: Harry Wentland <harry.wentland@amd.com>
> >> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> >> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> >> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> >> > ---
> >> > include/drm/drm_edid.h | 5 +++++
> >> > 1 file changed, 5 insertions(+)
> >> >
> >> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> >> > index f0b03d401c27..f89c97623845 100644
> >> > --- a/include/drm/drm_edid.h
> >> > +++ b/include/drm/drm_edid.h
> >> > @@ -91,6 +91,11 @@ struct detailed_data_string {
> >> > u8 str[13];
> >> > } __attribute__((packed));
> >> >
> >> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> >> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> >> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> >> > +#define EDID_CVT_SUPPORT_FLAG 0x04
> >>
> >> Bikeshed for consideration:
> >>
> >> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
> >> prefix, and then some with no prefix at all really. Should we start
> >> consolidating on something when we add more?
> >>
> >
> > Yes Jani I did notice the same thing and didnt know which convention
> > to continue to follow but I noticed that majority of the defines were
> > just EDID_ so just used that for these new defines.
>
> Ah, look again, DRM_EDID_ trumps EDID_ 51 to 15.
>
> > Is there a particular way you wish to consolidate this and use a specific
> > convention for #defines?
> >
> > I can atleast change these new defines based on a preferred convention and then
> > separate patches to change the rest in .h and corresponding usages in .c files.
>
> I'd suggest DRM_EDID_ for new ones, perhaps eventually rename old ones.
Okay cool, I will rename this to be DRM_EDID_ and then work on renaming others later
Thanks for pointing this out.
Regards
Manasi
>
> BR,
> Jani.
>
>
> >
> > Regards
> > Manasi
> >
> >> BR,
> >> Jani.
> >>
> >>
> >> > +
> >> > struct detailed_data_monitor_range {
> >> > u8 min_vfreq;
> >> > u8 max_vfreq;
> >>
> >> --
> >> Jani Nikula, Intel Open Source Graphics Center
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
@ 2020-03-09 20:34 ` Manasi Navare
0 siblings, 0 replies; 19+ messages in thread
From: Manasi Navare @ 2020-03-09 20:34 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, Harry Wentland, Kazlauskas Nicholas, dri-devel
On Mon, Mar 09, 2020 at 10:35:52AM +0200, Jani Nikula wrote:
> On Fri, 06 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> > On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
> >> On Thu, 05 Mar 2020, Manasi Navare <manasi.d.navare@intel.com> wrote:
> >> > This patch adds defines for the detailed monitor
> >> > range flags as per the EDID specification.
> >> >
> >> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> > Cc: Harry Wentland <harry.wentland@amd.com>
> >> > Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
> >> > Cc: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com>
> >> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> >> > ---
> >> > include/drm/drm_edid.h | 5 +++++
> >> > 1 file changed, 5 insertions(+)
> >> >
> >> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> >> > index f0b03d401c27..f89c97623845 100644
> >> > --- a/include/drm/drm_edid.h
> >> > +++ b/include/drm/drm_edid.h
> >> > @@ -91,6 +91,11 @@ struct detailed_data_string {
> >> > u8 str[13];
> >> > } __attribute__((packed));
> >> >
> >> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> >> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> >> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> >> > +#define EDID_CVT_SUPPORT_FLAG 0x04
> >>
> >> Bikeshed for consideration:
> >>
> >> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
> >> prefix, and then some with no prefix at all really. Should we start
> >> consolidating on something when we add more?
> >>
> >
> > Yes Jani I did notice the same thing and didnt know which convention
> > to continue to follow but I noticed that majority of the defines were
> > just EDID_ so just used that for these new defines.
>
> Ah, look again, DRM_EDID_ trumps EDID_ 51 to 15.
>
> > Is there a particular way you wish to consolidate this and use a specific
> > convention for #defines?
> >
> > I can atleast change these new defines based on a preferred convention and then
> > separate patches to change the rest in .h and corresponding usages in .c files.
>
> I'd suggest DRM_EDID_ for new ones, perhaps eventually rename old ones.
Okay cool, I will rename this to be DRM_EDID_ and then work on renaming others later
Thanks for pointing this out.
Regards
Manasi
>
> BR,
> Jani.
>
>
> >
> > Regards
> > Manasi
> >
> >> BR,
> >> Jani.
> >>
> >>
> >> > +
> >> > struct detailed_data_monitor_range {
> >> > u8 min_vfreq;
> >> > u8 max_vfreq;
> >>
> >> --
> >> Jani Nikula, Intel Open Source Graphics Center
>
> --
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2020-03-09 20:33 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-06 1:42 [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags Manasi Navare
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
2020-03-06 1:42 ` [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare
2020-03-06 1:42 ` [Intel-gfx] " Manasi Navare
2020-03-06 15:02 ` Kazlauskas, Nicholas
2020-03-06 15:02 ` [Intel-gfx] " Kazlauskas, Nicholas
2020-03-06 18:52 ` Mario Kleiner
2020-03-06 18:52 ` Mario Kleiner
2020-03-06 8:39 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags Patchwork
2020-03-06 8:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-06 10:30 ` [Intel-gfx] [PATCH v4 1/2] " Jani Nikula
2020-03-06 10:30 ` Jani Nikula
2020-03-06 18:40 ` Manasi Navare
2020-03-06 18:40 ` Manasi Navare
2020-03-09 8:35 ` Jani Nikula
2020-03-09 8:35 ` Jani Nikula
2020-03-09 20:34 ` Manasi Navare
2020-03-09 20:34 ` Manasi Navare
2020-03-07 2:53 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/2] " Patchwork
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