All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Only swap to a random sibling once upon creation
Date: Mon, 13 Jul 2020 17:14:37 +0100	[thread overview]
Message-ID: <9ff03777-4411-5c60-9c78-1d5be3252915@linux.intel.com> (raw)
In-Reply-To: <20200713160549.17344-1-chris@chris-wilson.co.uk>


On 13/07/2020 17:05, Chris Wilson wrote:
> The danger in switching at random upon intel_context_pin is that the
> context may still actually be inflight, as it will not be scheduled out
> until a context switch after it is complete -- that is after we do a
> final intel_context_unpin.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2118
> Fixes: 6d06779e8672 ("drm/i915: Load balancing across a virtual engine")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: <stable@vger.kernel.org> # v5.3+
> ---
>   drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++--------------
>   1 file changed, 4 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index cd4262cc96e2..f4658849b08a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -5435,13 +5435,8 @@ static void virtual_engine_initial_hint(struct virtual_engine *ve)
>   	 * typically be the first we inspect for submission.
>   	 */
>   	swp = prandom_u32_max(ve->num_siblings);
> -	if (!swp)
> -		return;
> -
> -	swap(ve->siblings[swp], ve->siblings[0]);
> -	if (!intel_engine_has_relative_mmio(ve->siblings[0]))
> -		virtual_update_register_offsets(ve->context.lrc_reg_state,
> -						ve->siblings[0]);
> +	if (swp)
> +		swap(ve->siblings[swp], ve->siblings[0]);
>   }
>   
>   static int virtual_context_alloc(struct intel_context *ce)
> @@ -5454,15 +5449,9 @@ static int virtual_context_alloc(struct intel_context *ce)
>   static int virtual_context_pin(struct intel_context *ce)
>   {
>   	struct virtual_engine *ve = container_of(ce, typeof(*ve), context);
> -	int err;
>   
>   	/* Note: we must use a real engine class for setting up reg state */
> -	err = __execlists_context_pin(ce, ve->siblings[0]);
> -	if (err)
> -		return err;
> -
> -	virtual_engine_initial_hint(ve);
> -	return 0;
> +	return __execlists_context_pin(ce, ve->siblings[0]);
>   }
>   
>   static void virtual_context_enter(struct intel_context *ce)
> @@ -5808,6 +5797,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
>   
>   	ve->base.flags |= I915_ENGINE_IS_VIRTUAL;
>   
> +	virtual_engine_initial_hint(ve);
>   	return &ve->context;
>   
>   err_put:
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

WARNING: multiple messages have this Message-ID (diff)
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Only swap to a random sibling once upon creation
Date: Mon, 13 Jul 2020 17:14:37 +0100	[thread overview]
Message-ID: <9ff03777-4411-5c60-9c78-1d5be3252915@linux.intel.com> (raw)
In-Reply-To: <20200713160549.17344-1-chris@chris-wilson.co.uk>


On 13/07/2020 17:05, Chris Wilson wrote:
> The danger in switching at random upon intel_context_pin is that the
> context may still actually be inflight, as it will not be scheduled out
> until a context switch after it is complete -- that is after we do a
> final intel_context_unpin.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2118
> Fixes: 6d06779e8672 ("drm/i915: Load balancing across a virtual engine")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: <stable@vger.kernel.org> # v5.3+
> ---
>   drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++++--------------
>   1 file changed, 4 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index cd4262cc96e2..f4658849b08a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -5435,13 +5435,8 @@ static void virtual_engine_initial_hint(struct virtual_engine *ve)
>   	 * typically be the first we inspect for submission.
>   	 */
>   	swp = prandom_u32_max(ve->num_siblings);
> -	if (!swp)
> -		return;
> -
> -	swap(ve->siblings[swp], ve->siblings[0]);
> -	if (!intel_engine_has_relative_mmio(ve->siblings[0]))
> -		virtual_update_register_offsets(ve->context.lrc_reg_state,
> -						ve->siblings[0]);
> +	if (swp)
> +		swap(ve->siblings[swp], ve->siblings[0]);
>   }
>   
>   static int virtual_context_alloc(struct intel_context *ce)
> @@ -5454,15 +5449,9 @@ static int virtual_context_alloc(struct intel_context *ce)
>   static int virtual_context_pin(struct intel_context *ce)
>   {
>   	struct virtual_engine *ve = container_of(ce, typeof(*ve), context);
> -	int err;
>   
>   	/* Note: we must use a real engine class for setting up reg state */
> -	err = __execlists_context_pin(ce, ve->siblings[0]);
> -	if (err)
> -		return err;
> -
> -	virtual_engine_initial_hint(ve);
> -	return 0;
> +	return __execlists_context_pin(ce, ve->siblings[0]);
>   }
>   
>   static void virtual_context_enter(struct intel_context *ce)
> @@ -5808,6 +5797,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
>   
>   	ve->base.flags |= I915_ENGINE_IS_VIRTUAL;
>   
> +	virtual_engine_initial_hint(ve);
>   	return &ve->context;
>   
>   err_put:
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-07-13 16:14 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-13 16:05 [PATCH] drm/i915/gt: Only swap to a random sibling once upon creation Chris Wilson
2020-07-13 16:05 ` [Intel-gfx] " Chris Wilson
2020-07-13 16:14 ` Tvrtko Ursulin [this message]
2020-07-13 16:14   ` Tvrtko Ursulin
2020-07-13 16:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-07-13 18:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=9ff03777-4411-5c60-9c78-1d5be3252915@linux.intel.com \
    --to=tvrtko.ursulin@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.