All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Liu, Yi L" <yi.l.liu@intel.com>
To: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
	Joerg Roedel <joro@8bytes.org>
Cc: "Tian, Kevin" <kevin.tian@intel.com>,
	"Raj, Ashok" <ashok.raj@intel.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"ilias.apalodimas@linaro.org" <ilias.apalodimas@linaro.org>,
	Will Deacon <Will.Deacon@arm.com>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"okaya@codeaurora.org" <okaya@codeaurora.org>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"liguozhu@hisilicon.com" <liguozhu@hisilicon.com>,
	"christian.koenig@amd.com" <christian.koenig@amd.com>,
	Robin Murphy <Robin.Murphy@arm.com>,
	"Liu, Yi L" <yi.l.liu@intel.com>
Subject: RE: [PATCH v3 03/10] iommu/sva: Manage process address spaces
Date: Thu, 27 Sep 2018 03:22:46 +0000	[thread overview]
Message-ID: <A2975661238FB949B60364EF0F2C257439D0CC48@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <1f53c6f1-4e7a-1451-1abc-a7bca4a2359d@arm.com>

> From: iommu-bounces@lists.linux-foundation.org [mailto:iommu-
> bounces@lists.linux-foundation.org] On Behalf Of Jean-Philippe Brucker
> Sent: Wednesday, September 26, 2018 9:50 PM
> Subject: Re: [PATCH v3 03/10] iommu/sva: Manage process address spaces
> 
> On 26/09/2018 13:45, Joerg Roedel wrote:
> > On Wed, Sep 26, 2018 at 11:20:34AM +0100, Jean-Philippe Brucker wrote:
> >> Yes, at the moment it's difficult to guess what device drivers will
> >> want, but I can imagine some driver offering SVA to userspace, while
> >> keeping a few PASIDs for themselves to map kernel memory. Or create mdev
> >> devices for virtualization while also allowing bare-metal SVA. So I
> >> think we should aim at enabling these use-cases in parallel, even if it
> >> doesn't necessarily need to be possible right now.
> >
> > Yeah okay, but allowing these use-cases in parallel basically disallows
> > giving any guest control over a device's pasid-table, no?
> All of these use-cases require the host to manage the PASID tables, so
> while any one of them is enabled, we can't give a guest control over the
> PASID tables. But allowing these use-cases in parallel doesn't change that.
> 
> There is an ambiguity: I understand "(3) SVA in VM guest" as SVA for a
> device-assignable interface assigned to a guest, using vfio-mdev and the
> new Intel vt-d architecture (right?). That case does require the host to
> allocate and manage PASIDs (because the PCI device is shared between
> multiple VMs).

Correct. For such case, we give host the charge to allocate and manage PASIDs.
And the reason is correct.

> 
> For the "classic" vfio-pci case, "SVA in guest" still means giving the
> guest control over the whole PASID table.

No, if giving guest control over the whole PASID table, it means guest may have
its own PASID namespace. right? And for vfio-mdev case, it gets PASID from host.
So there would be multiple PASID namespaces. Thinking about the following scenario:

A PF/VF assigned to a VM via "classic" vfio-pci. And an assignable-device-interface
assigned to this VM via vfio-mdev. If an application in this VM tries to manipulate
these two "devices", it should have the same PASID programmed to them. right?
But as the above comments mentioned, for vfio-pci case, it would get a PASID from
its own PASID namespace. While the vfio-mdev case would get a PASID from host.
This would result in conflict.

So I would like we get host to allocate and manage the whole PASID table, so that
to cover possible combinations of vfio-pci passthru and vfio-mdev passthru.

> 
> Thanks,
> Jean

Regards,
Yi Liu

WARNING: multiple messages have this Message-ID (diff)
From: "Liu, Yi L" <yi.l.liu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: Jean-Philippe Brucker
	<jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>,
	Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
Cc: "Tian,
	Kevin" <kevin.tian-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"Raj, Ashok" <ashok.raj-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
	"linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org"
	<ilias.apalodimas-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>,
	"alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org"
	<alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
	"okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org"
	<okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	"iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org"
	<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
	"liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org"
	<liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
	"christian.koenig-5C7GfCeVMHo@public.gmane.org"
	<christian.koenig-5C7GfCeVMHo@public.gmane.org>,
	Robin Murphy <Robin.Murphy-5wv7dgnIgG8@public.gmane.org>
Subject: RE: [PATCH v3 03/10] iommu/sva: Manage process address spaces
Date: Thu, 27 Sep 2018 03:22:46 +0000	[thread overview]
Message-ID: <A2975661238FB949B60364EF0F2C257439D0CC48@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <1f53c6f1-4e7a-1451-1abc-a7bca4a2359d-5wv7dgnIgG8@public.gmane.org>

> From: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org [mailto:iommu-
> bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org] On Behalf Of Jean-Philippe Brucker
> Sent: Wednesday, September 26, 2018 9:50 PM
> Subject: Re: [PATCH v3 03/10] iommu/sva: Manage process address spaces
> 
> On 26/09/2018 13:45, Joerg Roedel wrote:
> > On Wed, Sep 26, 2018 at 11:20:34AM +0100, Jean-Philippe Brucker wrote:
> >> Yes, at the moment it's difficult to guess what device drivers will
> >> want, but I can imagine some driver offering SVA to userspace, while
> >> keeping a few PASIDs for themselves to map kernel memory. Or create mdev
> >> devices for virtualization while also allowing bare-metal SVA. So I
> >> think we should aim at enabling these use-cases in parallel, even if it
> >> doesn't necessarily need to be possible right now.
> >
> > Yeah okay, but allowing these use-cases in parallel basically disallows
> > giving any guest control over a device's pasid-table, no?
> All of these use-cases require the host to manage the PASID tables, so
> while any one of them is enabled, we can't give a guest control over the
> PASID tables. But allowing these use-cases in parallel doesn't change that.
> 
> There is an ambiguity: I understand "(3) SVA in VM guest" as SVA for a
> device-assignable interface assigned to a guest, using vfio-mdev and the
> new Intel vt-d architecture (right?). That case does require the host to
> allocate and manage PASIDs (because the PCI device is shared between
> multiple VMs).

Correct. For such case, we give host the charge to allocate and manage PASIDs.
And the reason is correct.

> 
> For the "classic" vfio-pci case, "SVA in guest" still means giving the
> guest control over the whole PASID table.

No, if giving guest control over the whole PASID table, it means guest may have
its own PASID namespace. right? And for vfio-mdev case, it gets PASID from host.
So there would be multiple PASID namespaces. Thinking about the following scenario:

A PF/VF assigned to a VM via "classic" vfio-pci. And an assignable-device-interface
assigned to this VM via vfio-mdev. If an application in this VM tries to manipulate
these two "devices", it should have the same PASID programmed to them. right?
But as the above comments mentioned, for vfio-pci case, it would get a PASID from
its own PASID namespace. While the vfio-mdev case would get a PASID from host.
This would result in conflict.

So I would like we get host to allocate and manage the whole PASID table, so that
to cover possible combinations of vfio-pci passthru and vfio-mdev passthru.

> 
> Thanks,
> Jean

Regards,
Yi Liu

  reply	other threads:[~2018-09-27  3:24 UTC|newest]

Thread overview: 87+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-20 17:00 [PATCH v3 00/10] Shared Virtual Addressing for the IOMMU Jean-Philippe Brucker
2018-09-20 17:00 ` Jean-Philippe Brucker
2018-09-20 17:00 ` [PATCH v3 01/10] iommu: Introduce Shared Virtual Addressing API Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
     [not found]   ` <20180920170046.20154-2-jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
2018-09-23  2:39     ` Lu Baolu
2018-09-24 12:07       ` Jean-Philippe Brucker
2018-09-24 12:07         ` Jean-Philippe Brucker
2018-09-25 13:16       ` Joerg Roedel
2018-09-25 13:16         ` Joerg Roedel
2018-09-25 22:46         ` Jacob Pan
2018-09-25 22:46           ` Jacob Pan
2018-09-26 10:14           ` Jean-Philippe Brucker
2018-09-26 10:14             ` Jean-Philippe Brucker
2018-09-26 12:48           ` Joerg Roedel
2018-09-26 12:48             ` Joerg Roedel
2018-09-20 17:00 ` [PATCH v3 02/10] iommu/sva: Bind process address spaces to devices Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-23  3:05   ` Lu Baolu
2018-09-23  3:05     ` Lu Baolu
2018-09-24 12:07     ` Jean-Philippe Brucker
2018-09-24 12:07       ` Jean-Philippe Brucker
2018-09-26 18:01       ` Jacob Pan
2018-09-26 18:01         ` Jacob Pan
2018-09-27 15:06         ` Jean-Philippe Brucker
2018-09-27 15:06           ` Jean-Philippe Brucker
2018-09-28  1:14           ` Tian, Kevin
2018-09-28  1:14             ` Tian, Kevin
2018-09-20 17:00 ` [PATCH v3 03/10] iommu/sva: Manage process address spaces Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-25  3:15   ` Lu Baolu
2018-09-25  3:15     ` Lu Baolu
2018-09-25 10:32     ` Jean-Philippe Brucker
2018-09-25 10:32       ` Jean-Philippe Brucker
2018-09-26  3:12       ` Lu Baolu
2018-09-26  3:12         ` Lu Baolu
2018-09-25 13:26     ` Joerg Roedel
2018-09-25 13:26       ` Joerg Roedel
2018-09-25 23:33       ` Lu Baolu
2018-09-25 23:33         ` Lu Baolu
2018-09-26 10:20         ` Jean-Philippe Brucker
2018-09-26 10:20           ` Jean-Philippe Brucker
2018-09-26 12:45           ` Joerg Roedel
2018-09-26 12:45             ` Joerg Roedel
2018-09-26 13:50             ` Jean-Philippe Brucker
2018-09-26 13:50               ` Jean-Philippe Brucker
2018-09-27  3:22               ` Liu, Yi L [this message]
2018-09-27  3:22                 ` Liu, Yi L
2018-09-27 13:37                 ` Jean-Philippe Brucker
2018-09-27 13:37                   ` Jean-Philippe Brucker
2018-10-08  8:29                   ` Liu, Yi L
2018-10-08  8:29                     ` Liu, Yi L
2018-09-26 22:58             ` Jacob Pan
2018-09-26 22:58               ` Jacob Pan
2018-09-26 22:35   ` Jacob Pan
2018-09-26 22:35     ` Jacob Pan
2018-10-03 17:52     ` Jean-Philippe Brucker
2018-10-03 17:52       ` Jean-Philippe Brucker
2018-10-15 20:53       ` Jacob Pan
2018-10-15 20:53         ` Jacob Pan
2018-09-20 17:00 ` [PATCH v3 04/10] iommu/sva: Add a mm_exit callback for device drivers Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-20 17:00 ` [PATCH v3 05/10] iommu/sva: Track mm changes with an MMU notifier Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-20 17:00 ` [PATCH v3 06/10] iommu/sva: Search mm by PASID Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-25  4:59   ` Lu Baolu
2018-09-25  4:59     ` Lu Baolu
2018-09-20 17:00 ` [PATCH v3 07/10] iommu: Add a page fault handler Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-27 20:37   ` Jacob Pan
2018-09-27 20:37     ` Jacob Pan
2018-10-03 17:46     ` Jean-Philippe Brucker
2018-10-03 17:46       ` Jean-Philippe Brucker
2018-09-20 17:00 ` [PATCH v3 08/10] iommu/iopf: Handle mm faults Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-20 17:00 ` [PATCH v3 09/10] iommu/sva: Register page fault handler Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-09-20 17:00 ` [RFC PATCH v3 10/10] iommu/sva: Add support for private PASIDs Jean-Philippe Brucker
2018-09-20 17:00   ` Jean-Philippe Brucker
2018-10-12 14:32   ` Jordan Crouse
2018-10-12 14:32     ` Jordan Crouse
2018-10-17 14:21     ` Jean-Philippe Brucker
2018-10-17 14:21       ` Jean-Philippe Brucker
2018-10-17 14:24       ` Jean-Philippe Brucker
2018-10-17 14:24         ` Jean-Philippe Brucker
2018-10-17 15:07       ` Jordan Crouse
2018-10-17 15:07         ` Jordan Crouse

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=A2975661238FB949B60364EF0F2C257439D0CC48@SHSMSX104.ccr.corp.intel.com \
    --to=yi.l.liu@intel.com \
    --cc=Robin.Murphy@arm.com \
    --cc=Will.Deacon@arm.com \
    --cc=alex.williamson@redhat.com \
    --cc=ashok.raj@intel.com \
    --cc=christian.koenig@amd.com \
    --cc=ilias.apalodimas@linaro.org \
    --cc=iommu@lists.linux-foundation.org \
    --cc=jean-philippe.brucker@arm.com \
    --cc=joro@8bytes.org \
    --cc=kevin.tian@intel.com \
    --cc=liguozhu@hisilicon.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=okaya@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.