From: Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com> To: Jose Abreu <Jose.Abreu@synopsys.com>, "dan.j.williams@intel.com" <dan.j.williams@intel.com>, "vinod.koul@intel.com" <vinod.koul@intel.com>, "michal.simek@xilinx.com" <michal.simek@xilinx.com>, Soren Brinkmann <sorenb@xilinx.com>, "moritz.fischer@ettus.com" <moritz.fischer@ettus.com>, "laurent.pinchart@ideasonboard.com" <laurent.pinchart@ideasonboard.com>, "luis@debethencourt.com" <luis@debethencourt.com>, Anirudha Sarangi <anirudh@xilinx.com> Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org> Subject: RE: [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor Date: Thu, 15 Dec 2016 18:49:50 +0000 [thread overview] Message-ID: <C246CAC1457055469EF09E3A7AC4E11A4A65C9B9@XAP-PVEXMBX01.xlnx.xilinx.com> (raw) In-Reply-To: <5f667b4f-b1f3-df34-ec0d-b62061328642@synopsys.com> Hi Jose Miguel Abreu, Thanks for the review... > > + chan->idle = true; > > > > spin_lock_init(&chan->lock); > > INIT_LIST_HEAD(&chan->pending_list); > > I think there is missing a set to true in idle when a channel reset is performed. > Otherwise: Reviewed-by: Jose Abreu <joabreu@synopsys.com> Sure will fix in v2... Regards, Kedar. > > Best regards, > Jose Miguel Abreu
WARNING: multiple messages have this Message-ID (diff)
From: appana.durga.rao@xilinx.com (Appana Durga Kedareswara Rao) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor Date: Thu, 15 Dec 2016 18:49:50 +0000 [thread overview] Message-ID: <C246CAC1457055469EF09E3A7AC4E11A4A65C9B9@XAP-PVEXMBX01.xlnx.xilinx.com> (raw) In-Reply-To: <5f667b4f-b1f3-df34-ec0d-b62061328642@synopsys.com> Hi Jose Miguel Abreu, Thanks for the review... > > + chan->idle = true; > > > > spin_lock_init(&chan->lock); > > INIT_LIST_HEAD(&chan->pending_list); > > I think there is missing a set to true in idle when a channel reset is performed. > Otherwise: Reviewed-by: Jose Abreu <joabreu@synopsys.com> Sure will fix in v2... Regards, Kedar. > > Best regards, > Jose Miguel Abreu
next prev parent reply other threads:[~2016-12-15 18:52 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-12-15 15:11 [PATCH 0/3] dmaengine: xilinx_dma: Bug fixes Kedareswara rao Appana 2016-12-15 15:11 ` Kedareswara rao Appana 2016-12-15 15:11 ` [PATCH 1/3] dmaengine: xilinx_dma: Check for channel idle state before submitting dma descriptor Kedareswara rao Appana 2016-12-15 15:11 ` Kedareswara rao Appana 2016-12-15 15:45 ` Jose Abreu 2016-12-15 15:45 ` Jose Abreu 2016-12-15 18:49 ` Appana Durga Kedareswara Rao [this message] 2016-12-15 18:49 ` Appana Durga Kedareswara Rao 2016-12-16 15:35 ` Laurent Pinchart 2016-12-16 15:35 ` Laurent Pinchart 2016-12-19 15:39 ` Appana Durga Kedareswara Rao 2016-12-19 15:39 ` Appana Durga Kedareswara Rao 2016-12-19 17:18 ` Laurent Pinchart 2016-12-19 17:18 ` Laurent Pinchart 2016-12-23 8:49 ` Appana Durga Kedareswara Rao 2016-12-23 8:49 ` Appana Durga Kedareswara Rao 2016-12-15 15:11 ` [PATCH 2/3] dmaeninge: xilinx_dma: Fix bug in multiple frame stores scenario in vdma Kedareswara rao Appana 2016-12-15 15:11 ` Kedareswara rao Appana 2016-12-15 16:10 ` Jose Abreu 2016-12-15 16:10 ` Jose Abreu 2016-12-15 19:09 ` Appana Durga Kedareswara Rao 2016-12-15 19:09 ` Appana Durga Kedareswara Rao 2016-12-16 10:11 ` Jose Abreu 2016-12-16 10:11 ` Jose Abreu 2016-12-19 15:40 ` Appana Durga Kedareswara Rao 2016-12-19 15:40 ` Appana Durga Kedareswara Rao 2016-12-16 15:54 ` Laurent Pinchart 2016-12-16 15:54 ` Laurent Pinchart 2016-12-19 15:41 ` Appana Durga Kedareswara Rao 2016-12-19 15:41 ` Appana Durga Kedareswara Rao 2016-12-15 15:11 ` [PATCH 3/3] dmaengine: xilinx_dma: Fix race condition in the driver for multiple descriptor scenario Kedareswara rao Appana 2016-12-15 15:11 ` Kedareswara rao Appana
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