[PATCH 1/3] drm/amdgpu/display: set gpu vm flag for all asics which support it

[PATCH 1/3] drm/amdgpu/display: set gpu vm flag for all asics which support it

[Alex Deucher]

It won't get used unless the driver allows the gtt domain for
display buffers which is controlled elsewhere.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 1123f9ce86ee..fdf4d202ea1f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -906,13 +906,15 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
 	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
-	/*
-	 * TODO debug why this doesn't work on Raven
-	 */
-	if (adev->flags & AMD_IS_APU &&
-	    adev->asic_type >= CHIP_CARRIZO &&
-	    adev->asic_type < CHIP_RAVEN)
+	switch (adev->asic_type) {
+	case CHIP_CARRIZO:
+	case CHIP_STONEY:
+	case CHIP_RAVEN:
 		init_data.flags.gpu_vm_support = true;
+		break;
+	default:
+		break;
+	}
 
 	if (amdgpu_dc_feature_mask & DC_FBC_MASK)
 		init_data.flags.fbc_support = true;
-- 
2.24.1

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[PATCH 2/3] drm/amdgpu: enable S/G display on PCO and RV2 (v2)

[Alex Deucher]

It should work on all Raven variants, but some users have
reported issues with original Raven with IOMMU enabled.
So far there have been no issues observed with PCO or RV2.

v2: split out the dm init and domain changes into separate
    patches.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 22 +++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 78733af5cc85..ca9056b0472a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -513,13 +513,23 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,
 	 * will not allow USWC mappings.
 	 * Also, don't allow GTT domain if the BO doens't have USWC falg set.
 	 */
-	if (adev->asic_type >= CHIP_CARRIZO &&
-	    adev->asic_type < CHIP_RAVEN &&
-	    (adev->flags & AMD_IS_APU) &&
-	    (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
+	if ((bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC) &&
 	    amdgpu_bo_support_uswc(bo_flags) &&
-	    amdgpu_device_asic_has_dc_support(adev->asic_type))
-		domain |= AMDGPU_GEM_DOMAIN_GTT;
+	    amdgpu_device_asic_has_dc_support(adev->asic_type)) {
+		switch (adev->asic_type) {
+		case CHIP_CARRIZO:
+		case CHIP_STONEY:
+			domain |= AMDGPU_GEM_DOMAIN_GTT;
+			break;
+		case CHIP_RAVEN:
+			/* enable S/G on PCO and RV2 */
+			if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8)
+				domain |= AMDGPU_GEM_DOMAIN_GTT;
+			break;
+		default:
+			break;
+		}
+	}
 #endif
 
 	return domain;
-- 
2.24.1

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[PATCH 3/3] drm/amdgpu/display: set gpu vm flag for renoir

[Alex Deucher]

It won't get used unless the driver allows the gtt domain for
display buffers which is controlled elsewhere.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index fdf4d202ea1f..d0c9a5725813 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -910,6 +910,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 	case CHIP_CARRIZO:
 	case CHIP_STONEY:
 	case CHIP_RAVEN:
+	case CHIP_RENOIR:
 		init_data.flags.gpu_vm_support = true;
 		break;
 	default:
-- 
2.24.1

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Re: [PATCH 3/3] drm/amdgpu/display: set gpu vm flag for renoir

[Harry Wentland]

Patches 1 & 3 are
Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Patch 2 is
Acked-by: Harry Wentland <harry.wentland@amd.com>

Harry

On 2020-01-08 5:49 p.m., Alex Deucher wrote:
> It won't get used unless the driver allows the gtt domain for
> display buffers which is controlled elsewhere.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index fdf4d202ea1f..d0c9a5725813 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -910,6 +910,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>  	case CHIP_CARRIZO:
>  	case CHIP_STONEY:
>  	case CHIP_RAVEN:
> +	case CHIP_RENOIR:
>  		init_data.flags.gpu_vm_support = true;
>  		break;
>  	default:
> 
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Re: [PATCH 1/3] drm/amdgpu/display: set gpu vm flag for all asics which support it

[Huang Rui]

On Wed, Jan 08, 2020 at 05:49:08PM -0500, Alex Deucher wrote:
> It won't get used unless the driver allows the gtt domain for
> display buffers which is controlled elsewhere.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Series are Acked-by: Huang Rui <ray.huang@amd.com>

Any suggestion for testing, I would like to give a try in my renoir
platform.

Thanks,
Ray

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1123f9ce86ee..fdf4d202ea1f 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -906,13 +906,15 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>  
>  	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>  
> -	/*
> -	 * TODO debug why this doesn't work on Raven
> -	 */
> -	if (adev->flags & AMD_IS_APU &&
> -	    adev->asic_type >= CHIP_CARRIZO &&
> -	    adev->asic_type < CHIP_RAVEN)
> +	switch (adev->asic_type) {
> +	case CHIP_CARRIZO:
> +	case CHIP_STONEY:
> +	case CHIP_RAVEN:
>  		init_data.flags.gpu_vm_support = true;
> +		break;
> +	default:
> +		break;
> +	}
>  
>  	if (amdgpu_dc_feature_mask & DC_FBC_MASK)
>  		init_data.flags.fbc_support = true;
> -- 
> 2.24.1
> 
> _______________________________________________
> amd-gfx mailing list
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Re: [PATCH 1/3] drm/amdgpu/display: set gpu vm flag for all asics which support it

[Christian König]

Am 08.01.20 um 23:49 schrieb Alex Deucher:
> It won't get used unless the driver allows the gtt domain for
> display buffers which is controlled elsewhere.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Acked-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++++++++------
>   1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 1123f9ce86ee..fdf4d202ea1f 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -906,13 +906,15 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>   
>   	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>   
> -	/*
> -	 * TODO debug why this doesn't work on Raven
> -	 */
> -	if (adev->flags & AMD_IS_APU &&
> -	    adev->asic_type >= CHIP_CARRIZO &&
> -	    adev->asic_type < CHIP_RAVEN)
> +	switch (adev->asic_type) {
> +	case CHIP_CARRIZO:
> +	case CHIP_STONEY:
> +	case CHIP_RAVEN:
>   		init_data.flags.gpu_vm_support = true;
> +		break;
> +	default:
> +		break;
> +	}
>   
>   	if (amdgpu_dc_feature_mask & DC_FBC_MASK)
>   		init_data.flags.fbc_support = true;

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Re: [PATCH 1/3] drm/amdgpu/display: set gpu vm flag for all asics which support it

[Alex Deucher]

On Thu, Jan 9, 2020 at 12:36 AM Huang Rui <ray.huang@amd.com> wrote:
>
> On Wed, Jan 08, 2020 at 05:49:08PM -0500, Alex Deucher wrote:
> > It won't get used unless the driver allows the gtt domain for
> > display buffers which is controlled elsewhere.
> >
> > Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>
> Series are Acked-by: Huang Rui <ray.huang@amd.com>
>
> Any suggestion for testing, I would like to give a try in my renoir
> platform.

Thanks,  Aaron tested the first patch set which enabled GTT for
display and it didn't work on renoir, so that still needs additional
investigation before we can enable support for renoir.

Alex

>
> Thanks,
> Ray
>
> > ---
> >  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++++++++------
> >  1 file changed, 8 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 1123f9ce86ee..fdf4d202ea1f 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -906,13 +906,15 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
> >
> >       init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
> >
> > -     /*
> > -      * TODO debug why this doesn't work on Raven
> > -      */
> > -     if (adev->flags & AMD_IS_APU &&
> > -         adev->asic_type >= CHIP_CARRIZO &&
> > -         adev->asic_type < CHIP_RAVEN)
> > +     switch (adev->asic_type) {
> > +     case CHIP_CARRIZO:
> > +     case CHIP_STONEY:
> > +     case CHIP_RAVEN:
> >               init_data.flags.gpu_vm_support = true;
> > +             break;
> > +     default:
> > +             break;
> > +     }
> >
> >       if (amdgpu_dc_feature_mask & DC_FBC_MASK)
> >               init_data.flags.fbc_support = true;
> > --
> > 2.24.1
> >
> > _______________________________________________
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