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From: Christoffer Dall <cdall@kernel.org>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Shunyong Yang <shunyong.yang@hxt-semitech.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Will Deacon <will.deacon@arm.com>,
	Auger Eric <eric.auger@redhat.com>,
	david.daney@cavium.com,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-kernel <linux-kernel@vger.kernel.org>,
	Joey Zheng <yu.zheng@hxt-semitech.com>
Subject: Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling
Date: Sun, 11 Mar 2018 01:55:08 +0000	[thread overview]
Message-ID: <CAEDV+g+29ZK6QQEn=2h_77dMZC7wmw+d4MZC-GU-CqeaK_xhMg@mail.gmail.com> (raw)
In-Reply-To: <86k1ukazr0.wl-marc.zyngier@arm.com>

On Sat, Mar 10, 2018 at 12:20 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:
> On Fri, 09 Mar 2018 21:36:12 +0000,
> Christoffer Dall wrote:
>>
>> On Thu, Mar 08, 2018 at 05:28:44PM +0000, Marc Zyngier wrote:
>> > I'd be more confident if we did forbid P+A for such interrupts
>> > altogether, as they really feel like another kind of HW interrupt.
>>
>> How about a slightly bigger hammer:  Can we avoid doing P+A for level
>> interrupts completely?  I don't think that really makes much sense, and
>> I think we simply everything if we just come back out and resample the
>> line.  For an edge, something like a network card, there's a potential
>> performance win to appending a new pending state, but I doubt that this
>> is the case for level interrupts.
>
> I started implementing the same thing yesterday. Somehow, it feels
> slightly better to have the same flow for all level interrupts,
> including the timer, and we only use the MI on EOI as a way to trigger
> the next state of injection. Still testing, but looking good so far.
>
> I'm still puzzled that we have this level-but-not-quite behaviour for
> VFIO interrupts. At some point, it is going to bite us badly.
>

Where is the departure from level-triggered behavior with VFIO?  As
far as I can tell, the GIC flow of the interrupts will be just a level
interrupt, but we just need to make sure the resamplefd mechanism is
supported for both types of interrupts.  Whether or not that's a
decent mechanism seems orthogonal to me, but that's a discussion for
another day I think.

Thanks,
-Christoffer

WARNING: multiple messages have this Message-ID (diff)
From: cdall@kernel.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling
Date: Sun, 11 Mar 2018 01:55:08 +0000	[thread overview]
Message-ID: <CAEDV+g+29ZK6QQEn=2h_77dMZC7wmw+d4MZC-GU-CqeaK_xhMg@mail.gmail.com> (raw)
In-Reply-To: <86k1ukazr0.wl-marc.zyngier@arm.com>

On Sat, Mar 10, 2018 at 12:20 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:
> On Fri, 09 Mar 2018 21:36:12 +0000,
> Christoffer Dall wrote:
>>
>> On Thu, Mar 08, 2018 at 05:28:44PM +0000, Marc Zyngier wrote:
>> > I'd be more confident if we did forbid P+A for such interrupts
>> > altogether, as they really feel like another kind of HW interrupt.
>>
>> How about a slightly bigger hammer:  Can we avoid doing P+A for level
>> interrupts completely?  I don't think that really makes much sense, and
>> I think we simply everything if we just come back out and resample the
>> line.  For an edge, something like a network card, there's a potential
>> performance win to appending a new pending state, but I doubt that this
>> is the case for level interrupts.
>
> I started implementing the same thing yesterday. Somehow, it feels
> slightly better to have the same flow for all level interrupts,
> including the timer, and we only use the MI on EOI as a way to trigger
> the next state of injection. Still testing, but looking good so far.
>
> I'm still puzzled that we have this level-but-not-quite behaviour for
> VFIO interrupts. At some point, it is going to bite us badly.
>

Where is the departure from level-triggered behavior with VFIO?  As
far as I can tell, the GIC flow of the interrupts will be just a level
interrupt, but we just need to make sure the resamplefd mechanism is
supported for both types of interrupts.  Whether or not that's a
decent mechanism seems orthogonal to me, but that's a discussion for
another day I think.

Thanks,
-Christoffer

  reply	other threads:[~2018-03-11  1:55 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-08  7:01 [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling Shunyong Yang
2018-03-08  7:01 ` Shunyong Yang
2018-03-08  7:01 ` Shunyong Yang
2018-03-08  8:57 ` Auger Eric
2018-03-08  8:57   ` Auger Eric
2018-03-08  9:31   ` [此邮件可能存在风险] " Yang, Shunyong
2018-03-08  9:31     ` Yang, Shunyong
2018-03-08 11:01     ` Marc Zyngier
2018-03-08 11:01       ` Marc Zyngier
2018-03-08 15:29     ` Auger Eric
2018-03-08 15:29       ` Auger Eric
2018-03-08  9:49 ` Marc Zyngier
2018-03-08  9:49   ` Marc Zyngier
2018-03-08  9:49   ` Marc Zyngier
2018-03-08 11:54   ` Marc Zyngier
2018-03-08 11:54     ` Marc Zyngier
2018-03-08 16:09     ` Auger Eric
2018-03-08 16:09       ` Auger Eric
2018-03-08 16:19     ` Christoffer Dall
2018-03-08 16:19       ` Christoffer Dall
2018-03-08 17:28       ` Marc Zyngier
2018-03-08 17:28         ` Marc Zyngier
2018-03-08 18:12         ` Auger Eric
2018-03-08 18:12           ` Auger Eric
2018-03-09  3:14           ` Yang, Shunyong
2018-03-09  3:14             ` Yang, Shunyong
2018-03-09  9:40             ` Marc Zyngier
2018-03-09  9:40               ` Marc Zyngier
2018-03-09 13:10               ` Auger Eric
2018-03-09 13:10                 ` Auger Eric
2018-03-09 13:37                 ` Marc Zyngier
2018-03-09 13:37                   ` Marc Zyngier
2018-03-09  9:12           ` Marc Zyngier
2018-03-09  9:12             ` Marc Zyngier
2018-03-09 13:18             ` Auger Eric
2018-03-09 13:18               ` Auger Eric
2018-03-09 21:36         ` Christoffer Dall
2018-03-09 21:36           ` Christoffer Dall
2018-03-10 12:20           ` Marc Zyngier
2018-03-10 12:20             ` Marc Zyngier
2018-03-11  1:55             ` Christoffer Dall [this message]
2018-03-11  1:55               ` Christoffer Dall
2018-03-11 12:17               ` Marc Zyngier
2018-03-11 12:17                 ` Marc Zyngier
2018-03-12  2:33                 ` Yang, Shunyong
2018-03-12  2:33                   ` Yang, Shunyong
2018-03-12 10:09                   ` Marc Zyngier
2018-03-12 10:09                     ` Marc Zyngier
2018-03-08 16:10   ` Christoffer Dall
2018-03-08 16:10     ` Christoffer Dall

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