From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Boris Brezillon <boris.brezillon@collabora.com>,
"Ramuthevar,
Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
Cc: anders.roxell@linaro.org, andriy.shevchenko@intel.com,
arnd@arndb.de, brendanhiggins@google.com,
cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
masonccyang@mxic.com.tw, miquel.raynal@bootlin.com,
piotrs@cadence.com, qi-ming.wu@intel.com, richard@nod.at,
robh+dt@kernel.org, tglx@linutronix.de, vigneshr@ti.com
Subject: Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Thu, 16 Apr 2020 20:08:06 +0200 [thread overview]
Message-ID: <CAFBinCBy2QXFCU9bu6StqNMLLiDBtmvxNNuh+kPc1tgriSGBwQ@mail.gmail.com> (raw)
In-Reply-To: <20200416135711.039ba85c@collabora.com>
Hi Vadivel, Hi Boris,
On Thu, Apr 16, 2020 at 1:57 PM Boris Brezillon
<boris.brezillon@collabora.com> wrote:
[...]
> As for the testing part, there are 4 scenarios:
>
> 1/ Your changes work perfectly fine on older platforms. Yay \o/!
this would be awesome \o/
> 2/ You break the xway driver and existing users notice it before this
> series gets merged. Now you found someone to validate your changes.
The xway_nand driver is still used by 9 (or so) boards in OpenWrt: one
Danube, one ARX100 and the other 7 with VRX200
I can be the person to find out whether your changes break one of
these boards with VRX200 SoC and 128MB SLC NAND (and software ECC
since AFAIK this SoC doesn't have a hardware ECC engine).
Best regards,
Martin
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Boris Brezillon <boris.brezillon@collabora.com>,
"Ramuthevar,
Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
Cc: cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
qi-ming.wu@intel.com, anders.roxell@linaro.org,
andriy.shevchenko@intel.com, arnd@arndb.de, vigneshr@ti.com,
richard@nod.at, brendanhiggins@google.com,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com,
tglx@linutronix.de, masonccyang@mxic.com.tw, piotrs@cadence.com
Subject: Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Thu, 16 Apr 2020 20:08:06 +0200 [thread overview]
Message-ID: <CAFBinCBy2QXFCU9bu6StqNMLLiDBtmvxNNuh+kPc1tgriSGBwQ@mail.gmail.com> (raw)
In-Reply-To: <20200416135711.039ba85c@collabora.com>
Hi Vadivel, Hi Boris,
On Thu, Apr 16, 2020 at 1:57 PM Boris Brezillon
<boris.brezillon@collabora.com> wrote:
[...]
> As for the testing part, there are 4 scenarios:
>
> 1/ Your changes work perfectly fine on older platforms. Yay \o/!
this would be awesome \o/
> 2/ You break the xway driver and existing users notice it before this
> series gets merged. Now you found someone to validate your changes.
The xway_nand driver is still used by 9 (or so) boards in OpenWrt: one
Danube, one ARX100 and the other 7 with VRX200
I can be the person to find out whether your changes break one of
these boards with VRX200 SoC and 128MB SLC NAND (and software ECC
since AFAIK this SoC doesn't have a hardware ECC engine).
Best regards,
Martin
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-04-16 18:08 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 2:24 [PATCH v1 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-14 2:24 ` Ramuthevar, Vadivel MuruganX
2020-04-14 2:24 ` [PATCH v1 1/2] dt-bindings: mtd: Add YAML for Nand Flash Controller support Ramuthevar,Vadivel MuruganX
2020-04-14 2:24 ` Ramuthevar, Vadivel MuruganX
2020-04-14 7:04 ` Boris Brezillon
2020-04-14 7:04 ` Boris Brezillon
2020-04-15 1:51 ` Ramuthevar, Vadivel MuruganX
2020-04-15 1:51 ` Ramuthevar, Vadivel MuruganX
2020-04-14 2:24 ` [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-14 2:24 ` Ramuthevar, Vadivel MuruganX
2020-04-14 7:21 ` Boris Brezillon
2020-04-14 7:21 ` Boris Brezillon
2020-04-15 6:01 ` Ramuthevar, Vadivel MuruganX
2020-04-15 6:01 ` Ramuthevar, Vadivel MuruganX
2020-04-15 22:05 ` Martin Blumenstingl
2020-04-15 22:05 ` Martin Blumenstingl
2020-04-16 9:35 ` Ramuthevar, Vadivel MuruganX
2020-04-16 9:35 ` Ramuthevar, Vadivel MuruganX
2020-04-16 9:38 ` Boris Brezillon
2020-04-16 9:38 ` Boris Brezillon
2020-04-16 9:45 ` Ramuthevar, Vadivel MuruganX
2020-04-16 9:45 ` Ramuthevar, Vadivel MuruganX
2020-04-16 10:26 ` Boris Brezillon
2020-04-16 10:26 ` Boris Brezillon
2020-04-16 10:40 ` Ramuthevar, Vadivel MuruganX
2020-04-16 10:40 ` Ramuthevar, Vadivel MuruganX
2020-04-16 11:17 ` Boris Brezillon
2020-04-16 11:17 ` Boris Brezillon
2020-04-16 11:32 ` Andy Shevchenko
2020-04-16 11:32 ` Andy Shevchenko
2020-04-17 5:10 ` Ramuthevar, Vadivel MuruganX
2020-04-17 5:10 ` Ramuthevar, Vadivel MuruganX
[not found] ` <de9f50b8-9215-d294-9914-e49701552185@linux.intel.com>
2020-04-16 11:57 ` Boris Brezillon
2020-04-16 11:57 ` Boris Brezillon
2020-04-16 12:26 ` Andy Shevchenko
2020-04-16 12:26 ` Andy Shevchenko
2020-04-16 12:40 ` Boris Brezillon
2020-04-16 12:40 ` Boris Brezillon
2020-04-16 13:20 ` Arnd Bergmann
2020-04-16 13:20 ` Arnd Bergmann
2020-04-16 13:51 ` John Crispin
2020-04-16 13:51 ` John Crispin
2020-04-20 1:09 ` Ramuthevar, Vadivel MuruganX
2020-04-20 1:09 ` Ramuthevar, Vadivel MuruganX
2020-04-16 18:08 ` Martin Blumenstingl [this message]
2020-04-16 18:08 ` Martin Blumenstingl
2020-04-17 5:21 ` Ramuthevar, Vadivel MuruganX
2020-04-17 5:21 ` Ramuthevar, Vadivel MuruganX
2020-04-17 7:02 ` Boris Brezillon
2020-04-17 7:02 ` Boris Brezillon
2020-04-17 7:53 ` Ramuthevar, Vadivel MuruganX
2020-04-17 7:53 ` Ramuthevar, Vadivel MuruganX
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