From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: gregkh@linuxfoundation.org, hminas@synopsys.com,
balbi@kernel.org, kishon@ti.com, devicetree@vger.kernel.org,
linux-amlogic@lists.infradead.org, linux-usb@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/8] dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo PHY Bindings
Date: Tue, 5 Mar 2019 22:42:39 +0100 [thread overview]
Message-ID: <CAFBinCCp+bME0fnWRJx0L1E5aazUh1Hw-svsP7+D_QU4dP08nw@mail.gmail.com> (raw)
In-Reply-To: <20190304103846.2060-3-narmstrong@baylibre.com>
Hi Neil,
On Mon, Mar 4, 2019 at 11:38 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> Add the Amlogic G12A Family USB3 + PCIE Combo PHY Bindings.
>
> This PHY can provide exclusively USB3 or PCIE support on shared I/Os.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../bindings/phy/meson-g12a-usb3-pcie-phy.txt | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> new file mode 100644
> index 000000000000..7cfc17e2df31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> @@ -0,0 +1,22 @@
> +* Amlogic G12A USB3 + PCIE Combo PHY binding
> +
> +Required properties:
> +- compatible: Should be "amlogic,meson-g12a-usb3-pcie-phy"
> +- #phys-cells: must be 1. The cell number is used to select the phy mode
> + as defined in <dt-bindings/phy/phy.h> between PHY_TYPE_USB3 and PHY_TYPE_PCIE
> +- reg: The base address and length of the registers
> +- clocks: a phandle to the 100MHz reference clock of this PHY
> +- clock-names: must be "ref_clk"
> +- resets: phandle to the reset lines for the PHY control
> +- reset-names: must be "phy"
one question on the resets:
- in v1 you had three reset lines: RESET_PCIE_CTRL_A, RESET_PCIE_PHY,
RESET_PCIE_APB
- in v2 you only have the "phy" reset line.
is this because the other two are connected to the PCIe controller
(Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt) instead
of the PHY?
Regards
Martin
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: gregkh@linuxfoundation.org, hminas@synopsys.com,
balbi@kernel.org, kishon@ti.com, devicetree@vger.kernel.org,
linux-amlogic@lists.infradead.org, linux-usb@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [v2,2/8] dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo PHY Bindings
Date: Tue, 5 Mar 2019 22:42:39 +0100 [thread overview]
Message-ID: <CAFBinCCp+bME0fnWRJx0L1E5aazUh1Hw-svsP7+D_QU4dP08nw@mail.gmail.com> (raw)
Hi Neil,
On Mon, Mar 4, 2019 at 11:38 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> Add the Amlogic G12A Family USB3 + PCIE Combo PHY Bindings.
>
> This PHY can provide exclusively USB3 or PCIE support on shared I/Os.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../bindings/phy/meson-g12a-usb3-pcie-phy.txt | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> new file mode 100644
> index 000000000000..7cfc17e2df31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> @@ -0,0 +1,22 @@
> +* Amlogic G12A USB3 + PCIE Combo PHY binding
> +
> +Required properties:
> +- compatible: Should be "amlogic,meson-g12a-usb3-pcie-phy"
> +- #phys-cells: must be 1. The cell number is used to select the phy mode
> + as defined in <dt-bindings/phy/phy.h> between PHY_TYPE_USB3 and PHY_TYPE_PCIE
> +- reg: The base address and length of the registers
> +- clocks: a phandle to the 100MHz reference clock of this PHY
> +- clock-names: must be "ref_clk"
> +- resets: phandle to the reset lines for the PHY control
> +- reset-names: must be "phy"
one question on the resets:
- in v1 you had three reset lines: RESET_PCIE_CTRL_A, RESET_PCIE_PHY,
RESET_PCIE_APB
- in v2 you only have the "phy" reset line.
is this because the other two are connected to the PCIe controller
(Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt) instead
of the PHY?
Regards
Martin
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: devicetree@vger.kernel.org, balbi@kernel.org,
gregkh@linuxfoundation.org, linux-usb@vger.kernel.org,
linux-kernel@vger.kernel.org, kishon@ti.com, hminas@synopsys.com,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/8] dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo PHY Bindings
Date: Tue, 5 Mar 2019 22:42:39 +0100 [thread overview]
Message-ID: <CAFBinCCp+bME0fnWRJx0L1E5aazUh1Hw-svsP7+D_QU4dP08nw@mail.gmail.com> (raw)
In-Reply-To: <20190304103846.2060-3-narmstrong@baylibre.com>
Hi Neil,
On Mon, Mar 4, 2019 at 11:38 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> Add the Amlogic G12A Family USB3 + PCIE Combo PHY Bindings.
>
> This PHY can provide exclusively USB3 or PCIE support on shared I/Os.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../bindings/phy/meson-g12a-usb3-pcie-phy.txt | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> new file mode 100644
> index 000000000000..7cfc17e2df31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> @@ -0,0 +1,22 @@
> +* Amlogic G12A USB3 + PCIE Combo PHY binding
> +
> +Required properties:
> +- compatible: Should be "amlogic,meson-g12a-usb3-pcie-phy"
> +- #phys-cells: must be 1. The cell number is used to select the phy mode
> + as defined in <dt-bindings/phy/phy.h> between PHY_TYPE_USB3 and PHY_TYPE_PCIE
> +- reg: The base address and length of the registers
> +- clocks: a phandle to the 100MHz reference clock of this PHY
> +- clock-names: must be "ref_clk"
> +- resets: phandle to the reset lines for the PHY control
> +- reset-names: must be "phy"
one question on the resets:
- in v1 you had three reset lines: RESET_PCIE_CTRL_A, RESET_PCIE_PHY,
RESET_PCIE_APB
- in v2 you only have the "phy" reset line.
is this because the other two are connected to the PCIe controller
(Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt) instead
of the PHY?
Regards
Martin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: devicetree@vger.kernel.org, balbi@kernel.org,
gregkh@linuxfoundation.org, linux-usb@vger.kernel.org,
linux-kernel@vger.kernel.org, kishon@ti.com, hminas@synopsys.com,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/8] dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo PHY Bindings
Date: Tue, 5 Mar 2019 22:42:39 +0100 [thread overview]
Message-ID: <CAFBinCCp+bME0fnWRJx0L1E5aazUh1Hw-svsP7+D_QU4dP08nw@mail.gmail.com> (raw)
In-Reply-To: <20190304103846.2060-3-narmstrong@baylibre.com>
Hi Neil,
On Mon, Mar 4, 2019 at 11:38 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> Add the Amlogic G12A Family USB3 + PCIE Combo PHY Bindings.
>
> This PHY can provide exclusively USB3 or PCIE support on shared I/Os.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../bindings/phy/meson-g12a-usb3-pcie-phy.txt | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> new file mode 100644
> index 000000000000..7cfc17e2df31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
> @@ -0,0 +1,22 @@
> +* Amlogic G12A USB3 + PCIE Combo PHY binding
> +
> +Required properties:
> +- compatible: Should be "amlogic,meson-g12a-usb3-pcie-phy"
> +- #phys-cells: must be 1. The cell number is used to select the phy mode
> + as defined in <dt-bindings/phy/phy.h> between PHY_TYPE_USB3 and PHY_TYPE_PCIE
> +- reg: The base address and length of the registers
> +- clocks: a phandle to the 100MHz reference clock of this PHY
> +- clock-names: must be "ref_clk"
> +- resets: phandle to the reset lines for the PHY control
> +- reset-names: must be "phy"
one question on the resets:
- in v1 you had three reset lines: RESET_PCIE_CTRL_A, RESET_PCIE_PHY,
RESET_PCIE_APB
- in v2 you only have the "phy" reset line.
is this because the other two are connected to the PCIe controller
(Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt) instead
of the PHY?
Regards
Martin
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2019-03-05 21:42 UTC|newest]
Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-04 10:38 [PATCH v2 0/8] arm64: meson: Add support for USB on Amlogic G12A Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [PATCH v2 1/8] dt-bindings: phy: Add Amlogic G12A USB2 PHY Bindings Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,1/8] " Neil Armstrong
2019-03-04 10:38 ` [PATCH v2 2/8] dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo " Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,2/8] " Neil Armstrong
2019-03-04 10:38 ` [PATCH v2 2/8] " Neil Armstrong
2019-03-05 21:42 ` Martin Blumenstingl [this message]
2019-03-05 21:42 ` Martin Blumenstingl
2019-03-05 21:42 ` Martin Blumenstingl
2019-03-05 21:42 ` [v2,2/8] " Martin Blumenstingl
2019-03-07 8:35 ` [PATCH v2 2/8] " Neil Armstrong
2019-03-07 8:35 ` Neil Armstrong
2019-03-07 8:35 ` Neil Armstrong
2019-03-07 8:35 ` [v2,2/8] " Neil Armstrong
2019-03-12 18:23 ` [PATCH v2 2/8] " Rob Herring
2019-03-12 18:23 ` Rob Herring
2019-03-12 18:23 ` Rob Herring
2019-03-12 18:23 ` [v2,2/8] " Rob Herring
2019-03-12 18:23 ` [PATCH v2 2/8] " Rob Herring
2019-03-04 10:38 ` [PATCH v2 3/8] dt-bindings: usb: dwc2: Add Amlogic G12A DWC2 Compatible Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,3/8] " Neil Armstrong
2019-03-04 10:38 ` [PATCH v2 4/8] dt-bindings: usb: dwc3: Add Amlogic G12A DWC3 Glue Bindings Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,4/8] " Neil Armstrong
2019-03-06 21:27 ` [PATCH v2 4/8] " Martin Blumenstingl
2019-03-06 21:27 ` Martin Blumenstingl
2019-03-06 21:27 ` Martin Blumenstingl
2019-03-06 21:27 ` [v2,4/8] " Martin Blumenstingl
2019-03-07 8:36 ` [PATCH v2 4/8] " Neil Armstrong
2019-03-07 8:36 ` Neil Armstrong
2019-03-07 8:36 ` Neil Armstrong
2019-03-07 8:36 ` [v2,4/8] " Neil Armstrong
2019-03-12 18:29 ` [PATCH v2 4/8] " Rob Herring
2019-03-12 18:29 ` Rob Herring
2019-03-12 18:29 ` Rob Herring
2019-03-12 18:29 ` [v2,4/8] " Rob Herring
2019-03-12 18:29 ` [PATCH v2 4/8] " Rob Herring
2019-03-04 10:38 ` [PATCH v2 5/8] phy: amlogic: add Amlogic G12A USB2 PHY Driver Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,5/8] " Neil Armstrong
2019-03-06 21:00 ` [PATCH v2 5/8] " Martin Blumenstingl
2019-03-06 21:00 ` Martin Blumenstingl
2019-03-06 21:00 ` Martin Blumenstingl
2019-03-06 21:00 ` [v2,5/8] " Martin Blumenstingl
2019-03-07 8:41 ` [PATCH v2 5/8] " Neil Armstrong
2019-03-07 8:41 ` Neil Armstrong
2019-03-07 8:41 ` Neil Armstrong
2019-03-07 8:41 ` [v2,5/8] " Neil Armstrong
2019-03-11 21:04 ` [PATCH v2 5/8] " Martin Blumenstingl
2019-03-11 21:04 ` Martin Blumenstingl
2019-03-11 21:04 ` Martin Blumenstingl
2019-03-11 21:04 ` [v2,5/8] " Martin Blumenstingl
2019-03-04 10:38 ` [PATCH v2 6/8] phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo " Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,6/8] " Neil Armstrong
2019-03-06 21:04 ` [PATCH v2 6/8] " Martin Blumenstingl
2019-03-06 21:04 ` Martin Blumenstingl
2019-03-06 21:04 ` Martin Blumenstingl
2019-03-06 21:04 ` [v2,6/8] " Martin Blumenstingl
2019-03-07 8:44 ` [PATCH v2 6/8] " Neil Armstrong
2019-03-07 8:44 ` Neil Armstrong
2019-03-07 8:44 ` Neil Armstrong
2019-03-07 8:44 ` [v2,6/8] " Neil Armstrong
2019-03-11 21:14 ` [PATCH v2 6/8] " Martin Blumenstingl
2019-03-11 21:14 ` Martin Blumenstingl
2019-03-11 21:14 ` Martin Blumenstingl
2019-03-11 21:14 ` [v2,6/8] " Martin Blumenstingl
2019-03-04 10:38 ` [PATCH v2 7/8] usb: dwc2: Add Amlogic G12A DWC2 Params Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,7/8] " Neil Armstrong
2019-03-04 10:38 ` [PATCH v2 8/8] usb: dwc3: Add Amlogic G12A DWC3 glue Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` Neil Armstrong
2019-03-04 10:38 ` [v2,8/8] " Neil Armstrong
2019-03-07 2:02 ` [PATCH v2 8/8] " Chunfeng Yun
2019-03-07 2:02 ` Chunfeng Yun
2019-03-07 2:02 ` Chunfeng Yun
2019-03-07 2:02 ` [v2,8/8] " Chunfeng Yun
2019-03-07 9:45 ` [PATCH v2 8/8] " Neil Armstrong
2019-03-07 9:45 ` Neil Armstrong
2019-03-07 9:45 ` Neil Armstrong
2019-03-07 9:45 ` [v2,8/8] " Neil Armstrong
2019-03-07 11:01 ` [PATCH v2 8/8] " Chunfeng Yun
2019-03-07 11:01 ` Chunfeng Yun
2019-03-07 11:01 ` Chunfeng Yun
2019-03-07 11:01 ` [v2,8/8] " Chunfeng Yun
2019-03-11 21:19 ` [PATCH v2 8/8] " Martin Blumenstingl
2019-03-11 21:19 ` Martin Blumenstingl
2019-03-11 21:19 ` Martin Blumenstingl
2019-03-11 21:19 ` [v2,8/8] " Martin Blumenstingl
2019-03-11 21:56 ` [PATCH v2 8/8] " Martin Blumenstingl
2019-03-11 21:56 ` Martin Blumenstingl
2019-03-11 21:56 ` Martin Blumenstingl
2019-03-11 21:56 ` [v2,8/8] " Martin Blumenstingl
2019-03-13 13:07 ` [PATCH v2 8/8] " Neil Armstrong
2019-03-13 13:07 ` Neil Armstrong
2019-03-13 13:07 ` Neil Armstrong
2019-03-13 13:07 ` [v2,8/8] " Neil Armstrong
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFBinCCp+bME0fnWRJx0L1E5aazUh1Hw-svsP7+D_QU4dP08nw@mail.gmail.com \
--to=martin.blumenstingl@googlemail.com \
--cc=balbi@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=hminas@synopsys.com \
--cc=kishon@ti.com \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=narmstrong@baylibre.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.