From: Peter Maydell <peter.maydell@linaro.org>
To: Palmer Dabbelt <palmerdabbelt@google.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 2
Date: Sun, 16 Feb 2020 21:14:47 +0000 [thread overview]
Message-ID: <CAFEAcA_zQ=aw6Om=1ETn_y297nPqJh0UHgf1ppkAORkHdOADnA@mail.gmail.com> (raw)
In-Reply-To: <20200212172921.36796-1-palmerdabbelt@google.com>
On Wed, 12 Feb 2020 at 17:30, Palmer Dabbelt <palmerdabbelt@google.com> wrote:
>
> The following changes since commit 81a23caf47956778c5a5056ad656d1ef92bf9659:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging (2020-02-10 17:08:51 +0000)
>
> are available in the Git repository at:
>
> git@github.com:palmer-dabbelt/qemu.git tags/riscv-for-master-5.0-sf2
>
> for you to fetch changes up to 9c8fdcece53e05590441785ab22d91a22da36e29:
>
> MAINTAINERS: Add maintainer entry for Goldfish RTC (2020-02-10 12:01:39 -0800)
>
> ----------------------------------------------------------------
> RISC-V Patches for the 5.0 Soft Freeze, Part 2
>
> This is a fairly light-weight pull request, but I wanted to send it out to
> avoid the Goldfish stuff getting buried as the next PR should contain the H
> extension implementation.
>
> As far as this PR goes, it contains:
>
> * The addition of syscon device tree nodes for reboot and poweroff, which
> allows Linux to control QEMU without an additional driver. The existing
> device was already compatible with the syscon interface.
> * A fix to our GDB stub to avoid confusing XLEN and FLEN, specifically useful
> for rv32id-based systems.
> * A device emulation for the Goldfish RTC device, a simple memory-mapped RTC.
> * The addition of the Goldfish RTC device to the RISC-V virt board.
>
> This passes "make check" and boots buildroot for me.
>
> ----------------------------------------------------------------
>
> Peter: I'm sending hw/rtc code because it was suggested that the Goldfish
> implementation gets handled via the RISC-V tree as our virt board is the only
> user. I'm happy to do things differently in the future (maybe send
> goldfish-specific PRs?) if that's better for you. Just LMK what makes sense, I
> anticipate that this'll be a pretty low traffic device so I'm fine with pretty
> much anything.
If it's a device that's only used in risc-v boards I'm happy for
you to just fold those patches into the main risc-v pullreq.
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.0
for any user-visible changes.
-- PMM
WARNING: multiple messages have this Message-ID (diff)
From: Peter Maydell <peter.maydell@linaro.org>
To: Palmer Dabbelt <palmerdabbelt@google.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
"open list:RISC-V" <qemu-riscv@nongnu.org>
Subject: Re: [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 2
Date: Sun, 16 Feb 2020 21:14:47 +0000 [thread overview]
Message-ID: <CAFEAcA_zQ=aw6Om=1ETn_y297nPqJh0UHgf1ppkAORkHdOADnA@mail.gmail.com> (raw)
In-Reply-To: <20200212172921.36796-1-palmerdabbelt@google.com>
On Wed, 12 Feb 2020 at 17:30, Palmer Dabbelt <palmerdabbelt@google.com> wrote:
>
> The following changes since commit 81a23caf47956778c5a5056ad656d1ef92bf9659:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging (2020-02-10 17:08:51 +0000)
>
> are available in the Git repository at:
>
> git@github.com:palmer-dabbelt/qemu.git tags/riscv-for-master-5.0-sf2
>
> for you to fetch changes up to 9c8fdcece53e05590441785ab22d91a22da36e29:
>
> MAINTAINERS: Add maintainer entry for Goldfish RTC (2020-02-10 12:01:39 -0800)
>
> ----------------------------------------------------------------
> RISC-V Patches for the 5.0 Soft Freeze, Part 2
>
> This is a fairly light-weight pull request, but I wanted to send it out to
> avoid the Goldfish stuff getting buried as the next PR should contain the H
> extension implementation.
>
> As far as this PR goes, it contains:
>
> * The addition of syscon device tree nodes for reboot and poweroff, which
> allows Linux to control QEMU without an additional driver. The existing
> device was already compatible with the syscon interface.
> * A fix to our GDB stub to avoid confusing XLEN and FLEN, specifically useful
> for rv32id-based systems.
> * A device emulation for the Goldfish RTC device, a simple memory-mapped RTC.
> * The addition of the Goldfish RTC device to the RISC-V virt board.
>
> This passes "make check" and boots buildroot for me.
>
> ----------------------------------------------------------------
>
> Peter: I'm sending hw/rtc code because it was suggested that the Goldfish
> implementation gets handled via the RISC-V tree as our virt board is the only
> user. I'm happy to do things differently in the future (maybe send
> goldfish-specific PRs?) if that's better for you. Just LMK what makes sense, I
> anticipate that this'll be a pretty low traffic device so I'm fine with pretty
> much anything.
If it's a device that's only used in risc-v boards I'm happy for
you to just fold those patches into the main risc-v pullreq.
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.0
for any user-visible changes.
-- PMM
next prev parent reply other threads:[~2020-02-16 21:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-12 17:29 [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 2 Palmer Dabbelt
2020-02-12 17:29 ` [PULL 1/5] riscv/virt: Add syscon reboot and poweroff DT nodes Palmer Dabbelt
2020-02-12 17:29 ` [PULL 2/5] riscv: Separate FPU register size from core register size in gdbstub [v2] Palmer Dabbelt
2020-02-12 17:29 ` [PULL 3/5] hw: rtc: Add Goldfish RTC device Palmer Dabbelt
2020-02-12 17:29 ` [PULL 4/5] riscv: virt: Use " Palmer Dabbelt
2020-02-12 17:29 ` [PULL 5/5] MAINTAINERS: Add maintainer entry for Goldfish RTC Palmer Dabbelt
2020-02-13 12:30 ` [PULL] RISC-V Patches for the 5.0 Soft Freeze, Part 2 Bin Meng
2020-02-13 12:30 ` Bin Meng
2020-02-16 21:14 ` Peter Maydell [this message]
2020-02-16 21:14 ` Peter Maydell
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