From: Chen-Yu Tsai <wens@csie.org>
To: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Chen-Yu Tsai <wens@csie.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Hans de Goede <hdegoede@redhat.com>,
linux-mmc <linux-mmc@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
lkml <linux-kernel@vger.kernel.org>,
Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH 1/3] mmc: fix mmc mode selection for HS-DDR and higher
Date: Thu, 2 Jun 2016 16:08:29 +0800 [thread overview]
Message-ID: <CAGb2v674-URnFbF_ozVesBxUCRtF_cbd-3KiKbpnYYgZ4cuBgg@mail.gmail.com> (raw)
In-Reply-To: <CAOCOHw7aHvSUUoxkrDkGwNrTGNbZm-3RSuhJF3CCvRUiK5tDgg@mail.gmail.com>
On Thu, Jun 2, 2016 at 2:58 AM, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
> On Sun, May 29, 2016 at 12:04 AM, Chen-Yu Tsai <wens@csie.org> wrote:
>> When IS_ERR_VALUE was removed from the mmc core code, it was replaced
>> with a simple not-zero check. This does not work, as the value checked
>> is the return value for mmc_select_bus_width, which returns the set
>> bit width on success. This made eMMC modes higher than HS-DDR unusable.
>>
>> Fix this by checking for a positive return value instead.
>
> mmc_select_bus_width() can return 0 on "success" as well and the
> previous check was !IS_ERR_VALUE(err), which coverts that. So I
> believe these checks should be for err >= 0 rather than just > 0.
>From the comments above the function:
"Zero is returned instead of error value if the wide width is not supported."
The documents I found, which were more vendor datasheets, only list
bit widths 4 and 8 for high speed SDR/DDR and HS200.
Not sure what the MMC spec actually says though, as I do not have
it.
Regards
ChenYu
>
>
> Either way this fixes the boot failures seen on my Qualcomm based
> boards with v4.7-rc1.
>
> Regards,
> Bjorn
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] mmc: fix mmc mode selection for HS-DDR and higher
Date: Thu, 2 Jun 2016 16:08:29 +0800 [thread overview]
Message-ID: <CAGb2v674-URnFbF_ozVesBxUCRtF_cbd-3KiKbpnYYgZ4cuBgg@mail.gmail.com> (raw)
In-Reply-To: <CAOCOHw7aHvSUUoxkrDkGwNrTGNbZm-3RSuhJF3CCvRUiK5tDgg@mail.gmail.com>
On Thu, Jun 2, 2016 at 2:58 AM, Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
> On Sun, May 29, 2016 at 12:04 AM, Chen-Yu Tsai <wens@csie.org> wrote:
>> When IS_ERR_VALUE was removed from the mmc core code, it was replaced
>> with a simple not-zero check. This does not work, as the value checked
>> is the return value for mmc_select_bus_width, which returns the set
>> bit width on success. This made eMMC modes higher than HS-DDR unusable.
>>
>> Fix this by checking for a positive return value instead.
>
> mmc_select_bus_width() can return 0 on "success" as well and the
> previous check was !IS_ERR_VALUE(err), which coverts that. So I
> believe these checks should be for err >= 0 rather than just > 0.
>From the comments above the function:
"Zero is returned instead of error value if the wide width is not supported."
The documents I found, which were more vendor datasheets, only list
bit widths 4 and 8 for high speed SDR/DDR and HS200.
Not sure what the MMC spec actually says though, as I do not have
it.
Regards
ChenYu
>
>
> Either way this fixes the boot failures seen on my Qualcomm based
> boards with v4.7-rc1.
>
> Regards,
> Bjorn
next prev parent reply other threads:[~2016-06-02 8:08 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-29 7:04 [PATCH 0/3] mmc: sunxi: Fix MMC DDR modes for Allwinner A80 Chen-Yu Tsai
2016-05-29 7:04 ` Chen-Yu Tsai
2016-05-29 7:04 ` [PATCH 1/3] mmc: fix mmc mode selection for HS-DDR and higher Chen-Yu Tsai
2016-05-29 7:04 ` Chen-Yu Tsai
2016-05-31 9:30 ` Krzysztof Kozlowski
2016-05-31 9:30 ` Krzysztof Kozlowski
2016-06-01 1:25 ` Jaehoon Chung
2016-06-01 1:25 ` Jaehoon Chung
2016-06-01 2:36 ` Shawn Lin
2016-06-01 2:36 ` Shawn Lin
2016-06-01 9:19 ` Marcel Ziswiler
2016-06-01 9:19 ` Marcel Ziswiler
2016-06-01 18:58 ` Bjorn Andersson
2016-06-01 18:58 ` Bjorn Andersson
2016-06-02 8:08 ` Chen-Yu Tsai [this message]
2016-06-02 8:08 ` Chen-Yu Tsai
2016-06-02 8:31 ` Ulf Hansson
2016-06-02 8:31 ` Ulf Hansson
2016-06-02 8:31 ` Ulf Hansson
2016-06-02 9:35 ` Krzysztof Kozlowski
2016-06-02 9:35 ` Krzysztof Kozlowski
2016-06-02 9:35 ` Krzysztof Kozlowski
2016-06-02 15:01 ` Ulf Hansson
2016-06-02 15:01 ` Ulf Hansson
2016-06-02 15:01 ` Ulf Hansson
2016-05-29 7:04 ` [PATCH 2/3] mmc: sunxi: Fix DDR MMC timings for A80 Chen-Yu Tsai
2016-05-29 7:04 ` Chen-Yu Tsai
2016-05-30 11:34 ` Hans de Goede
2016-05-30 11:34 ` Hans de Goede
2016-05-30 12:59 ` Chen-Yu Tsai
2016-05-30 12:59 ` Chen-Yu Tsai
2016-05-30 15:38 ` Chen-Yu Tsai
2016-05-30 15:38 ` Chen-Yu Tsai
2016-05-30 18:05 ` Hans de Goede
2016-05-30 18:05 ` Hans de Goede
2016-05-29 7:04 ` [PATCH 3/3] mmc: sunxi: Re-enable eMMC HS-DDR modes on Allwinner A80 Chen-Yu Tsai
2016-05-29 7:04 ` Chen-Yu Tsai
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