* [PATCH 00/16] spi: dm-conversion (part3)
@ 2020-06-13 13:54 Jagan Teki
2020-06-13 13:54 ` [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH Jagan Teki
` (16 more replies)
0 siblings, 17 replies; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
This series updated boards which are using mxc_spi
driver.
Series has patches for
1) DM_SPI/SPI_FLASH enablement for boards which
already support DM and OF_CONTROL.
2) Drop the boards which doesn't support DM or OF_CONTROL.
Now it's call for board maintainers to update their
board to use device tree and DM options to alive
on tree before MW.
thanks,
Jagan.
Jagan Teki (16):
cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
cm_fx6: Switch to full DM-aware
dh_imx6: Switch to full DM-aware
arm: Remove mx51evk board
arm: Remove ts4800 board
arm: Remove tqma6s_wru4_mmc_defconfig
arm: Remove pfla02 board
arm: Remove pcm058 board
arm: Remove riotboard board
arm: Remove zc5202/zc5601 board
arm: Remove cgtqmx6eval board
arm: Remove ot1200 board
arm: Remove dms-ba16 board
arm: Remove configs/mx35pdk_defconfig board
arm: Remove flea3_defconfig board
arm: Remove mx31pdk_defconfig board
arch/arm/Kconfig | 11 -
arch/arm/mach-imx/mx3/Kconfig | 12 -
arch/arm/mach-imx/mx5/Kconfig | 11 -
arch/arm/mach-imx/mx6/Kconfig | 59 --
board/CarMediaLab/flea3/Kconfig | 15 -
board/CarMediaLab/flea3/MAINTAINERS | 6 -
board/CarMediaLab/flea3/Makefile | 8 -
board/CarMediaLab/flea3/flea3.c | 224 ----
board/CarMediaLab/flea3/lowlevel_init.S | 24 -
board/advantech/dms-ba16/Kconfig | 31 -
board/advantech/dms-ba16/MAINTAINERS | 8 -
board/advantech/dms-ba16/Makefile | 6 -
board/advantech/dms-ba16/clocks.cfg | 25 -
board/advantech/dms-ba16/ddr-setup.cfg | 39 -
board/advantech/dms-ba16/dms-ba16.c | 629 -----------
board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 -
board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 -
board/advantech/dms-ba16/micron-1g.cfg | 63 --
board/advantech/dms-ba16/samsung-2g.cfg | 63 --
board/bachmann/ot1200/Kconfig | 12 -
board/bachmann/ot1200/MAINTAINERS | 6 -
board/bachmann/ot1200/Makefile | 11 -
board/bachmann/ot1200/README | 20 -
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 ---
board/bachmann/ot1200/ot1200.c | 359 -------
board/bachmann/ot1200/ot1200_spl.c | 152 ---
board/congatec/cgtqmx6eval/Kconfig | 12 -
board/congatec/cgtqmx6eval/MAINTAINERS | 6 -
board/congatec/cgtqmx6eval/Makefile | 8 -
board/congatec/cgtqmx6eval/README | 74 --
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 --------------------
board/el/el6x/Kconfig | 25 -
board/el/el6x/MAINTAINERS | 8 -
board/el/el6x/Makefile | 5 -
board/el/el6x/el6x.c | 636 ------------
board/embest/mx6boards/Kconfig | 12 -
board/embest/mx6boards/MAINTAINERS | 8 -
board/embest/mx6boards/Makefile | 7 -
board/embest/mx6boards/mx6boards.c | 662 ------------
board/freescale/mx31pdk/Kconfig | 15 -
board/freescale/mx31pdk/MAINTAINERS | 6 -
board/freescale/mx31pdk/Makefile | 11 -
board/freescale/mx31pdk/lowlevel_init.S | 76 --
board/freescale/mx31pdk/mx31pdk.c | 119 ---
board/freescale/mx35pdk/Kconfig | 15 -
board/freescale/mx35pdk/MAINTAINERS | 6 -
board/freescale/mx35pdk/Makefile | 8 -
board/freescale/mx35pdk/README | 114 --
board/freescale/mx35pdk/lowlevel_init.S | 239 -----
board/freescale/mx35pdk/mx35pdk.c | 293 ------
board/freescale/mx35pdk/mx35pdk.h | 41 -
board/freescale/mx51evk/Kconfig | 15 -
board/freescale/mx51evk/MAINTAINERS | 6 -
board/freescale/mx51evk/Makefile | 8 -
board/freescale/mx51evk/imximage.cfg | 108 --
board/freescale/mx51evk/mx51evk.c | 401 -------
board/freescale/mx51evk/mx51evk_video.c | 98 --
board/phytec/pcm058/Kconfig | 12 -
board/phytec/pcm058/MAINTAINERS | 6 -
board/phytec/pcm058/Makefile | 7 -
board/phytec/pcm058/README | 35 -
board/phytec/pcm058/pcm058.c | 571 ----------
board/phytec/pfla02/Kconfig | 18 -
board/phytec/pfla02/MAINTAINERS | 6 -
board/phytec/pfla02/Makefile | 7 -
board/phytec/pfla02/README | 24 -
board/phytec/pfla02/pfla02.c | 713 -------------
board/technologic/ts4800/Kconfig | 15 -
board/technologic/ts4800/MAINTAINERS | 6 -
board/technologic/ts4800/Makefile | 5 -
board/technologic/ts4800/ts4800.c | 262 -----
board/technologic/ts4800/ts4800.h | 15 -
configs/cgtqmx6eval_defconfig | 85 --
configs/cl-som-imx7_defconfig | 7 +-
configs/cm_fx6_defconfig | 3 +
configs/dh_imx6_defconfig | 3 +
configs/dms-ba16-1g_defconfig | 64 --
configs/dms-ba16_defconfig | 63 --
configs/flea3_defconfig | 48 -
configs/marsboard_defconfig | 44 -
configs/mx31pdk_defconfig | 40 -
configs/mx35pdk_defconfig | 52 -
configs/mx51evk_defconfig | 42 -
configs/ot1200_defconfig | 55 -
configs/ot1200_spl_defconfig | 66 --
configs/pcm058_defconfig | 70 --
configs/pfla02_defconfig | 71 --
configs/riotboard_defconfig | 44 -
configs/riotboard_spl_defconfig | 55 -
configs/tqma6s_wru4_mmc_defconfig | 81 --
configs/ts4800_defconfig | 28 -
configs/zc5202_defconfig | 56 -
configs/zc5601_defconfig | 54 -
include/configs/advantech_dms-ba16.h | 233 -----
include/configs/cgtqmx6eval.h | 209 ----
include/configs/cm_fx6.h | 7 -
include/configs/dh_imx6.h | 6 -
include/configs/embestmx6boards.h | 140 ---
include/configs/flea3.h | 182 ----
include/configs/mx31pdk.h | 141 ---
include/configs/mx35pdk.h | 210 ----
include/configs/mx51evk.h | 197 ----
include/configs/ot1200.h | 99 --
include/configs/pcm058.h | 77 --
include/configs/pfla02.h | 131 ---
include/configs/ts4800.h | 139 ---
include/configs/zc5202.h | 27 -
include/configs/zc5601.h | 26 -
108 files changed, 11 insertions(+), 10675 deletions(-)
delete mode 100644 board/CarMediaLab/flea3/Kconfig
delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
delete mode 100644 board/CarMediaLab/flea3/Makefile
delete mode 100644 board/CarMediaLab/flea3/flea3.c
delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
delete mode 100644 board/advantech/dms-ba16/Kconfig
delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
delete mode 100644 board/advantech/dms-ba16/Makefile
delete mode 100644 board/advantech/dms-ba16/clocks.cfg
delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
delete mode 100644 board/bachmann/ot1200/Kconfig
delete mode 100644 board/bachmann/ot1200/MAINTAINERS
delete mode 100644 board/bachmann/ot1200/Makefile
delete mode 100644 board/bachmann/ot1200/README
delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
delete mode 100644 board/bachmann/ot1200/ot1200.c
delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
delete mode 100644 board/congatec/cgtqmx6eval/Makefile
delete mode 100644 board/congatec/cgtqmx6eval/README
delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
delete mode 100644 board/el/el6x/Kconfig
delete mode 100644 board/el/el6x/MAINTAINERS
delete mode 100644 board/el/el6x/Makefile
delete mode 100644 board/el/el6x/el6x.c
delete mode 100644 board/embest/mx6boards/Kconfig
delete mode 100644 board/embest/mx6boards/MAINTAINERS
delete mode 100644 board/embest/mx6boards/Makefile
delete mode 100644 board/embest/mx6boards/mx6boards.c
delete mode 100644 board/freescale/mx31pdk/Kconfig
delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
delete mode 100644 board/freescale/mx31pdk/Makefile
delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
delete mode 100644 board/freescale/mx35pdk/Kconfig
delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
delete mode 100644 board/freescale/mx35pdk/Makefile
delete mode 100644 board/freescale/mx35pdk/README
delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
delete mode 100644 board/freescale/mx51evk/Kconfig
delete mode 100644 board/freescale/mx51evk/MAINTAINERS
delete mode 100644 board/freescale/mx51evk/Makefile
delete mode 100644 board/freescale/mx51evk/imximage.cfg
delete mode 100644 board/freescale/mx51evk/mx51evk.c
delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
delete mode 100644 board/phytec/pcm058/Kconfig
delete mode 100644 board/phytec/pcm058/MAINTAINERS
delete mode 100644 board/phytec/pcm058/Makefile
delete mode 100644 board/phytec/pcm058/README
delete mode 100644 board/phytec/pcm058/pcm058.c
delete mode 100644 board/phytec/pfla02/Kconfig
delete mode 100644 board/phytec/pfla02/MAINTAINERS
delete mode 100644 board/phytec/pfla02/Makefile
delete mode 100644 board/phytec/pfla02/README
delete mode 100644 board/phytec/pfla02/pfla02.c
delete mode 100644 board/technologic/ts4800/Kconfig
delete mode 100644 board/technologic/ts4800/MAINTAINERS
delete mode 100644 board/technologic/ts4800/Makefile
delete mode 100644 board/technologic/ts4800/ts4800.c
delete mode 100644 board/technologic/ts4800/ts4800.h
delete mode 100644 configs/cgtqmx6eval_defconfig
delete mode 100644 configs/dms-ba16-1g_defconfig
delete mode 100644 configs/dms-ba16_defconfig
delete mode 100644 configs/flea3_defconfig
delete mode 100644 configs/marsboard_defconfig
delete mode 100644 configs/mx31pdk_defconfig
delete mode 100644 configs/mx35pdk_defconfig
delete mode 100644 configs/mx51evk_defconfig
delete mode 100644 configs/ot1200_defconfig
delete mode 100644 configs/ot1200_spl_defconfig
delete mode 100644 configs/pcm058_defconfig
delete mode 100644 configs/pfla02_defconfig
delete mode 100644 configs/riotboard_defconfig
delete mode 100644 configs/riotboard_spl_defconfig
delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
delete mode 100644 configs/ts4800_defconfig
delete mode 100644 configs/zc5202_defconfig
delete mode 100644 configs/zc5601_defconfig
delete mode 100644 include/configs/advantech_dms-ba16.h
delete mode 100644 include/configs/cgtqmx6eval.h
delete mode 100644 include/configs/embestmx6boards.h
delete mode 100644 include/configs/flea3.h
delete mode 100644 include/configs/mx31pdk.h
delete mode 100644 include/configs/mx35pdk.h
delete mode 100644 include/configs/mx51evk.h
delete mode 100644 include/configs/ot1200.h
delete mode 100644 include/configs/pcm058.h
delete mode 100644 include/configs/pfla02.h
delete mode 100644 include/configs/ts4800.h
delete mode 100644 include/configs/zc5202.h
delete mode 100644 include/configs/zc5601.h
--
2.25.1
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-10-23 8:28 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 02/16] cm_fx6: Switch to full DM-aware Jagan Teki
` (15 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
Enable DM_SPI/DM_SPI_FLASH with associated config
options.
Build fine, but not tested.
Patch-cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
configs/cl-som-imx7_defconfig | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index a38c6c2429..12018cc1b0 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DM_GPIO=y
CONFIG_TARGET_CL_SOM_IMX7=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
@@ -41,7 +42,6 @@ CONFIG_CMD_GREPENV=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
@@ -54,16 +54,18 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
# CONFIG_ENV_IS_IN_MMC is not set
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM=y
CONFIG_CMD_PCA953X=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_ATMEL=y
@@ -79,6 +81,7 @@ CONFIG_PHY_ATHEROS=y
CONFIG_MII=y
CONFIG_DM_REGULATOR=y
CONFIG_SPI=y
+CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 02/16] cm_fx6: Switch to full DM-aware
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
2020-06-13 13:54 ` [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-10-23 8:28 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 03/16] dh_imx6: " Jagan Teki
` (14 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
Enable DM_SPI/DM_SPI_FLASH with a related config option.
Build fine, but not tested.
Patch-cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
configs/cm_fx6_defconfig | 3 +++
include/configs/cm_fx6.h | 7 -------
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index edaa8e24a5..a55a021a75 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -53,10 +53,12 @@ CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768k(uboot),256k(uboot-environment),-(reserved)"
CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_DM=y
CONFIG_DWC_AHSATA=y
# CONFIG_DWC_AHSATA_AHCI is not set
CONFIG_DM_KEYBOARD=y
@@ -83,6 +85,7 @@ CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 302907dcfb..55761450b1 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -151,13 +151,6 @@
/* APBH DMA is required for NAND support */
#endif
-/* SPI Flash Configs */
-#if defined(CONFIG_SPL_BUILD)
-#undef CONFIG_DM_SPI
-#undef CONFIG_DM_SPI_FLASH
-#undef CONFIG_SPI_FLASH_MTD
-#endif
-
/* Ethernet */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR 0
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 03/16] dh_imx6: Switch to full DM-aware
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
2020-06-13 13:54 ` [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH Jagan Teki
2020-06-13 13:54 ` [PATCH 02/16] cm_fx6: Switch to full DM-aware Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 04/16] arm: Remove mx51evk board Jagan Teki
` (13 subsequent siblings)
16 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
Enable DM_SPI/DM_SPI_FLASH with a related config option.
Build fine, but not tested.
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
configs/dh_imx6_defconfig | 3 +++
include/configs/dh_imx6.h | 6 ------
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index d20405e5b2..da756a8e3d 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -49,12 +49,14 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6q-dhcom-pdk2"
CONFIG_OF_LIST="imx6q-dhcom-pdk2 imx6dl-dhcom-pdk2"
CONFIG_MULTI_DTB_FIT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM=y
CONFIG_DWC_AHSATA=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_I2C=y
@@ -100,4 +102,5 @@ CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
CONFIG_IMX_WATCHDOG=y
+# CONFIG_SPL_WDT is not set
CONFIG_BZIP2=y
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 5bfdf4044b..5fb84f72a2 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -53,12 +53,6 @@
/* SATA Configs */
#define CONFIG_LBA48
-/* SPI Flash Configs */
-#if defined(CONFIG_SPL_BUILD)
-#undef CONFIG_DM_SPI
-#undef CONFIG_DM_SPI_FLASH
-#endif
-
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 04/16] arm: Remove mx51evk board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (2 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 03/16] dh_imx6: " Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 05/16] arm: Remove ts4800 board Jagan Teki
` (12 subsequent siblings)
16 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx5/Kconfig | 6 -
board/freescale/mx51evk/Kconfig | 15 -
board/freescale/mx51evk/MAINTAINERS | 6 -
board/freescale/mx51evk/Makefile | 8 -
board/freescale/mx51evk/imximage.cfg | 108 -------
board/freescale/mx51evk/mx51evk.c | 401 ------------------------
board/freescale/mx51evk/mx51evk_video.c | 98 ------
configs/mx51evk_defconfig | 42 ---
include/configs/mx51evk.h | 197 ------------
9 files changed, 881 deletions(-)
delete mode 100644 board/freescale/mx51evk/Kconfig
delete mode 100644 board/freescale/mx51evk/MAINTAINERS
delete mode 100644 board/freescale/mx51evk/Makefile
delete mode 100644 board/freescale/mx51evk/imximage.cfg
delete mode 100644 board/freescale/mx51evk/mx51evk.c
delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
delete mode 100644 configs/mx51evk_defconfig
delete mode 100644 include/configs/mx51evk.h
diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig
index bde37bb97e..dd21aea342 100644
--- a/arch/arm/mach-imx/mx5/Kconfig
+++ b/arch/arm/mach-imx/mx5/Kconfig
@@ -39,11 +39,6 @@ config TARGET_M53MENLO
select MX53
select SUPPORT_SPL
-config TARGET_MX51EVK
- bool "Support mx51evk"
- select BOARD_LATE_INIT
- select MX51
-
config TARGET_MX53ARD
bool "Support mx53ard"
select MX53
@@ -90,7 +85,6 @@ config SYS_SOC
default "mx5"
source "board/beckhoff/mx53cx9020/Kconfig"
-source "board/freescale/mx51evk/Kconfig"
source "board/freescale/mx53ard/Kconfig"
source "board/freescale/mx53evk/Kconfig"
source "board/freescale/mx53loco/Kconfig"
diff --git a/board/freescale/mx51evk/Kconfig b/board/freescale/mx51evk/Kconfig
deleted file mode 100644
index f9b69cbd66..0000000000
--- a/board/freescale/mx51evk/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_MX51EVK
-
-config SYS_BOARD
- default "mx51evk"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_SOC
- default "mx5"
-
-config SYS_CONFIG_NAME
- default "mx51evk"
-
-endif
diff --git a/board/freescale/mx51evk/MAINTAINERS b/board/freescale/mx51evk/MAINTAINERS
deleted file mode 100644
index 0e5f22c26b..0000000000
--- a/board/freescale/mx51evk/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MX51EVK BOARD
-M: Stefano Babic <sbabic@denx.de>
-S: Maintained
-F: board/freescale/mx51evk/
-F: include/configs/mx51evk.h
-F: configs/mx51evk_defconfig
diff --git a/board/freescale/mx51evk/Makefile b/board/freescale/mx51evk/Makefile
deleted file mode 100644
index 1a9581cabf..0000000000
--- a/board/freescale/mx51evk/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2009 Freescale Semiconductor, Inc.
-
-obj-y += mx51evk.o
-obj-$(CONFIG_VIDEO) += mx51evk_video.o
diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg
deleted file mode 100644
index ff2ec4aa27..0000000000
--- a/board/freescale/mx51evk/imximage.cfg
+++ /dev/null
@@ -1,108 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C Copyright 2009
- * Stefano Babic DENX Software Engineering sbabic at denx.de.
- *
- * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM spi
-
-/*
- * Device Configuration Data (DCD)
- *
- * Each entry must have the format:
- * Addr-type Address Value
- *
- * where:
- * Addr-type register length (1,2 or 4 bytes)
- * Address absolute address of the register
- * value value to be stored in the register
- */
-
-/* Setting IOMUXC */
-DATA 4 0x73FA88a0 0x200
-DATA 4 0x73FA850c 0x20c5
-DATA 4 0x73FA8510 0x20c5
-DATA 4 0x73FA883c 0x2
-DATA 4 0x73FA8848 0x2
-DATA 4 0x73FA84b8 0xe7
-DATA 4 0x73FA84bc 0x45
-DATA 4 0x73FA84c0 0x45
-DATA 4 0x73FA84c4 0x45
-DATA 4 0x73FA84c8 0x45
-DATA 4 0x73FA8820 0x0
-DATA 4 0x73FA84a4 0x3
-DATA 4 0x73FA84a8 0x3
-DATA 4 0x73FA84ac 0xe3
-DATA 4 0x73FA84b0 0xe3
-DATA 4 0x73FA84b4 0xe3
-DATA 4 0x73FA84cc 0xe3
-DATA 4 0x73FA84d0 0xe2
-
-DATA 4 0x73FA882c 0x6
-DATA 4 0x73FA88a4 0x6
-DATA 4 0x73FA88ac 0x6
-DATA 4 0x73FA88b8 0x6
-
-/*
- * Setting DDR for micron
- * 13 Rows, 10 Cols, 32 bit, SREF=4 Micron Model
- * CAS=3 BL=4
- */
-/* ESDCTL_ESDCTL0 */
-DATA 4 0x83FD9000 0x82a20000
-/* ESDCTL_ESDCTL1 */
-DATA 4 0x83FD9008 0x82a20000
-/* ESDCTL_ESDMISC */
-DATA 4 0x83FD9010 0x000ad0d0
-/* ESDCTL_ESDCFG0 */
-DATA 4 0x83FD9004 0x333574aa
-/* ESDCTL_ESDCFG1 */
-DATA 4 0x83FD900C 0x333574aa
-
-/* Init DRAM on CS0 */
-/* ESDCTL_ESDSCR */
-DATA 4 0x83FD9014 0x04008008
-DATA 4 0x83FD9014 0x0000801a
-DATA 4 0x83FD9014 0x0000801b
-DATA 4 0x83FD9014 0x00448019
-DATA 4 0x83FD9014 0x07328018
-DATA 4 0x83FD9014 0x04008008
-DATA 4 0x83FD9014 0x00008010
-DATA 4 0x83FD9014 0x00008010
-DATA 4 0x83FD9014 0x06328018
-DATA 4 0x83FD9014 0x03808019
-DATA 4 0x83FD9014 0x00408019
-DATA 4 0x83FD9014 0x00008000
-
-/* Init DRAM on CS1 */
-DATA 4 0x83FD9014 0x0400800c
-DATA 4 0x83FD9014 0x0000801e
-DATA 4 0x83FD9014 0x0000801f
-DATA 4 0x83FD9014 0x0000801d
-DATA 4 0x83FD9014 0x0732801c
-DATA 4 0x83FD9014 0x0400800c
-DATA 4 0x83FD9014 0x00008014
-DATA 4 0x83FD9014 0x00008014
-DATA 4 0x83FD9014 0x0632801c
-DATA 4 0x83FD9014 0x0380801d
-DATA 4 0x83FD9014 0x0040801d
-DATA 4 0x83FD9014 0x00008004
-
-/* Write to CTL0 */
-DATA 4 0x83FD9000 0xb2a20000
-/* Write to CTL1 */
-DATA 4 0x83FD9008 0xb2a20000
-/* ESDMISC */
-DATA 4 0x83FD9010 0x000ad6d0
-/* ESDCTL_ESDCDLYGD */
-DATA 4 0x83FD9034 0x90000000
-DATA 4 0x83FD9014 0x00000000
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
deleted file mode 100644
index 46037acc0e..0000000000
--- a/board/freescale/mx51evk/mx51evk.c
+++ /dev/null
@@ -1,401 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <init.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux-mx51.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/clock.h>
-#include <asm/mach-imx/mx5_video.h>
-#include <i2c.h>
-#include <input.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <power/pmic.h>
-#include <fsl_pmic.h>
-#include <mc13892.h>
-#include <usb/ehci-ci.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-struct fsl_esdhc_cfg esdhc_cfg[2] = {
- {MMC_SDHC1_BASE_ADDR},
- {MMC_SDHC2_BASE_ADDR},
-};
-#endif
-
-int dram_init(void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- PHYS_SDRAM_1_SIZE);
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- u32 rev = get_cpu_rev();
- if (!gpio_get_value(IMX_GPIO_NR(1, 22)))
- rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
- return rev;
-}
-
-#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)
-
-static void setup_iomux_uart(void)
-{
- static const iomux_v3_cfg_t uart_pads[] = {
- MX51_PAD_UART1_RXD__UART1_RXD,
- MX51_PAD_UART1_TXD__UART1_TXD,
- NEW_PAD_CTRL(MX51_PAD_UART1_RTS__UART1_RTS, UART_PAD_CTRL),
- NEW_PAD_CTRL(MX51_PAD_UART1_CTS__UART1_CTS, UART_PAD_CTRL),
- };
-
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-}
-
-static void setup_iomux_fec(void)
-{
- static const iomux_v3_cfg_t fec_pads[] = {
- NEW_PAD_CTRL(MX51_PAD_EIM_EB2__FEC_MDIO, PAD_CTL_HYS |
- PAD_CTL_PUS_22K_UP | PAD_CTL_ODE |
- PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
- MX51_PAD_NANDF_CS3__FEC_MDC,
- NEW_PAD_CTRL(MX51_PAD_EIM_CS3__FEC_RDATA3, MX51_PAD_CTRL_2),
- NEW_PAD_CTRL(MX51_PAD_EIM_CS2__FEC_RDATA2, MX51_PAD_CTRL_2),
- NEW_PAD_CTRL(MX51_PAD_EIM_EB3__FEC_RDATA1, MX51_PAD_CTRL_2),
- MX51_PAD_NANDF_D9__FEC_RDATA0,
- MX51_PAD_NANDF_CS6__FEC_TDATA3,
- MX51_PAD_NANDF_CS5__FEC_TDATA2,
- MX51_PAD_NANDF_CS4__FEC_TDATA1,
- MX51_PAD_NANDF_D8__FEC_TDATA0,
- MX51_PAD_NANDF_CS7__FEC_TX_EN,
- MX51_PAD_NANDF_CS2__FEC_TX_ER,
- MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
- NEW_PAD_CTRL(MX51_PAD_NANDF_RB2__FEC_COL, MX51_PAD_CTRL_4),
- NEW_PAD_CTRL(MX51_PAD_NANDF_RB3__FEC_RX_CLK, MX51_PAD_CTRL_4),
- MX51_PAD_EIM_CS5__FEC_CRS,
- MX51_PAD_EIM_CS4__FEC_RX_ER,
- NEW_PAD_CTRL(MX51_PAD_NANDF_D11__FEC_RX_DV, MX51_PAD_CTRL_4),
- };
-
- imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
-}
-
-#ifdef CONFIG_MXC_SPI
-static void setup_iomux_spi(void)
-{
- static const iomux_v3_cfg_t spi_pads[] = {
- NEW_PAD_CTRL(MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, PAD_CTL_HYS |
- PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_CSPI1_MISO__ECSPI1_MISO, PAD_CTL_HYS |
- PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_CSPI1_SS1__ECSPI1_SS1,
- MX51_GPIO_PAD_CTRL),
- MX51_PAD_CSPI1_SS0__ECSPI1_SS0,
- NEW_PAD_CTRL(MX51_PAD_CSPI1_RDY__ECSPI1_RDY, MX51_PAD_CTRL_2),
- NEW_PAD_CTRL(MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, PAD_CTL_HYS |
- PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
- };
-
- imx_iomux_v3_setup_multiple_pads(spi_pads, ARRAY_SIZE(spi_pads));
-}
-#endif
-
-#ifdef CONFIG_USB_EHCI_MX5
-#define MX51EVK_USBH1_HUB_RST IMX_GPIO_NR(1, 7)
-#define MX51EVK_USBH1_STP IMX_GPIO_NR(1, 27)
-#define MX51EVK_USB_CLK_EN_B IMX_GPIO_NR(2, 1)
-#define MX51EVK_USB_PHY_RESET IMX_GPIO_NR(2, 5)
-
-static void setup_usb_h1(void)
-{
- static const iomux_v3_cfg_t usb_h1_pads[] = {
- MX51_PAD_USBH1_CLK__USBH1_CLK,
- MX51_PAD_USBH1_DIR__USBH1_DIR,
- MX51_PAD_USBH1_STP__USBH1_STP,
- MX51_PAD_USBH1_NXT__USBH1_NXT,
- MX51_PAD_USBH1_DATA0__USBH1_DATA0,
- MX51_PAD_USBH1_DATA1__USBH1_DATA1,
- MX51_PAD_USBH1_DATA2__USBH1_DATA2,
- MX51_PAD_USBH1_DATA3__USBH1_DATA3,
- MX51_PAD_USBH1_DATA4__USBH1_DATA4,
- MX51_PAD_USBH1_DATA5__USBH1_DATA5,
- MX51_PAD_USBH1_DATA6__USBH1_DATA6,
- MX51_PAD_USBH1_DATA7__USBH1_DATA7,
-
- NEW_PAD_CTRL(MX51_PAD_GPIO1_7__GPIO1_7, 0), /* H1 hub reset */
- MX51_PAD_EIM_D17__GPIO2_1,
- MX51_PAD_EIM_D21__GPIO2_5, /* PHY reset */
- };
-
- imx_iomux_v3_setup_multiple_pads(usb_h1_pads, ARRAY_SIZE(usb_h1_pads));
-}
-
-int board_ehci_hcd_init(int port)
-{
- /* Set USBH1_STP to GPIO and toggle it */
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_USBH1_STP__GPIO1_27,
- MX51_USBH_PAD_CTRL));
-
- gpio_direction_output(MX51EVK_USBH1_STP, 0);
- gpio_direction_output(MX51EVK_USB_PHY_RESET, 0);
- mdelay(10);
- gpio_set_value(MX51EVK_USBH1_STP, 1);
-
- /* Set back USBH1_STP to be function */
- imx_iomux_v3_setup_pad(MX51_PAD_USBH1_STP__USBH1_STP);
-
- /* De-assert USB PHY RESETB */
- gpio_set_value(MX51EVK_USB_PHY_RESET, 1);
-
- /* Drive USB_CLK_EN_B line low */
- gpio_direction_output(MX51EVK_USB_CLK_EN_B, 0);
-
- /* Reset USB hub */
- gpio_direction_output(MX51EVK_USBH1_HUB_RST, 0);
- mdelay(2);
- gpio_set_value(MX51EVK_USBH1_HUB_RST, 1);
- return 0;
-}
-#endif
-
-static void power_init(void)
-{
- unsigned int val;
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE;
- struct pmic *p;
- int ret;
-
- ret = pmic_init(CONFIG_FSL_PMIC_BUS);
- if (ret)
- return;
-
- p = pmic_get("FSL_PMIC");
- if (!p)
- return;
-
- /* Write needed to Power Gate 2 register */
- pmic_reg_read(p, REG_POWER_MISC, &val);
- val &= ~PWGT2SPIEN;
- pmic_reg_write(p, REG_POWER_MISC, val);
-
- /* Externally powered */
- pmic_reg_read(p, REG_CHARGE, &val);
- val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
- pmic_reg_write(p, REG_CHARGE, val);
-
- /* power up the system first */
- pmic_reg_write(p, REG_POWER_MISC, PWUP);
-
- /* Set core voltage to 1.1V */
- pmic_reg_read(p, REG_SW_0, &val);
- val = (val & ~SWx_VOLT_MASK) | SWx_1_100V;
- pmic_reg_write(p, REG_SW_0, val);
-
- /* Setup VCC (SW2) to 1.25 */
- pmic_reg_read(p, REG_SW_1, &val);
- val = (val & ~SWx_VOLT_MASK) | SWx_1_250V;
- pmic_reg_write(p, REG_SW_1, val);
-
- /* Setup 1V2_DIG1 (SW3) to 1.25 */
- pmic_reg_read(p, REG_SW_2, &val);
- val = (val & ~SWx_VOLT_MASK) | SWx_1_250V;
- pmic_reg_write(p, REG_SW_2, val);
- udelay(50);
-
- /* Raise the core frequency to 800MHz */
- writel(0x0, &mxc_ccm->cacrr);
-
- /* Set switchers in Auto in NORMAL mode & STANDBY mode */
- /* Setup the switcher mode for SW1 & SW2*/
- pmic_reg_read(p, REG_SW_4, &val);
- val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) |
- (SWMODE_MASK << SWMODE2_SHIFT)));
- val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) |
- (SWMODE_AUTO_AUTO << SWMODE2_SHIFT);
- pmic_reg_write(p, REG_SW_4, val);
-
- /* Setup the switcher mode for SW3 & SW4 */
- pmic_reg_read(p, REG_SW_5, &val);
- val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) |
- (SWMODE_MASK << SWMODE4_SHIFT)));
- val |= (SWMODE_AUTO_AUTO << SWMODE3_SHIFT) |
- (SWMODE_AUTO_AUTO << SWMODE4_SHIFT);
- pmic_reg_write(p, REG_SW_5, val);
-
- /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */
- pmic_reg_read(p, REG_SETTING_0, &val);
- val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK);
- val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6;
- pmic_reg_write(p, REG_SETTING_0, val);
-
- /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
- pmic_reg_read(p, REG_SETTING_1, &val);
- val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK);
- val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775;
- pmic_reg_write(p, REG_SETTING_1, val);
-
- /* Configure VGEN3 and VCAM regulators to use external PNP */
- val = VGEN3CONFIG | VCAMCONFIG;
- pmic_reg_write(p, REG_MODE_1, val);
- udelay(200);
-
- /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
- val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |
- VVIDEOEN | VAUDIOEN | VSDEN;
- pmic_reg_write(p, REG_MODE_1, val);
-
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_EIM_A20__GPIO2_14,
- NO_PAD_CTRL));
- gpio_direction_output(IMX_GPIO_NR(2, 14), 0);
-
- udelay(500);
-
- gpio_set_value(IMX_GPIO_NR(2, 14), 1);
-}
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret;
-
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0,
- NO_PAD_CTRL));
- gpio_direction_input(IMX_GPIO_NR(1, 0));
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6,
- NO_PAD_CTRL));
- gpio_direction_input(IMX_GPIO_NR(1, 6));
-
- if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
- ret = !gpio_get_value(IMX_GPIO_NR(1, 0));
- else
- ret = !gpio_get_value(IMX_GPIO_NR(1, 6));
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- static const iomux_v3_cfg_t sd1_pads[] = {
- NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX |
- PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS),
- NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS),
- };
-
- static const iomux_v3_cfg_t sd2_pads[] = {
- NEW_PAD_CTRL(MX51_PAD_SD2_CMD__SD2_CMD,
- PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD2_CLK__SD2_CLK,
- PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD2_DATA0__SD2_DATA0,
- PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD2_DATA1__SD2_DATA1,
- PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD2_DATA2__SD2_DATA2,
- PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD2_DATA3__SD2_DATA3,
- PAD_CTL_DSE_MAX | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6, PAD_CTL_HYS),
- NEW_PAD_CTRL(MX51_PAD_GPIO1_5__GPIO1_5, PAD_CTL_HYS),
- };
-
- u32 index;
- int ret;
-
- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
-
- for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM;
- index++) {
- switch (index) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(sd1_pads,
- ARRAY_SIZE(sd1_pads));
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(sd2_pads,
- ARRAY_SIZE(sd2_pads));
- break;
- default:
- printf("Warning: you configured more ESDHC controller"
- "(%d) as supported by the board(2)\n",
- CONFIG_SYS_FSL_ESDHC_NUM);
- return -EINVAL;
- }
- ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
- if (ret)
- return ret;
- }
- return 0;
-}
-#endif
-
-int board_early_init_f(void)
-{
- setup_iomux_uart();
- setup_iomux_fec();
-#ifdef CONFIG_USB_EHCI_MX5
- setup_usb_h1();
-#endif
- setup_iomux_lcd();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- return 0;
-}
-
-#ifdef CONFIG_BOARD_LATE_INIT
-int board_late_init(void)
-{
-#ifdef CONFIG_MXC_SPI
- setup_iomux_spi();
- power_init();
-#endif
-
- return 0;
-}
-#endif
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
- return 1;
-}
-
-int checkboard(void)
-{
- puts("Board: MX51EVK\n");
-
- return 0;
-}
diff --git a/board/freescale/mx51evk/mx51evk_video.c b/board/freescale/mx51evk/mx51evk_video.c
deleted file mode 100644
index 3715c5d738..0000000000
--- a/board/freescale/mx51evk/mx51evk_video.c
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
- * Fabio Estevam <fabio.estevam@freescale.com>
- */
-
-#include <common.h>
-#include <env.h>
-#include <linux/list.h>
-#include <asm/gpio.h>
-#include <asm/arch/iomux-mx51.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-
-#define MX51EVK_LCD_3V3 IMX_GPIO_NR(4, 9)
-#define MX51EVK_LCD_5V IMX_GPIO_NR(4, 10)
-#define MX51EVK_LCD_BACKLIGHT IMX_GPIO_NR(3, 4)
-
-static struct fb_videomode const claa_wvga = {
- .name = "CLAA07LC0ACW",
- .refresh = 57,
- .xres = 800,
- .yres = 480,
- .pixclock = 37037,
- .left_margin = 40,
- .right_margin = 60,
- .upper_margin = 10,
- .lower_margin = 10,
- .hsync_len = 20,
- .vsync_len = 10,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED
-};
-
-static struct fb_videomode const dvi = {
- .name = "DVI panel",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED
-};
-
-void setup_iomux_lcd(void)
-{
- /* DI2_PIN15 */
- imx_iomux_v3_setup_pad(MX51_PAD_DI_GP4__DI2_PIN15);
-
- /* Pad settings for DI2_DISP_CLK */
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK,
- PAD_CTL_PKE | PAD_CTL_DSE_MAX | PAD_CTL_SRE_SLOW));
-
- /* Turn on 3.3V voltage for LCD */
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_CSI2_D12__GPIO4_9,
- NO_PAD_CTRL));
- gpio_direction_output(MX51EVK_LCD_3V3, 1);
-
- /* Turn on 5V voltage for LCD */
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_CSI2_D13__GPIO4_10,
- NO_PAD_CTRL));
- gpio_direction_output(MX51EVK_LCD_5V, 1);
-
- /* Turn on GPIO backlight */
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_DI1_D1_CS__GPIO3_4,
- NO_PAD_CTRL));
- gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1);
-}
-
-int board_video_skip(void)
-{
- int ret;
- char const *e = env_get("panel");
-
- if (e) {
- if (strcmp(e, "claa") == 0) {
- ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
- if (ret)
- printf("claa cannot be configured: %d\n", ret);
- return ret;
- }
- }
-
- /*
- * 'panel' env variable not found or has different value than 'claa'
- * Defaulting to dvi output.
- */
- ret = ipuv3_fb_init(&dvi, 0, IPU_PIX_FMT_RGB24);
- if (ret)
- printf("dvi cannot be configured: %d\n", ret);
- return ret;
-}
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
deleted file mode 100644
index dbc4d85a22..0000000000
--- a/configs/mx51evk_defconfig
+++ /dev/null
@@ -1,42 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x97800000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_TARGET_MX51EVK=y
-CONFIG_NR_DRAM_BANKS=1
-# CONFIG_CMD_BMODE is not set
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
-CONFIG_USE_PREBOOT=y
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_FUSE=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
-CONFIG_CMD_FAT=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_FSL_ESDHC_IMX=y
-CONFIG_MTD=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_MX5=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
deleted file mode 100644
index 182648a0f1..0000000000
--- a/include/configs/mx51evk.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * (C) Copyright 2009 Freescale Semiconductor, Inc.
- *
- * Configuration settings for the MX51EVK Board
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
- /* High Level Configuration Options */
-
-#define CONFIG_SYS_FSL_CLK
-
-#include <asm/arch/imx-regs.h>
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-#define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_FSL_IIM
-
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/* PMIC Controller */
-#define CONFIG_POWER
-#define CONFIG_POWER_SPI
-#define CONFIG_POWER_FSL
-#define CONFIG_FSL_PMIC_BUS 0
-#define CONFIG_FSL_PMIC_CS 0
-#define CONFIG_FSL_PMIC_CLK 2500000
-#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
-#define CONFIG_FSL_PMIC_BITLEN 32
-#define CONFIG_RTC_MC13XXX
-
-/*
- * MMC Configs
- * */
-#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
-#define CONFIG_SYS_FSL_ESDHC_NUM 2
-
-/*
- * Eth Configs
- */
-
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
-
-/* USB Configs */
-#define CONFIG_MXC_USB_PORT 1
-#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
-#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
-
-/* Framebuffer and LCD */
-#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_BMP_16BPP
-#define CONFIG_VIDEO_LOGO
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_ETHPRIME "FEC0"
-
-#define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "image=zImage\0" \
- "fdt_file=imx51-babbage.dtb\0" \
- "fdt_addr=0x91000000\0" \
- "boot_fdt=try\0" \
- "ip_dyn=yes\0" \
- "mmcdev=0\0" \
- "mmcpart=1\0" \
- "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
- "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
- "root=${mmcroot}\0" \
- "loadbootscript=" \
- "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source\0" \
- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
- "if run loadfdt; then " \
- "bootz ${loadaddr} - ${fdt_addr}; " \
- "else " \
- "if test ${boot_fdt} = try; then " \
- "bootz; " \
- "else " \
- "echo WARN: Cannot load the DT; " \
- "fi; " \
- "fi; " \
- "else " \
- "bootz; " \
- "fi;\0" \
- "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
- "root=/dev/nfs " \
- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
- "netboot=echo Booting from net ...; " \
- "run netargs; " \
- "if test ${ip_dyn} = yes; then " \
- "setenv get_cmd dhcp; " \
- "else " \
- "setenv get_cmd tftp; " \
- "fi; " \
- "${get_cmd} ${image}; " \
- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
- "bootz ${loadaddr} - ${fdt_addr}; " \
- "else " \
- "if test ${boot_fdt} = try; then " \
- "bootz; " \
- "else " \
- "echo ERROR: Cannot load the DT; " \
- "exit; " \
- "fi; " \
- "fi; " \
- "else " \
- "bootz; " \
- "fi;\0"
-
-#define CONFIG_BOOTCOMMAND \
- "mmc dev ${mmcdev}; if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loadimage; then " \
- "run mmcboot; " \
- "else run netboot; " \
- "fi; " \
- "fi; " \
- "else run netboot; fi"
-
-#define CONFIG_ARP_TIMEOUT 200UL
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1 CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
-#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
-#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-#define CONFIG_SYS_DDR_CLKSEL 0
-#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
-#define CONFIG_SYS_MAIN_PWR_ON
-
-/*-----------------------------------------------------------------------
- * environment organization
- */
-
-/*
- * Environment starts at CONFIG_ENV_OFFSET=0xC0000 = 768k = 768 * 1024 = 786432
- *
- * Detect overlap between U-Boot image and environment area in build-time
- *
- * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset
- * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408
- *
- * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
- * write the direct value here
- */
-#define CONFIG_BOARD_SIZE_LIMIT 785408
-#define CONFIG_SYS_MMC_ENV_DEV 0
-
-#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 05/16] arm: Remove ts4800 board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (3 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 04/16] arm: Remove mx51evk board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 12:53 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 06/16] arm: Remove tqma6s_wru4_mmc_defconfig Jagan Teki
` (11 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx5/Kconfig | 5 -
board/technologic/ts4800/Kconfig | 15 --
board/technologic/ts4800/MAINTAINERS | 6 -
board/technologic/ts4800/Makefile | 5 -
board/technologic/ts4800/ts4800.c | 262 ---------------------------
board/technologic/ts4800/ts4800.h | 15 --
configs/ts4800_defconfig | 28 ---
include/configs/ts4800.h | 139 --------------
8 files changed, 475 deletions(-)
delete mode 100644 board/technologic/ts4800/Kconfig
delete mode 100644 board/technologic/ts4800/MAINTAINERS
delete mode 100644 board/technologic/ts4800/Makefile
delete mode 100644 board/technologic/ts4800/ts4800.c
delete mode 100644 board/technologic/ts4800/ts4800.h
delete mode 100644 configs/ts4800_defconfig
delete mode 100644 include/configs/ts4800.h
diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig
index dd21aea342..932283fbe3 100644
--- a/arch/arm/mach-imx/mx5/Kconfig
+++ b/arch/arm/mach-imx/mx5/Kconfig
@@ -71,10 +71,6 @@ config TARGET_MX53SMD
bool "Support mx53smd"
select MX53
-config TARGET_TS4800
- bool "Support TS4800"
- select MX51
-
config TARGET_USBARMORY
bool "Support USB armory"
select MX53
@@ -93,6 +89,5 @@ source "board/ge/mx53ppd/Kconfig"
source "board/inversepath/usbarmory/Kconfig"
source "board/k+p/kp_imx53/Kconfig"
source "board/menlo/m53menlo/Kconfig"
-source "board/technologic/ts4800/Kconfig"
endif
diff --git a/board/technologic/ts4800/Kconfig b/board/technologic/ts4800/Kconfig
deleted file mode 100644
index a28d5e41bd..0000000000
--- a/board/technologic/ts4800/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_TS4800
-
-config SYS_BOARD
- default "ts4800"
-
-config SYS_VENDOR
- default "technologic"
-
-config SYS_SOC
- default "mx5"
-
-config SYS_CONFIG_NAME
- default "ts4800"
-
-endif
diff --git a/board/technologic/ts4800/MAINTAINERS b/board/technologic/ts4800/MAINTAINERS
deleted file mode 100644
index e013ee42f8..0000000000
--- a/board/technologic/ts4800/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-TS4800 BOARD
-M: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
-S: Maintained
-F: board/ts/ts4800/
-F: include/configs/ts4800.h
-F: configs/ts4800_defconfig
diff --git a/board/technologic/ts4800/Makefile b/board/technologic/ts4800/Makefile
deleted file mode 100644
index ec33cf92ca..0000000000
--- a/board/technologic/ts4800/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2015 Savoir-faire Linux
-
-obj-y += ts4800.o
diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c
deleted file mode 100644
index 28918de547..0000000000
--- a/board/technologic/ts4800/ts4800.c
+++ /dev/null
@@ -1,262 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2015 Savoir-faire Linux Inc.
- *
- * Derived from MX51EVK code by
- * Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <init.h>
-#include <log.h>
-#include <net.h>
-#include <asm/io.h>
-#include <asm/gpio.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux-mx51.h>
-#include <env.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/clock.h>
-#include <asm/mach-imx/mx5_video.h>
-#include <mmc.h>
-#include <input.h>
-#include <fsl_esdhc_imx.h>
-#include <mc13892.h>
-
-#include <malloc.h>
-#include <netdev.h>
-#include <phy.h>
-#include "ts4800.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-struct fsl_esdhc_cfg esdhc_cfg[2] = {
- {MMC_SDHC1_BASE_ADDR},
- {MMC_SDHC2_BASE_ADDR},
-};
-#endif
-
-int dram_init(void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- PHYS_SDRAM_1_SIZE);
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- u32 rev = get_cpu_rev();
- if (!gpio_get_value(IMX_GPIO_NR(1, 22)))
- rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
- return rev;
-}
-
-#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_HIGH)
-
-static void setup_iomux_uart(void)
-{
- static const iomux_v3_cfg_t uart_pads[] = {
- MX51_PAD_UART1_RXD__UART1_RXD,
- MX51_PAD_UART1_TXD__UART1_TXD,
- NEW_PAD_CTRL(MX51_PAD_UART1_RTS__UART1_RTS, UART_PAD_CTRL),
- NEW_PAD_CTRL(MX51_PAD_UART1_CTS__UART1_CTS, UART_PAD_CTRL),
- };
-
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-}
-
-static void setup_iomux_fec(void)
-{
- static const iomux_v3_cfg_t fec_pads[] = {
- NEW_PAD_CTRL(MX51_PAD_EIM_EB2__FEC_MDIO,
- PAD_CTL_HYS |
- PAD_CTL_PUS_22K_UP |
- PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST),
- MX51_PAD_EIM_EB3__FEC_RDATA1,
- NEW_PAD_CTRL(MX51_PAD_EIM_CS2__FEC_RDATA2, PAD_CTL_HYS),
- MX51_PAD_EIM_CS3__FEC_RDATA3,
- MX51_PAD_NANDF_CS2__FEC_TX_ER,
- MX51_PAD_EIM_CS5__FEC_CRS,
- MX51_PAD_EIM_CS4__FEC_RX_ER,
- /* PAD used on TS4800 */
- MX51_PAD_DI2_PIN2__FEC_MDC,
- MX51_PAD_DISP2_DAT14__FEC_RDAT0,
- MX51_PAD_DISP2_DAT10__FEC_COL,
- MX51_PAD_DISP2_DAT11__FEC_RXCLK,
- MX51_PAD_DISP2_DAT15__FEC_TDAT0,
- MX51_PAD_DISP2_DAT6__FEC_TDAT1,
- MX51_PAD_DISP2_DAT7__FEC_TDAT2,
- MX51_PAD_DISP2_DAT8__FEC_TDAT3,
- MX51_PAD_DISP2_DAT9__FEC_TX_EN,
- MX51_PAD_DISP2_DAT13__FEC_TX_CLK,
- MX51_PAD_DISP2_DAT12__FEC_RX_DV,
- };
-
- imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
-}
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret;
-
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0,
- NO_PAD_CTRL));
- gpio_direction_input(IMX_GPIO_NR(1, 0));
- imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6,
- NO_PAD_CTRL));
- gpio_direction_input(IMX_GPIO_NR(1, 6));
-
- if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR)
- ret = !gpio_get_value(IMX_GPIO_NR(1, 0));
- else
- ret = !gpio_get_value(IMX_GPIO_NR(1, 6));
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- static const iomux_v3_cfg_t sd1_pads[] = {
- NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX |
- PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_SRE_FAST),
- NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS),
- NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS),
- };
-
- esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
-
- imx_iomux_v3_setup_multiple_pads(sd1_pads, ARRAY_SIZE(sd1_pads));
-
- return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
-}
-#endif
-
-int board_early_init_f(void)
-{
- setup_iomux_uart();
- setup_iomux_fec();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- return 0;
-}
-
-/*
- * Read the MAC address from FEC's registers PALR PAUR.
- * User is supposed to configure these registers when MAC address is known
- * from another source (fuse), but on TS4800, MAC address is not fused and
- * the bootrom configure these registers on startup.
- */
-static int fec_get_mac_from_register(uint32_t base_addr)
-{
- unsigned char ethaddr[6];
- u32 reg_mac[2];
- int i;
-
- reg_mac[0] = in_be32(base_addr + 0xE4);
- reg_mac[1] = in_be32(base_addr + 0xE8);
-
- for(i = 0; i < 6; i++)
- ethaddr[i] = (reg_mac[i / 4] >> ((i % 4) * 8)) & 0xFF;
-
- if (is_valid_ethaddr(ethaddr)) {
- eth_env_set_enetaddr("ethaddr", ethaddr);
- return 0;
- }
-
- return -1;
-}
-
-#define TS4800_GPIO_FEC_PHY_RES IMX_GPIO_NR(2, 14)
-int board_eth_init(bd_t *bd)
-{
- int dev_id = -1;
- int phy_id = 0xFF;
- uint32_t addr = IMX_FEC_BASE;
-
- uint32_t base_mii;
- struct mii_dev *bus = NULL;
- struct phy_device *phydev = NULL;
- int ret;
-
- /* reset FEC phy */
- imx_iomux_v3_setup_pad(MX51_PAD_EIM_A20__GPIO2_14);
- gpio_direction_output(TS4800_GPIO_FEC_PHY_RES, 0);
- mdelay(1);
- gpio_set_value(TS4800_GPIO_FEC_PHY_RES, 1);
- mdelay(1);
-
- base_mii = addr;
- debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr);
- bus = fec_get_miibus(base_mii, dev_id);
- if (!bus)
- return -ENOMEM;
-
- phydev = phy_find_by_mask(bus, phy_id, PHY_INTERFACE_MODE_MII);
- if (!phydev) {
- free(bus);
- return -ENOMEM;
- }
-
- if (fec_get_mac_from_register(addr))
- printf("eth_init: failed to get MAC address\n");
-
- ret = fec_probe(bd, dev_id, addr, bus, phydev);
- if (ret) {
- free(phydev);
- free(bus);
- }
-
- return ret;
-}
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
- return 1;
-}
-
-int checkboard(void)
-{
- puts("Board: TS4800\n");
-
- return 0;
-}
-
-void hw_watchdog_reset(void)
-{
- struct ts4800_wtd_regs *wtd = (struct ts4800_wtd_regs *) (TS4800_SYSCON_BASE + 0xE);
- /* feed the watchdog for another 10s */
- writew(0x2, &wtd->feed);
-}
-
-void hw_watchdog_init(void)
-{
- return;
-}
diff --git a/board/technologic/ts4800/ts4800.h b/board/technologic/ts4800/ts4800.h
deleted file mode 100644
index 25644f523a..0000000000
--- a/board/technologic/ts4800/ts4800.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2015 Savoir-faire Linux Inc.
- */
-
-#ifndef _TS4800_H
-#define _TS4800_H
-
-#define TS4800_SYSCON_BASE 0xb0010000
-
-struct ts4800_wtd_regs {
- u16 feed;
-};
-
-#endif
diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig
deleted file mode 100644
index 810f0d8d88..0000000000
--- a/configs/ts4800_defconfig
+++ /dev/null
@@ -1,28 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX5=y
-CONFIG_SYS_TEXT_BASE=0x90008000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x60000
-CONFIG_TARGET_TS4800=y
-CONFIG_NR_DRAM_BANKS=1
-# CONFIG_CMD_BMODE is not set
-CONFIG_BOOTDELAY=1
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_FAT=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_FSL_ESDHC_IMX=y
-CONFIG_MTD=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SMSC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
deleted file mode 100644
index e563f3fe8a..0000000000
--- a/include/configs/ts4800.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Savoir-faire Linux Inc.
- *
- * Derived from MX51EVK code by
- * Guennadi Liakhovetski <lg@denx.de>
- * Freescale Semiconductor, Inc.
- *
- * Configuration settings for the TS4800 Board
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* High Level Configuration Options */
-
-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */
-
-#define CONFIG_HW_WATCHDOG
-
-#define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
-
-/* text base address used when linking */
-
-#include <asm/arch/imx-regs.h>
-
-/* enable passing of ATAGs */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/*
- * MMC Configs
- * */
-#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
-
-/*
- * Eth Configs
- */
-
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
-
-/***********************************************************
- * Command definition
- ***********************************************************/
-
-/* Environment variables */
-
-
-#define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "image=zImage\0" \
- "fdt_file=imx51-ts4800.dtb\0" \
- "fdt_addr=0x90fe0000\0" \
- "mmcdev=0\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
- "mmcargs=setenv bootargs root=${mmcroot}\0" \
- "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
- "loadbootscript=" \
- "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source\0" \
- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs addtty; " \
- "if run loadfdt; then " \
- "bootz ${loadaddr} - ${fdt_addr}; " \
- "else " \
- "echo ERR: cannot load FDT; " \
- "fi; "
-
-
-#define CONFIG_BOOTCOMMAND \
- "mmc dev ${mmcdev}; if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loadimage; then " \
- "run mmcboot; " \
- "fi; " \
- "fi; " \
- "fi; "
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1 CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
-#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
-#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* Low level init */
-#define CONFIG_SYS_DDR_CLKSEL 0
-#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
-#define CONFIG_SYS_MAIN_PWR_ON
-
-/*-----------------------------------------------------------------------
- * Environment organization
- */
-
-#define CONFIG_SYS_MMC_ENV_DEV 0
-
-#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 06/16] arm: Remove tqma6s_wru4_mmc_defconfig
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (4 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 05/16] arm: Remove ts4800 board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 12:54 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 07/16] arm: Remove pfla02 board Jagan Teki
` (10 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this defconfig.
Remove it.
Patch-cc: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
configs/tqma6s_wru4_mmc_defconfig | 81 -------------------------------
1 file changed, 81 deletions(-)
delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig
deleted file mode 100644
index 73ca9ab2d9..0000000000
--- a/configs/tqma6s_wru4_mmc_defconfig
+++ /dev/null
@@ -1,81 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x100000
-CONFIG_TARGET_TQMA6=y
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_TQMA6S=y
-CONFIG_WRU4=y
-CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTDELAY=3
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="imx6s-wru4.dtb"
-CONFIG_MISC_INIT_R=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_HUSH_PARSER=y
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Enter password in %d seconds to stop autoboot\n"
-CONFIG_AUTOBOOT_ENCRYPTION=y
-CONFIG_AUTOBOOT_STOP_STR_SHA256="36a9e7f1c95b82ffb99743e0c5c4ce95d83c9a430aac59f84ef3cbfab6145068"
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_DATE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_DM is not set
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_SYS_I2C_MXC=y
-CONFIG_LED_STATUS=y
-CONFIG_LED_STATUS0=y
-CONFIG_LED_STATUS_BIT=0
-CONFIG_LED_STATUS_STATE=2
-CONFIG_LED_STATUS1=y
-CONFIG_LED_STATUS_BIT1=1
-CONFIG_LED_STATUS_STATE1=2
-CONFIG_LED_STATUS2=y
-CONFIG_LED_STATUS_BIT2=2
-CONFIG_LED_STATUS_STATE2=2
-CONFIG_LED_STATUS3=y
-CONFIG_LED_STATUS_BIT3=3
-CONFIG_LED_STATUS_STATE3=2
-CONFIG_LED_STATUS4=y
-CONFIG_LED_STATUS_BIT4=4
-CONFIG_LED_STATUS_STATE4=2
-CONFIG_LED_STATUS5=y
-CONFIG_LED_STATUS_BIT5=5
-CONFIG_LED_STATUS_STATE5=2
-CONFIG_LED_STATUS_CMD=y
-CONFIG_PCA9551_LED=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SMSC=y
-CONFIG_MII=y
-# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-CONFIG_MXC_UART=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-CONFIG_IMX_WATCHDOG=y
-CONFIG_OF_LIBFDT=y
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 07/16] arm: Remove pfla02 board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (5 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 06/16] arm: Remove tqma6s_wru4_mmc_defconfig Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 12:55 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 08/16] arm: Remove pcm058 board Jagan Teki
` (9 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 7 -
board/phytec/pfla02/Kconfig | 18 -
board/phytec/pfla02/MAINTAINERS | 6 -
board/phytec/pfla02/Makefile | 7 -
board/phytec/pfla02/README | 24 --
board/phytec/pfla02/pfla02.c | 713 --------------------------------
configs/pfla02_defconfig | 71 ----
include/configs/pfla02.h | 131 ------
8 files changed, 977 deletions(-)
delete mode 100644 board/phytec/pfla02/Kconfig
delete mode 100644 board/phytec/pfla02/MAINTAINERS
delete mode 100644 board/phytec/pfla02/Makefile
delete mode 100644 board/phytec/pfla02/README
delete mode 100644 board/phytec/pfla02/pfla02.c
delete mode 100644 configs/pfla02_defconfig
delete mode 100644 include/configs/pfla02.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index fa6e1112e6..9c9013bd92 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -512,12 +512,6 @@ config TARGET_PCM058
select BOARD_LATE_INIT
select SUPPORT_SPL
-config TARGET_PFLA02
- bool "Phytec PFLA02 (PhyFlex) i.MX6 Quad"
- select BOARD_LATE_INIT
- select MX6QDL
- select SUPPORT_SPL
-
config TARGET_PCL063
bool "PHYTEC PCL063 (phyCORE-i.MX6UL)"
select MX6UL
@@ -715,7 +709,6 @@ source "board/freescale/mx6ul_14x14_evk/Kconfig"
source "board/freescale/mx6ullevk/Kconfig"
source "board/grinn/liteboard/Kconfig"
source "board/phytec/pcm058/Kconfig"
-source "board/phytec/pfla02/Kconfig"
source "board/phytec/pcl063/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
source "board/kosagi/novena/Kconfig"
diff --git a/board/phytec/pfla02/Kconfig b/board/phytec/pfla02/Kconfig
deleted file mode 100644
index f4da68b5ba..0000000000
--- a/board/phytec/pfla02/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-if TARGET_PFLA02
-
-config SYS_BOARD
- default "pfla02"
-
-config SYS_VENDOR
- default "phytec"
-
-config SYS_CONFIG_NAME
- default "pfla02"
-
-config SPL_DRAM_1_BANK
- bool "DRAM on just one bank"
- help
- activate, if the module has just one bank
- of RAM
-
-endif
diff --git a/board/phytec/pfla02/MAINTAINERS b/board/phytec/pfla02/MAINTAINERS
deleted file mode 100644
index 4b069a90cd..0000000000
--- a/board/phytec/pfla02/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-PHYTEC PHYFLEX
-M: Stefano Babic <sbabic@denx.de>
-S: Maintained
-F: board/phytec/pfla02/
-F: include/configs/pfla02.h
-F: configs/pfla02_defconfig
diff --git a/board/phytec/pfla02/Makefile b/board/phytec/pfla02/Makefile
deleted file mode 100644
index c50f315d91..0000000000
--- a/board/phytec/pfla02/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2011 Freescale Semiconductor, Inc.
-
-obj-y := pfla02.o
diff --git a/board/phytec/pfla02/README b/board/phytec/pfla02/README
deleted file mode 100644
index 0f46ab8623..0000000000
--- a/board/phytec/pfla02/README
+++ /dev/null
@@ -1,24 +0,0 @@
-Board information
------------------
-
-The evaluation board "pbab01" is thought to be used
-together with the SOM.
-
-More information on the board can be found on manufacturer's
-website:
-
-http://www.phytec.de/produkt/system-on-modules/phyflex-imx-6/
-
-Building U-Boot
--------------------------------
-
-$ make pfla02_defconfig
-$ make
-
-This generates the artifacts SPL and u-boot.img.
-The SOM can boot from NAND or from SD-Card, having the SPI-NOR
-as second option.
-The dip switch "SW3" on the board let choose the boot device.
-
-SW3_1(on), SW3_2(on), SW3_3(off): Boot first from SD, then try SPI
-SW3_1(off), SW3_2(on), SW3_3(off): Boot from SPI
diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
deleted file mode 100644
index 0a961cc8a5..0000000000
--- a/board/phytec/pfla02/pfla02.c
+++ /dev/null
@@ -1,713 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2017 Stefano Babic <sbabic@denx.de>
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <init.h>
-#include <log.h>
-#include <net.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/spi.h>
-#include <env.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <mmc.h>
-#include <i2c.h>
-#include <fsl_esdhc_imx.h>
-#include <nand.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/sections.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-#define ASRC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define NAND_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 14)
-#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
-#define GREEN_LED IMX_GPIO_NR(2, 31)
-#define RED_LED IMX_GPIO_NR(1, 30)
-#define IMX6Q_DRIVE_STRENGTH 0x30
-
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
- return 0;
-}
-
-static iomux_v3_cfg_t const uart4_pads[] = {
- IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
- IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const enet_pads[] = {
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
- MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK |
- MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
- MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const ecspi3_pads[] = {
- IOMUX_PADS(PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)),
- IOMUX_PADS(PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)),
- IOMUX_PADS(PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)),
- IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const gpios_pads[] = {
- IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT4__GPIO2_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT5__GPIO2_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT6__GPIO2_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT7__GPIO2_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
-/* NAND */
-static iomux_v3_cfg_t const nfc_pads[] = {
- IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_CS1__NAND_CE1_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_CS2__NAND_CE2_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_CS3__NAND_CE3_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT0__NAND_DQS | MUX_PAD_CTRL(NAND_PAD_CTRL)),
-};
-#endif
-
-static struct i2c_pads_info i2c_pad_info = {
- .scl = {
- .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | I2C_PAD,
- .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | I2C_PAD,
- .gp = IMX_GPIO_NR(3, 21)
- },
- .sda = {
- .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | I2C_PAD,
- .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | I2C_PAD,
- .gp = IMX_GPIO_NR(3, 28)
- }
-};
-
-static struct fsl_esdhc_cfg usdhc_cfg[] = {
- {USDHC3_BASE_ADDR,
- .max_bus_width = 4},
- {.esdhc_base = USDHC2_BASE_ADDR,
- .max_bus_width = 4},
-};
-
-#if !defined(CONFIG_SPL_BUILD)
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-#endif
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
- IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-};
-
-int board_mmc_get_env_dev(int devno)
-{
- return devno - 1;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC2_BASE_ADDR:
- ret = !gpio_get_value(USDHC2_CD_GPIO);
- ret = 1;
- break;
- case USDHC3_BASE_ADDR:
- ret = 1;
- break;
- }
-
- return ret;
-}
-
-#ifndef CONFIG_SPL_BUILD
-int board_mmc_init(bd_t *bis)
-{
- int ret;
- int i;
-
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- SETUP_IOMUX_PADS(usdhc3_pads);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- break;
- case 1:
- SETUP_IOMUX_PADS(usdhc2_pads);
- gpio_direction_input(USDHC2_CD_GPIO);
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- break;
- default:
- printf("Warning: you configured more USDHC controllers"
- "(%d) then supported by the board (%d)\n",
- i + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-#endif
-
-static void setup_iomux_uart(void)
-{
- SETUP_IOMUX_PADS(uart4_pads);
-}
-
-static void setup_iomux_enet(void)
-{
- SETUP_IOMUX_PADS(enet_pads);
-
- gpio_direction_output(ENET_PHY_RESET_GPIO, 0);
- mdelay(10);
- gpio_set_value(ENET_PHY_RESET_GPIO, 1);
- mdelay(30);
-}
-
-static void setup_spi(void)
-{
- gpio_request(IMX_GPIO_NR(4, 24), "spi_cs0");
- gpio_direction_output(IMX_GPIO_NR(4, 24), 1);
-
- SETUP_IOMUX_PADS(ecspi3_pads);
-
- enable_spi_clk(true, 2);
-}
-
-static void setup_gpios(void)
-{
- SETUP_IOMUX_PADS(gpios_pads);
-}
-
-#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
-static void setup_gpmi_nand(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- /* config gpmi nand iomux */
- SETUP_IOMUX_PADS(nfc_pads);
-
- /* gate ENFC_CLK_ROOT clock first,before clk source switch */
- clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
-
- /* config gpmi and bch clock to 100 MHz */
- clrsetbits_le32(&mxc_ccm->cs2cdr,
- MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
- MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
- MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
- MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
- MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
- MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
-
- /* enable ENFC_CLK_ROOT clock */
- setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
-
- /* enable gpmi and bch clock gating */
- setbits_le32(&mxc_ccm->CCGR4,
- MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
- MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
- MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
- MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
- MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
-
- /* enable apbh clock gating */
- setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
-}
-#endif
-
-/*
- * Board revision is coded in 4 GPIOs
- */
-u32 get_board_rev(void)
-{
- u32 rev;
- int i;
-
- for (i = 0, rev = 0; i < 4; i++)
- rev |= (gpio_get_value(IMX_GPIO_NR(2, 12 + i)) << i);
-
- return 16 - rev;
-}
-
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- if (bus != 2 || (cs != 0))
- return -EINVAL;
-
- return IMX_GPIO_NR(4, 24);
-}
-
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
-
- return cpu_eth_init(bis);
-}
-
-int board_early_init_f(void)
-{
- setup_iomux_uart();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-#ifdef CONFIG_SYS_I2C_MXC
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info);
-#endif
-
-#ifdef CONFIG_MXC_SPI
- setup_spi();
-#endif
-
- setup_gpios();
-
-#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
- setup_gpmi_nand();
-#endif
- return 0;
-}
-
-
-#ifdef CONFIG_CMD_BMODE
-/*
- * BOOT_CFG1, BOOT_CFG2, BOOT_CFG3, BOOT_CFG4
- * see Table 8-11 and Table 5-9
- * BOOT_CFG1[7] = 1 (boot from NAND)
- * BOOT_CFG1[5] = 0 - raw NAND
- * BOOT_CFG1[4] = 0 - default pad settings
- * BOOT_CFG1[3:2] = 00 - devices = 1
- * BOOT_CFG1[1:0] = 00 - Row Address Cycles = 3
- * BOOT_CFG2[4:3] = 00 - Boot Search Count = 2
- * BOOT_CFG2[2:1] = 01 - Pages In Block = 64
- * BOOT_CFG2[0] = 0 - Reset time 12ms
- */
-static const struct boot_mode board_boot_modes[] = {
- /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
- {"nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00)},
- {"mmc0", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-int board_late_init(void)
-{
- char buf[10];
-#ifdef CONFIG_CMD_BMODE
- add_board_boot_modes(board_boot_modes);
-#endif
-
- snprintf(buf, sizeof(buf), "%d", get_board_rev());
- env_set("board_rev", buf);
-
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-#include <asm/arch/mx6-ddr.h>
-#include <spl.h>
-#include <linux/libfdt.h>
-
-#define MX6_PHYFLEX_ERR006282 IMX_GPIO_NR(2, 11)
-static void phyflex_err006282_workaround(void)
-{
- /*
- * Boards beginning with 1362.2 have the SD4_DAT3 pin connected
- * to the CMIC. If this pin isn't toggled within 10s the boards
- * reset. The pin is unconnected on older boards, so we do not
- * need a check for older boards before applying this fixup.
- */
-
- gpio_direction_output(MX6_PHYFLEX_ERR006282, 0);
- mdelay(2);
- gpio_direction_output(MX6_PHYFLEX_ERR006282, 1);
- mdelay(2);
- gpio_set_value(MX6_PHYFLEX_ERR006282, 0);
-
- gpio_direction_input(MX6_PHYFLEX_ERR006282);
-}
-
-static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
- .dram_sdclk_0 = 0x00000030,
- .dram_sdclk_1 = 0x00000030,
- .dram_cas = 0x00000030,
- .dram_ras = 0x00000030,
- .dram_reset = 0x00000030,
- .dram_sdcke0 = 0x00003000,
- .dram_sdcke1 = 0x00003000,
- .dram_sdba2 = 0x00000030,
- .dram_sdodt0 = 0x00000030,
- .dram_sdodt1 = 0x00000030,
-
- .dram_sdqs0 = 0x00000028,
- .dram_sdqs1 = 0x00000028,
- .dram_sdqs2 = 0x00000028,
- .dram_sdqs3 = 0x00000028,
- .dram_sdqs4 = 0x00000028,
- .dram_sdqs5 = 0x00000028,
- .dram_sdqs6 = 0x00000028,
- .dram_sdqs7 = 0x00000028,
- .dram_dqm0 = 0x00000028,
- .dram_dqm1 = 0x00000028,
- .dram_dqm2 = 0x00000028,
- .dram_dqm3 = 0x00000028,
- .dram_dqm4 = 0x00000028,
- .dram_dqm5 = 0x00000028,
- .dram_dqm6 = 0x00000028,
- .dram_dqm7 = 0x00000028,
-};
-
-static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
- .grp_ddr_type = 0x000C0000,
- .grp_ddrmode_ctl = 0x00020000,
- .grp_ddrpke = 0x00000000,
- .grp_addds = IMX6Q_DRIVE_STRENGTH,
- .grp_ctlds = IMX6Q_DRIVE_STRENGTH,
- .grp_ddrmode = 0x00020000,
- .grp_b0ds = 0x00000028,
- .grp_b1ds = 0x00000028,
- .grp_b2ds = 0x00000028,
- .grp_b3ds = 0x00000028,
- .grp_b4ds = 0x00000028,
- .grp_b5ds = 0x00000028,
- .grp_b6ds = 0x00000028,
- .grp_b7ds = 0x00000028,
-};
-
-static const struct mx6_mmdc_calibration mx6_mmcd_calib = {
- .p0_mpwldectrl0 = 0x00110011,
- .p0_mpwldectrl1 = 0x00240024,
- .p1_mpwldectrl0 = 0x00260038,
- .p1_mpwldectrl1 = 0x002C0038,
- .p0_mpdgctrl0 = 0x03400350,
- .p0_mpdgctrl1 = 0x03440340,
- .p1_mpdgctrl0 = 0x034C0354,
- .p1_mpdgctrl1 = 0x035C033C,
- .p0_mprddlctl = 0x322A2A2A,
- .p1_mprddlctl = 0x302C2834,
- .p0_mpwrdlctl = 0x34303834,
- .p1_mpwrdlctl = 0x422A3E36,
-};
-
-/* Index in RAM Chip array */
-enum {
- RAM_MT64K,
- RAM_MT128K,
- RAM_MT256K
-};
-
-static struct mx6_ddr3_cfg mt41k_xx[] = {
-/* MT41K64M16JT-125 (1Gb density) */
- {
- .mem_speed = 1600,
- .density = 1,
- .width = 16,
- .banks = 8,
- .rowaddr = 13,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1375,
- .trcmin = 4875,
- .trasmin = 3500,
- .SRT = 1,
- },
-
-/* MT41K256M16JT-125 (2Gb density) */
- {
- .mem_speed = 1600,
- .density = 2,
- .width = 16,
- .banks = 8,
- .rowaddr = 14,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1375,
- .trcmin = 4875,
- .trasmin = 3500,
- .SRT = 1,
- },
-
-/* MT41K256M16JT-125 (4Gb density) */
- {
- .mem_speed = 1600,
- .density = 4,
- .width = 16,
- .banks = 8,
- .rowaddr = 15,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1375,
- .trcmin = 4875,
- .trasmin = 3500,
- .SRT = 1,
- }
-};
-
-static void ccgr_init(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- writel(0x00C03F3F, &ccm->CCGR0);
- writel(0x0030FC03, &ccm->CCGR1);
- writel(0x0FFFC000, &ccm->CCGR2);
- writel(0x3FF00000, &ccm->CCGR3);
- writel(0x00FFF300, &ccm->CCGR4);
- writel(0x0F0000C3, &ccm->CCGR5);
- writel(0x000003FF, &ccm->CCGR6);
-}
-
-static void spl_dram_init(struct mx6_ddr_sysinfo *sysinfo,
- struct mx6_ddr3_cfg *mem_ddr)
-{
- mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs);
- mx6_dram_cfg(sysinfo, &mx6_mmcd_calib, mem_ddr);
-}
-
-int board_mmc_init(bd_t *bis)
-{
- if (spl_boot_device() == BOOT_DEVICE_SPI)
- printf("MMC SEtup, Boot SPI");
-
- SETUP_IOMUX_PADS(usdhc3_pads);
- usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- usdhc_cfg[0].max_bus_width = 4;
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
-
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-}
-
-
-void board_boot_order(u32 *spl_boot_list)
-{
- spl_boot_list[0] = spl_boot_device();
- printf("Boot device %x\n", spl_boot_list[0]);
- switch (spl_boot_list[0]) {
- case BOOT_DEVICE_SPI:
- spl_boot_list[1] = BOOT_DEVICE_UART;
- break;
- case BOOT_DEVICE_MMC1:
- spl_boot_list[1] = BOOT_DEVICE_SPI;
- spl_boot_list[2] = BOOT_DEVICE_UART;
- break;
- default:
- printf("Boot device %x\n", spl_boot_list[0]);
- }
-}
-
-/*
- * This is used because get_ram_size() does not
- * take care of cache, resulting a wrong size
- * pfla02 has just 1, 2 or 4 GB option
- * Function checks for mirrors in the first CS
- */
-#define RAM_TEST_PATTERN 0xaa5555aa
-#define MIN_BANK_SIZE (512 * 1024 * 1024)
-
-static unsigned int pfla02_detect_chiptype(void)
-{
- u32 *p, *p1;
- unsigned int offset = MIN_BANK_SIZE;
- int i;
-
- for (i = 0; i < 2; i++) {
- p = (u32 *)PHYS_SDRAM;
- p1 = (u32 *)(PHYS_SDRAM + (i + 1) * offset);
-
- *p1 = 0;
- *p = RAM_TEST_PATTERN;
-
- /*
- * This is required to detect mirroring
- * else we read back values from cache
- */
- flush_dcache_all();
-
- if (*p == *p1)
- return i;
- }
- return RAM_MT256K;
-}
-
-void board_init_f(ulong dummy)
-{
- unsigned int ramchip;
-
- struct mx6_ddr_sysinfo sysinfo = {
- /* width of data bus:0=16,1=32,2=64 */
- .dsize = 2,
- /* config for full 4GB range so that get_mem_size() works */
- .cs_density = 32, /* 512 MB */
- /* single chip select */
-#if IS_ENABLED(CONFIG_SPL_DRAM_1_BANK)
- .ncs = 1,
-#else
- .ncs = 2,
-#endif
- .cs1_mirror = 1,
- .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */
- .rtt_nom = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Nom = RZQ/4 */
- .walat = 1, /* Write additional latency */
- .ralat = 5, /* Read additional latency */
- .mif3_mode = 3, /* Command prediction working mode */
- .bi_on = 1, /* Bank interleaving enabled */
- .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
- .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
- .ddr_type = DDR_TYPE_DDR3,
- .refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
- };
-
-#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
- /* Enable NAND */
- setup_gpmi_nand();
-#endif
-
- /* setup clock gating */
- ccgr_init();
-
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
-
- /* setup AXI */
- gpr_init();
-
- board_early_init_f();
-
- /* setup GP timer */
- timer_init();
-
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
-
- setup_spi();
-
- setup_gpios();
-
- /* DDR initialization */
- spl_dram_init(&sysinfo, &mt41k_xx[RAM_MT256K]);
- ramchip = pfla02_detect_chiptype();
- debug("Detected chip %d\n", ramchip);
-#if !IS_ENABLED(CONFIG_SPL_DRAM_1_BANK)
- switch (ramchip) {
- case RAM_MT64K:
- sysinfo.cs_density = 6;
- break;
- case RAM_MT128K:
- sysinfo.cs_density = 10;
- break;
- case RAM_MT256K:
- sysinfo.cs_density = 18;
- break;
- }
-#endif
- spl_dram_init(&sysinfo, &mt41k_xx[ramchip]);
-
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
-
- phyflex_err006282_workaround();
-
- /* load/boot image from boot device */
- board_init_r(NULL, 0);
-}
-#endif
diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig
deleted file mode 100644
index 52cebd9e22..0000000000
--- a/configs/pfla02_defconfig
+++ /dev/null
@@ -1,71 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_OFFSET=0x100000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
-CONFIG_TARGET_PFLA02=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_ENV_OFFSET_REDUND=0x110000
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_CMD_HDMIDETECT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
-CONFIG_BOOTDELAY=3
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_DMA=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:-(nand);spi2.0:1024k(bootloader),64k(env1),64k(env2),-(rescue)"
-CONFIG_CMD_UBI=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_MXS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_BUS=2
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_FEC_MXC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/pfla02.h b/include/configs/pfla02.h
deleted file mode 100644
index 4162a71ca6..0000000000
--- a/include/configs/pfla02.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) Stefano Babic <sbabic@denx.de>
- */
-
-
-#ifndef __PCM058_CONFIG_H
-#define __PCM058_CONFIG_H
-
-#ifdef CONFIG_SPL
-#include "imx6_spl.h"
-#endif
-
-#include "mx6_common.h"
-
-/* Thermal */
-#define CONFIG_IMX_THERMAL
-
-/* Serial */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART4_BASE
-#define CONSOLE_DEV "ttymxc3"
-
-/* Early setup */
-
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
-
-/* Ethernet */
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 3
-
-/* SPI Flash */
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 0 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/* Enable NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-
-/* DMA stuff, needed for GPMI/MXS NAND support */
-
-/* Filesystem support */
-
-/* Various command support */
-
-/* Physical Memory Map */
-#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_USDHC_NUM 2
-
-/* Environment organization */
-
-/* Default environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "addcons=setenv bootargs ${bootargs} " \
- "console=${console},${baudrate}\0" \
- "addip=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:" \
- "${netmask}:${hostname}:${netdev}:off\0" \
- "addmisc=setenv bootargs ${bootargs} ${miscargs}\0" \
- "addmtd=run mtdnand;run mtdspi;" \
- "setenv bootargs ${bootargs} ${mtdparts}\0" \
- "mtdnand=setenv mtdparts mtdparts=gpmi-nand:" \
- "40m(Kernels),400m(root),-(nand)\0" \
- "mtdspi=setenv mtdparts ${mtdparts}" \
- "';spi2.0:1024k(bootloader)," \
- "64k(env1),64k(env2),-(rescue)'\0" \
- "bootcmd=if test -n ${rescue};" \
- "then run swupdate;fi;run nandboot;run swupdate\0" \
- "bootfile=uImage\0" \
- "bootimage=uImage\0" \
- "console=ttymxc3\0" \
- "fdt_addr_r=0x18000000\0" \
- "fdt_file=pfla02.dtb\0" \
- "fdt_high=0xffffffff\0" \
- "initrd_high=0xffffffff\0" \
- "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
- "miscargs=panic=1 quiet\0" \
- "mmcargs=setenv bootargs root=${mmcroot} rw rootwait\0" \
- "mmcboot=if run mmcload;then " \
- "run mmcargs addcons addmisc;" \
- "bootm;fi\0" \
- "mmcload=mmc rescan;" \
- "load mmc 0:${mmcpart} ${kernel_addr_r} boot/fitImage\0"\
- "mmcpart=1\0" \
- "mmcroot=/dev/mmcblk0p1\0" \
- "ubiroot=1\0" \
- "nandargs=setenv bootargs ubi.mtd=1 " \
- "root=ubi0:rootfs${ubiroot} rootfstype=ubifs\0" \
- "nandboot=run mtdnand;ubi part nand0,0;" \
- "ubi readvol ${kernel_addr_r} kernel${ubiroot};" \
- "run nandargs addip addcons addmtd addmisc;" \
- "bootm ${kernel_addr_r}\0" \
- "net_nfs=tftp ${kernel_addr_r} ${board_name}/${bootfile};" \
- "tftp ${fdt_addr_r} ${board_name}/${fdt_file};" \
- "run nfsargs addip addcons addmtd addmisc;" \
- "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
- "net_nfs_fit=tftp ${kernel_addr_r} ${board_name}/${fitfile};" \
- "run nfsargs addip addcons addmtd addmisc;" \
- "bootm ${kernel_addr_r}\0" \
- "nfsargs=setenv bootargs root=/dev/nfs" \
- " nfsroot=${serverip}:${nfsroot},v3 panic=1\0" \
- "swupdate=setenv bootargs root=/dev/ram;" \
- "run addip addcons addmtd addmisc;" \
- "sf probe;" \
- "sf read ${kernel_addr_r} 120000 600000;" \
- "sf read 14000000 730000 800000;" \
- "bootm ${kernel_addr_r} 14000000\0"
-
-#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 08/16] arm: Remove pcm058 board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (6 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 07/16] arm: Remove pfla02 board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 09/16] arm: Remove riotboard board Jagan Teki
` (8 subsequent siblings)
16 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 6 -
board/phytec/pcm058/Kconfig | 12 -
board/phytec/pcm058/MAINTAINERS | 6 -
board/phytec/pcm058/Makefile | 7 -
board/phytec/pcm058/README | 35 --
board/phytec/pcm058/pcm058.c | 571 --------------------------------
configs/pcm058_defconfig | 70 ----
include/configs/pcm058.h | 77 -----
8 files changed, 784 deletions(-)
delete mode 100644 board/phytec/pcm058/Kconfig
delete mode 100644 board/phytec/pcm058/MAINTAINERS
delete mode 100644 board/phytec/pcm058/Makefile
delete mode 100644 board/phytec/pcm058/README
delete mode 100644 board/phytec/pcm058/pcm058.c
delete mode 100644 configs/pcm058_defconfig
delete mode 100644 include/configs/pcm058.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 9c9013bd92..30e29f680a 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -507,11 +507,6 @@ config TARGET_PLATINUM_TITANIUM
bool "platinum-titanium"
select SUPPORT_SPL
-config TARGET_PCM058
- bool "Phytec PCM058 i.MX6 Quad"
- select BOARD_LATE_INIT
- select SUPPORT_SPL
-
config TARGET_PCL063
bool "PHYTEC PCL063 (phyCORE-i.MX6UL)"
select MX6UL
@@ -708,7 +703,6 @@ source "board/freescale/mx6sxsabreauto/Kconfig"
source "board/freescale/mx6ul_14x14_evk/Kconfig"
source "board/freescale/mx6ullevk/Kconfig"
source "board/grinn/liteboard/Kconfig"
-source "board/phytec/pcm058/Kconfig"
source "board/phytec/pcl063/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
source "board/kosagi/novena/Kconfig"
diff --git a/board/phytec/pcm058/Kconfig b/board/phytec/pcm058/Kconfig
deleted file mode 100644
index d099275d48..0000000000
--- a/board/phytec/pcm058/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_PCM058
-
-config SYS_BOARD
- default "pcm058"
-
-config SYS_VENDOR
- default "phytec"
-
-config SYS_CONFIG_NAME
- default "pcm058"
-
-endif
diff --git a/board/phytec/pcm058/MAINTAINERS b/board/phytec/pcm058/MAINTAINERS
deleted file mode 100644
index b0ca40277f..0000000000
--- a/board/phytec/pcm058/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-PHYTEC PHYBOARD MIRA
-M: Stefano Babic <sbabic@denx.de>
-S: Maintained
-F: board/phytec/pcm058/
-F: include/configs/pcm058.h
-F: configs/pcm058_defconfig
diff --git a/board/phytec/pcm058/Makefile b/board/phytec/pcm058/Makefile
deleted file mode 100644
index 75b503d95d..0000000000
--- a/board/phytec/pcm058/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2011 Freescale Semiconductor, Inc.
-
-obj-y := pcm058.o
diff --git a/board/phytec/pcm058/README b/board/phytec/pcm058/README
deleted file mode 100644
index 3327135645..0000000000
--- a/board/phytec/pcm058/README
+++ /dev/null
@@ -1,35 +0,0 @@
-Board information
------------------
-
-The SBC produced by Phytec has a SOM based on a i.MX6Q.
-The SOM is sold in two versions, with eMMC or with NAND. Support
-here is for the SOM with NAND.
-The evaluation board "phyBoard-Mira" is thought to be used
-together with the SOM.
-
-More information on the board can be found on manufacturer's
-website:
-
-http://www.phytec.de/produkt/single-board-computer/phyboard-mira/
-http://www.phytec.de/fileadmin/user_upload/images/content/1.Products/SOMs/phyCORE-i.MX6/L-808e_1.pdf
-
-Building U-Boot
--------------------------------
-
-$ make pcm058_defconfig
-$ make
-
-This generates the artifacts SPL and u-boot.img.
-The SOM can boot from NAND or from SD-Card, having the SPI-NOR
-as second option.
-The dip switch "DIP-1" on the board let choose between
-NAND and SD.
-
-DIP-1 set to off: Boot first from NAND, then try SPI
-DIP-1 set to on: Boot first from SD, then try SPI
-
-The bootloader was tested with DIP-1 set to on. If a SD-card
-is present, then the RBL tries to load SPL from the SD Card, if not,
-RBL loads from SPI-NOR. The SPL tries then to load from the same
-device where SPL was loaded (SD or SPI). Booting from NAND is
-not supported.
diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
deleted file mode 100644
index 096425c5df..0000000000
--- a/board/phytec/pcm058/pcm058.c
+++ /dev/null
@@ -1,571 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2016 Stefano Babic <sbabic@denx.de>
- */
-
-/*
- * Please note: there are two version of the board
- * one with NAND and the other with eMMC.
- * Both NAND and eMMC cannot be set because they share the
- * same pins (SD4)
- */
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/mx6-ddr.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/spi.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <mmc.h>
-#include <i2c.h>
-#include <fsl_esdhc_imx.h>
-#include <nand.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/sections.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-#define ASRC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define NAND_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 14)
-#define USDHC1_CD_GPIO IMX_GPIO_NR(6, 31)
-#define USER_LED IMX_GPIO_NR(1, 4)
-#define IMX6Q_DRIVE_STRENGTH 0x30
-
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
- return 0;
-}
-
-void board_turn_off_led(void)
-{
- gpio_direction_output(USER_LED, 0);
-}
-
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_SD2_DAT1__GPIO1_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const ecspi1_pads[] = {
- MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-#ifdef CONFIG_CMD_NAND
-/* NAND */
-static iomux_v3_cfg_t const nfc_pads[] = {
- MX6_PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_CS1__NAND_CE1_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_CS2__NAND_CE2_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_CS3__NAND_CE3_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NAND_PAD_CTRL),
- MX6_PAD_SD4_DAT0__NAND_DQS | MUX_PAD_CTRL(NAND_PAD_CTRL),
-};
-#endif
-
-static struct i2c_pads_info i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | I2C_PAD,
- .gp = IMX_GPIO_NR(1, 5)
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | I2C_PAD,
- .gp = IMX_GPIO_NR(1, 6)
- }
-};
-
-static struct fsl_esdhc_cfg usdhc_cfg[] = {
- {.esdhc_base = USDHC1_BASE_ADDR,
- .max_bus_width = 4},
-#ifndef CONFIG_CMD_NAND
- {USDHC4_BASE_ADDR},
-#endif
-};
-
-static iomux_v3_cfg_t const usdhc1_pads[] = {
- MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-#if !defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
-static iomux_v3_cfg_t const usdhc4_pads[] = {
- MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-#endif
-
-int board_mmc_get_env_dev(int devno)
-{
- return devno - 1;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC1_BASE_ADDR:
- ret = !gpio_get_value(USDHC1_CD_GPIO);
- break;
- case USDHC4_BASE_ADDR:
- ret = 1; /* eMMC/uSDHC4 is always present */
- break;
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-#ifndef CONFIG_SPL_BUILD
- int ret;
- int i;
-
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
- gpio_direction_input(USDHC1_CD_GPIO);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- break;
-#ifndef CONFIG_CMD_NAND
- case 1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- break;
-#endif
- default:
- printf("Warning: you configured more USDHC controllers"
- "(%d) then supported by the board (%d)\n",
- i + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret)
- return ret;
- }
-
- return 0;
-#else
- struct src *psrc = (struct src *)SRC_BASE_ADDR;
- unsigned reg = readl(&psrc->sbmr1) >> 11;
- /*
- * Upon reading BOOT_CFG register the following map is done:
- * Bit 11 and 12 of BOOT_CFG register can determine the current
- * mmc port
- * 0x1 SD1
- * 0x2 SD2
- * 0x3 SD4
- */
-
- switch (reg & 0x3) {
- case 0x0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
- gpio_direction_input(USDHC1_CD_GPIO);
- usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- usdhc_cfg[0].max_bus_width = 4;
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- break;
- }
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-#endif
-}
-
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-
- gpio_direction_output(ENET_PHY_RESET_GPIO, 0);
- mdelay(10);
- gpio_set_value(ENET_PHY_RESET_GPIO, 1);
- mdelay(30);
-}
-
-static void setup_spi(void)
-{
- gpio_request(IMX_GPIO_NR(3, 19), "spi_cs0");
- gpio_direction_output(IMX_GPIO_NR(3, 19), 1);
-
- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-
- enable_spi_clk(true, 0);
-}
-
-#ifdef CONFIG_CMD_NAND
-static void setup_gpmi_nand(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- /* config gpmi nand iomux */
- imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads));
-
- /* gate ENFC_CLK_ROOT clock first,before clk source switch */
- clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
-
- /* config gpmi and bch clock to 100 MHz */
- clrsetbits_le32(&mxc_ccm->cs2cdr,
- MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
- MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
- MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
- MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
- MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
- MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
-
- /* enable ENFC_CLK_ROOT clock */
- setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
-
- /* enable gpmi and bch clock gating */
- setbits_le32(&mxc_ccm->CCGR4,
- MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
- MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
- MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
- MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
- MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
-
- /* enable apbh clock gating */
- setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
-}
-#endif
-
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- if (bus != 0 || (cs != 0))
- return -EINVAL;
-
- return IMX_GPIO_NR(3, 19);
-}
-
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
-
- return cpu_eth_init(bis);
-}
-
-int board_early_init_f(void)
-{
- setup_iomux_uart();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-#ifdef CONFIG_SYS_I2C_MXC
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-#endif
-
-#ifdef CONFIG_MXC_SPI
- setup_spi();
-#endif
-
-#ifdef CONFIG_CMD_NAND
- setup_gpmi_nand();
-#endif
- return 0;
-}
-
-
-#ifdef CONFIG_CMD_BMODE
-/*
- * BOOT_CFG1, BOOT_CFG2, BOOT_CFG3, BOOT_CFG4
- * see Table 8-11 and Table 5-9
- * BOOT_CFG1[7] = 1 (boot from NAND)
- * BOOT_CFG1[5] = 0 - raw NAND
- * BOOT_CFG1[4] = 0 - default pad settings
- * BOOT_CFG1[3:2] = 00 - devices = 1
- * BOOT_CFG1[1:0] = 00 - Row Address Cycles = 3
- * BOOT_CFG2[4:3] = 00 - Boot Search Count = 2
- * BOOT_CFG2[2:1] = 01 - Pages In Block = 64
- * BOOT_CFG2[0] = 0 - Reset time 12ms
- */
-static const struct boot_mode board_boot_modes[] = {
- /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
- {"nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00)},
- {"mmc0", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_BMODE
- add_board_boot_modes(board_boot_modes);
-#endif
-
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-#include <spl.h>
-#include <linux/libfdt.h>
-
-static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
- .dram_sdclk_0 = 0x00000030,
- .dram_sdclk_1 = 0x00000030,
- .dram_cas = 0x00000030,
- .dram_ras = 0x00000030,
- .dram_reset = 0x00000030,
- .dram_sdcke0 = 0x00000030,
- .dram_sdcke1 = 0x00000030,
- .dram_sdba2 = 0x00000000,
- .dram_sdodt0 = 0x00000030,
- .dram_sdodt1 = 0x00000030,
- .dram_sdqs0 = 0x00000030,
- .dram_sdqs1 = 0x00000030,
- .dram_sdqs2 = 0x00000030,
- .dram_sdqs3 = 0x00000030,
- .dram_sdqs4 = 0x00000030,
- .dram_sdqs5 = 0x00000030,
- .dram_sdqs6 = 0x00000030,
- .dram_sdqs7 = 0x00000030,
- .dram_dqm0 = 0x00000030,
- .dram_dqm1 = 0x00000030,
- .dram_dqm2 = 0x00000030,
- .dram_dqm3 = 0x00000030,
- .dram_dqm4 = 0x00000030,
- .dram_dqm5 = 0x00000030,
- .dram_dqm6 = 0x00000030,
- .dram_dqm7 = 0x00000030,
-};
-
-static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
- .grp_ddr_type = 0x000C0000,
- .grp_ddrmode_ctl = 0x00020000,
- .grp_ddrpke = 0x00000000,
- .grp_addds = IMX6Q_DRIVE_STRENGTH,
- .grp_ctlds = IMX6Q_DRIVE_STRENGTH,
- .grp_ddrmode = 0x00020000,
- .grp_b0ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b1ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b2ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b3ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b4ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b5ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b6ds = IMX6Q_DRIVE_STRENGTH,
- .grp_b7ds = IMX6Q_DRIVE_STRENGTH,
-};
-
-static const struct mx6_mmdc_calibration mx6_mmcd_calib = {
- .p0_mpwldectrl0 = 0x00140014,
- .p0_mpwldectrl1 = 0x000A0015,
- .p1_mpwldectrl0 = 0x000A001E,
- .p1_mpwldectrl1 = 0x000A0015,
- .p0_mpdgctrl0 = 0x43080314,
- .p0_mpdgctrl1 = 0x02680300,
- .p1_mpdgctrl0 = 0x430C0318,
- .p1_mpdgctrl1 = 0x03000254,
- .p0_mprddlctl = 0x3A323234,
- .p1_mprddlctl = 0x3E3C3242,
- .p0_mpwrdlctl = 0x2A2E3632,
- .p1_mpwrdlctl = 0x3C323E34,
-};
-
-static struct mx6_ddr3_cfg mem_ddr = {
- .mem_speed = 1600,
- .density = 2,
- .width = 16,
- .banks = 8,
- .rowaddr = 14,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1375,
- .trcmin = 4875,
- .trasmin = 3500,
- .SRT = 1,
-};
-
-static void ccgr_init(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- writel(0x00C03F3F, &ccm->CCGR0);
- writel(0x0030FC03, &ccm->CCGR1);
- writel(0x0FFFC000, &ccm->CCGR2);
- writel(0x3FF00000, &ccm->CCGR3);
- writel(0x00FFF300, &ccm->CCGR4);
- writel(0x0F0000C3, &ccm->CCGR5);
- writel(0x000003FF, &ccm->CCGR6);
-}
-
-static void spl_dram_init(void)
-{
- struct mx6_ddr_sysinfo sysinfo = {
- /* width of data bus:0=16,1=32,2=64 */
- .dsize = 2,
- /* config for full 4GB range so that get_mem_size() works */
- .cs_density = 32, /* 32Gb per CS */
- /* single chip select */
- .ncs = 1,
- .cs1_mirror = 0,
- .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */
- .rtt_nom = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Nom = RZQ/4 */
- .walat = 1, /* Write additional latency */
- .ralat = 5, /* Read additional latency */
- .mif3_mode = 3, /* Command prediction working mode */
- .bi_on = 1, /* Bank interleaving enabled */
- .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
- .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
- .ddr_type = DDR_TYPE_DDR3,
- .refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
- };
-
- mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);
-}
-
-void board_boot_order(u32 *spl_boot_list)
-{
- spl_boot_list[0] = spl_boot_device();
- printf("Boot device %x\n", spl_boot_list[0]);
- switch (spl_boot_list[0]) {
- case BOOT_DEVICE_SPI:
- spl_boot_list[1] = BOOT_DEVICE_UART;
- break;
- case BOOT_DEVICE_MMC1:
- spl_boot_list[1] = BOOT_DEVICE_SPI;
- spl_boot_list[2] = BOOT_DEVICE_UART;
- break;
- default:
- printf("Boot device %x\n", spl_boot_list[0]);
- }
-}
-
-void board_init_f(ulong dummy)
-{
-#ifdef CONFIG_CMD_NAND
- /* Enable NAND */
- setup_gpmi_nand();
-#endif
-
- /* setup clock gating */
- ccgr_init();
-
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
-
- /* setup AXI */
- gpr_init();
-
- board_early_init_f();
-
- /* setup GP timer */
- timer_init();
-
- setup_spi();
-
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
-
- /* DDR initialization */
- spl_dram_init();
-
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
-
- /* load/boot image from boot device */
- board_init_r(NULL, 0);
-}
-#endif
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
deleted file mode 100644
index 0dfbc172c2..0000000000
--- a/configs/pcm058_defconfig
+++ /dev/null
@@ -1,70 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_OFFSET=0x100000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
-CONFIG_TARGET_PCM058=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_ENV_OFFSET_REDUND=0x110000
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_CMD_HDMIDETECT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_FIT=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
-CONFIG_BOOTDELAY=3
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_DMA=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=nand"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
-CONFIG_CMD_UBI=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_SYS_NAND_USE_FLASH_BBT=y
-CONFIG_NAND_MXS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h
deleted file mode 100644
index 7c27ebb811..0000000000
--- a/include/configs/pcm058.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) Stefano Babic <sbabic@denx.de>
- */
-
-
-#ifndef __PCM058_CONFIG_H
-#define __PCM058_CONFIG_H
-
-#ifdef CONFIG_SPL
-#include "imx6_spl.h"
-#endif
-
-#include "mx6_common.h"
-
-/* Thermal */
-#define CONFIG_IMX_THERMAL
-
-/* Serial */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONSOLE_DEV "ttymxc1"
-
-#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-
-/* Early setup */
-
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
-
-/* Ethernet */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 3
-
-/* SPI Flash */
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-#ifndef CONFIG_SPL_BUILD
-/* Enable NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_ONFI_DETECTION
-#endif
-
-/* DMA stuff, needed for GPMI/MXS NAND support */
-
-/* Filesystem support */
-
-/* Physical Memory Map */
-#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_USDHC_NUM 1
-
-/* Environment organization */
-
-#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 09/16] arm: Remove riotboard board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (7 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 08/16] arm: Remove pcm058 board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 12:58 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 10/16] arm: Remove zc5202/zc5601 board Jagan Teki
` (7 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Eric B?nard <eric@eukrea.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 6 -
board/embest/mx6boards/Kconfig | 12 -
board/embest/mx6boards/MAINTAINERS | 8 -
board/embest/mx6boards/Makefile | 7 -
board/embest/mx6boards/mx6boards.c | 662 -----------------------------
configs/marsboard_defconfig | 44 --
configs/riotboard_defconfig | 44 --
configs/riotboard_spl_defconfig | 55 ---
include/configs/embestmx6boards.h | 140 ------
9 files changed, 978 deletions(-)
delete mode 100644 board/embest/mx6boards/Kconfig
delete mode 100644 board/embest/mx6boards/MAINTAINERS
delete mode 100644 board/embest/mx6boards/Makefile
delete mode 100644 board/embest/mx6boards/mx6boards.c
delete mode 100644 configs/marsboard_defconfig
delete mode 100644 configs/riotboard_defconfig
delete mode 100644 configs/riotboard_spl_defconfig
delete mode 100644 include/configs/embestmx6boards.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 30e29f680a..40814b22ad 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -239,11 +239,6 @@ config TARGET_DISPLAY5
select SUPPORT_SPL
imply CMD_DM
-config TARGET_EMBESTMX6BOARDS
- bool "embestmx6boards"
- select BOARD_LATE_INIT
- select SUPPORT_SPL
-
config TARGET_GE_BX50V3
bool "General Electric Bx50v3"
select BOARD_LATE_INIT
@@ -689,7 +684,6 @@ source "board/compulab/cm_fx6/Kconfig"
source "board/congatec/cgtqmx6eval/Kconfig"
source "board/dhelectronics/dh_imx6/Kconfig"
source "board/el/el6x/Kconfig"
-source "board/embest/mx6boards/Kconfig"
source "board/engicam/imx6q/Kconfig"
source "board/engicam/imx6ul/Kconfig"
source "board/freescale/mx6qarm2/Kconfig"
diff --git a/board/embest/mx6boards/Kconfig b/board/embest/mx6boards/Kconfig
deleted file mode 100644
index 24d01f2266..0000000000
--- a/board/embest/mx6boards/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_EMBESTMX6BOARDS
-
-config SYS_BOARD
- default "mx6boards"
-
-config SYS_VENDOR
- default "embest"
-
-config SYS_CONFIG_NAME
- default "embestmx6boards"
-
-endif
diff --git a/board/embest/mx6boards/MAINTAINERS b/board/embest/mx6boards/MAINTAINERS
deleted file mode 100644
index 02756c58b3..0000000000
--- a/board/embest/mx6boards/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-MX6BOARDS BOARD
-M: Eric B?nard <eric@eukrea.com>
-S: Maintained
-F: board/embest/mx6boards/
-F: include/configs/embestmx6boards.h
-F: configs/marsboard_defconfig
-F: configs/riotboard_defconfig
-F: configs/riotboard_spl_defconfig
diff --git a/board/embest/mx6boards/Makefile b/board/embest/mx6boards/Makefile
deleted file mode 100644
index a032a3df9f..0000000000
--- a/board/embest/mx6boards/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2011 Freescale Semiconductor, Inc.
-
-obj-y := mx6boards.o
diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c
deleted file mode 100644
index e0834f03c7..0000000000
--- a/board/embest/mx6boards/mx6boards.c
+++ /dev/null
@@ -1,662 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2014 Eukr?a Electromatique
- * Author: Eric B?nard <eric@eukrea.com>
- * Fabio Estevam <fabio.estevam@freescale.com>
- * Jon Nettleton <jon.nettleton@gmail.com>
- *
- * based on sabresd.c which is :
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
- * and on hummingboard.c which is :
- * Copyright (C) 2013 SolidRun ltd.
- * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>.
- */
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/spi.h>
-#include <asm/mach-imx/video.h>
-#include <i2c.h>
-#include <input.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \
- PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \
- PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-static int board_type = -1;
-#define BOARD_IS_MARSBOARD 0
-#define BOARD_IS_RIOTBOARD 1
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
-
- return 0;
-}
-
-static iomux_v3_cfg_t const uart2_pads[] = {
- MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
-}
-
-iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- /* GPIO16 -> AR8035 25MHz */
- MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- /* AR8035 PHY Reset */
- MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- /* AR8035 PHY Interrupt */
- MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(ENET_PAD_CTRL),
-};
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-
- /* Reset AR8035 PHY */
- gpio_direction_output(IMX_GPIO_NR(3, 31) , 0);
- mdelay(2);
- gpio_set_value(IMX_GPIO_NR(3, 31), 1);
-}
-
-int mx6_rgmii_rework(struct phy_device *phydev)
-{
- /* from linux/arch/arm/mach-imx/mach-imx6q.c :
- * Ar803x phy SmartEEE feature cause link status generates glitch,
- * which cause ethernet link down/up issue, so disable SmartEEE
- */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d);
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003);
-
- return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- mx6_rgmii_rework(phydev);
-
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
-
-iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* WP */
- MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-iomux_v3_cfg_t const usdhc3_pads[] = {
- MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL),
- MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const riotboard_usdhc3_pads[] = {
- MX6_PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL), /* WP */
- MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-iomux_v3_cfg_t const usdhc4_pads[] = {
- MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL),
- MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- /* eMMC RST */
- MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-struct fsl_esdhc_cfg usdhc_cfg[3] = {
- {USDHC2_BASE_ADDR},
- {USDHC3_BASE_ADDR},
- {USDHC4_BASE_ADDR},
-};
-
-#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
-#define USDHC3_CD_GPIO IMX_GPIO_NR(7, 0)
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC2_BASE_ADDR:
- ret = !gpio_get_value(USDHC2_CD_GPIO);
- break;
- case USDHC3_BASE_ADDR:
- if (board_type == BOARD_IS_RIOTBOARD)
- ret = !gpio_get_value(USDHC3_CD_GPIO);
- else if (board_type == BOARD_IS_MARSBOARD)
- ret = 1; /* eMMC/uSDHC3 is always present */
- break;
- case USDHC4_BASE_ADDR:
- ret = 1; /* eMMC/uSDHC4 is always present */
- break;
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- int ret;
- int i;
-
- /*
- * According to the board_mmc_init() the following map is done:
- * (U-Boot device node) (Physical Port)
- * ** RiOTboard :
- * mmc0 SDCard slot (bottom)
- * mmc1 uSDCard slot (top)
- * mmc2 eMMC
- * ** MarSBoard :
- * mmc0 uSDCard slot (bottom)
- * mmc1 eMMC
- */
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
- gpio_direction_input(USDHC2_CD_GPIO);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- usdhc_cfg[0].max_bus_width = 4;
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
- if (board_type == BOARD_IS_RIOTBOARD) {
- imx_iomux_v3_setup_multiple_pads(
- riotboard_usdhc3_pads,
- ARRAY_SIZE(riotboard_usdhc3_pads));
- gpio_direction_input(USDHC3_CD_GPIO);
- } else {
- gpio_direction_output(IMX_GPIO_NR(7, 8) , 0);
- udelay(250);
- gpio_set_value(IMX_GPIO_NR(7, 8), 1);
- }
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- usdhc_cfg[1].max_bus_width = 4;
- break;
- case 2:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- usdhc_cfg[2].max_bus_width = 4;
- gpio_direction_output(IMX_GPIO_NR(6, 8) , 0);
- udelay(250);
- gpio_set_value(IMX_GPIO_NR(6, 8), 1);
- break;
- default:
- printf("Warning: you configured more USDHC controllers"
- "(%d) then supported by the board (%d)\n",
- i + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_MXC_SPI
-iomux_v3_cfg_t const ecspi1_pads[] = {
- MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1;
-}
-
-static void setup_spi(void)
-{
- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-}
-#endif
-
-struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gp = IMX_GPIO_NR(5, 27)
- },
- .sda = {
- .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gp = IMX_GPIO_NR(5, 26)
- }
-};
-
-struct i2c_pads_info i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-struct i2c_pads_info i2c_pad_info3 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gp = IMX_GPIO_NR(1, 5)
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06
- | MUX_PAD_CTRL(I2C_PAD_CTRL),
- .gp = IMX_GPIO_NR(1, 6)
- }
-};
-
-iomux_v3_cfg_t const tft_pads_riot[] = {
- /* LCD_PWR_EN */
- MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* TOUCH_INT */
- MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* LED_PWR_EN */
- MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* BL LEVEL */
- MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const tft_pads_mars[] = {
- /* LCD_PWR_EN */
- MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* TOUCH_INT */
- MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* LED_PWR_EN */
- MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* BL LEVEL (PWM4) */
- MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-#if defined(CONFIG_VIDEO_IPUV3)
-
-static void enable_lvds(struct display_info_t const *dev)
-{
- struct iomuxc *iomux = (struct iomuxc *)
- IOMUXC_BASE_ADDR;
- setbits_le32(&iomux->gpr[2],
- IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT);
- /* set backlight level to ON */
- if (board_type == BOARD_IS_RIOTBOARD)
- gpio_direction_output(IMX_GPIO_NR(1, 18) , 1);
- else if (board_type == BOARD_IS_MARSBOARD)
- gpio_direction_output(IMX_GPIO_NR(2, 10) , 1);
-}
-
-static void disable_lvds(struct display_info_t const *dev)
-{
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
- /* set backlight level to OFF */
- if (board_type == BOARD_IS_RIOTBOARD)
- gpio_direction_output(IMX_GPIO_NR(1, 18) , 0);
- else if (board_type == BOARD_IS_MARSBOARD)
- gpio_direction_output(IMX_GPIO_NR(2, 10) , 0);
-
- clrbits_le32(&iomux->gpr[2],
- IOMUXC_GPR2_LVDS_CH0_MODE_MASK);
-}
-
-static void do_enable_hdmi(struct display_info_t const *dev)
-{
- disable_lvds(dev);
- imx_enable_hdmi_phy();
-}
-
-static int detect_i2c(struct display_info_t const *dev)
-{
- return (0 == i2c_set_bus_num(dev->bus)) &&
- (0 == i2c_probe(dev->addr));
-}
-
-struct display_info_t const displays[] = {{
- .bus = -1,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB24,
- .detect = detect_hdmi,
- .enable = do_enable_hdmi,
- .mode = {
- .name = "HDMI",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
-} }, {
- .bus = 2,
- .addr = 0x1,
- .pixfmt = IPU_PIX_FMT_LVDS666,
- .detect = detect_i2c,
- .enable = enable_lvds,
- .mode = {
- .name = "LCD8000-97C",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 100,
- .right_margin = 200,
- .upper_margin = 10,
- .lower_margin = 20,
- .hsync_len = 20,
- .vsync_len = 8,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
-} } };
-size_t display_count = ARRAY_SIZE(displays);
-
-static void setup_display(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
- int reg;
-
- enable_ipu_clock();
- imx_setup_hdmi();
-
- /* Turn on LDB0, IPU,IPU DI0 clocks */
- setbits_le32(&mxc_ccm->CCGR3,
- MXC_CCM_CCGR3_LDB_DI0_MASK);
-
- /* set LDB0 clk select to 011/011 */
- clrsetbits_le32(&mxc_ccm->cs2cdr,
- MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK,
- (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET));
-
- setbits_le32(&mxc_ccm->cscmr2,
- MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
-
- setbits_le32(&mxc_ccm->chsccdr,
- (CHSCCDR_CLK_SEL_LDB_DI0
- << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET));
-
- reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
- | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
- | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
- | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
- | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
- | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
- | IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
- | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
- writel(reg, &iomux->gpr[2]);
-
- clrsetbits_le32(&iomux->gpr[3],
- IOMUXC_GPR3_LVDS0_MUX_CTL_MASK |
- IOMUXC_GPR3_HDMI_MUX_CTL_MASK,
- IOMUXC_GPR3_MUX_SRC_IPU1_DI0
- << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
-}
-#endif /* CONFIG_VIDEO_IPUV3 */
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
- return 1;
-}
-
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
-
- return cpu_eth_init(bis);
-}
-
-int board_early_init_f(void)
-{
- u32 cputype = cpu_type(get_cpu_rev());
-
- switch (cputype) {
- case MXC_CPU_MX6SOLO:
- board_type = BOARD_IS_RIOTBOARD;
- break;
- case MXC_CPU_MX6D:
- board_type = BOARD_IS_MARSBOARD;
- break;
- }
-
- setup_iomux_uart();
-
- if (board_type == BOARD_IS_RIOTBOARD)
- imx_iomux_v3_setup_multiple_pads(
- tft_pads_riot, ARRAY_SIZE(tft_pads_riot));
- else if (board_type == BOARD_IS_MARSBOARD)
- imx_iomux_v3_setup_multiple_pads(
- tft_pads_mars, ARRAY_SIZE(tft_pads_mars));
-#if defined(CONFIG_VIDEO_IPUV3)
- /* power ON LCD */
- gpio_direction_output(IMX_GPIO_NR(1, 29) , 1);
- /* touch interrupt is an input */
- gpio_direction_input(IMX_GPIO_NR(6, 14));
- /* power ON backlight */
- gpio_direction_output(IMX_GPIO_NR(6, 15) , 1);
- /* set backlight level to off */
- if (board_type == BOARD_IS_RIOTBOARD)
- gpio_direction_output(IMX_GPIO_NR(1, 18) , 0);
- else if (board_type == BOARD_IS_MARSBOARD)
- gpio_direction_output(IMX_GPIO_NR(2, 10) , 0);
- setup_display();
-#endif
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- /* i2c1 : PMIC, Audio codec on RiOT, Expansion connector on MarS */
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
- /* i2c2 : HDMI EDID */
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
- /* i2c3 : LVDS, Expansion connector */
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
-#ifdef CONFIG_MXC_SPI
- setup_spi();
-#endif
- return 0;
-}
-
-#ifdef CONFIG_CMD_BMODE
-static const struct boot_mode riotboard_boot_modes[] = {
- {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
- {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
- {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
- {NULL, 0},
-};
-static const struct boot_mode marsboard_boot_modes[] = {
- {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
- {"emmc", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_BMODE
- if (board_type == BOARD_IS_RIOTBOARD)
- add_board_boot_modes(riotboard_boot_modes);
- else if (board_type == BOARD_IS_RIOTBOARD)
- add_board_boot_modes(marsboard_boot_modes);
-#endif
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: ");
- if (board_type == BOARD_IS_MARSBOARD)
- puts("MarSBoard\n");
- else if (board_type == BOARD_IS_RIOTBOARD)
- puts("RIoTboard\n");
- else
- printf("unknown - cputype : %02x\n", cpu_type(get_cpu_rev()));
-
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-#include <spl.h>
-
-void board_init_f(ulong dummy)
-{
- u32 cputype = cpu_type(get_cpu_rev());
-
- switch (cputype) {
- case MXC_CPU_MX6SOLO:
- board_type = BOARD_IS_RIOTBOARD;
- break;
- case MXC_CPU_MX6D:
- board_type = BOARD_IS_MARSBOARD;
- break;
- }
- arch_cpu_init();
-
- /* setup GP timer */
- timer_init();
-
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
- setup_iomux_uart();
- preloader_console_init();
-#endif
-}
-
-void board_boot_order(u32 *spl_boot_list)
-{
- spl_boot_list[0] = BOOT_DEVICE_MMC1;
-}
-
-/*
- * In order to jump to standard u-boot shell, you have to connect pin 5 of J13
- * to pin 3 (ground).
- */
-int spl_start_uboot(void)
-{
- int gpio_key = IMX_GPIO_NR(4, 16);
-
- gpio_direction_input(gpio_key);
- if (gpio_get_value(gpio_key) == 0)
- return 1;
- else
- return 0;
-}
-
-#endif
diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig
deleted file mode 100644
index 765a3ca2b6..0000000000
--- a/configs/marsboard_defconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x2000
-CONFIG_TARGET_EMBESTMX6BOARDS=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024"
-CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
deleted file mode 100644
index 73656017d1..0000000000
--- a/configs/riotboard_defconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x60000
-CONFIG_TARGET_EMBESTMX6BOARDS=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024"
-CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig
deleted file mode 100644
index 5ff8da0355..0000000000
--- a/configs/riotboard_spl_defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x60000
-CONFIG_TARGET_EMBESTMX6BOARDS=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,SPL,MX6S,DDR_MB=1024"
-CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_RAW_IMAGE_SUPPORT=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
-CONFIG_SPL_OF_LIBFDT=y
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
deleted file mode 100644
index 24a0025eda..0000000000
--- a/include/configs/embestmx6boards.h
+++ /dev/null
@@ -1,140 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2014 Eukr?a Electromatique
- * Author: Eric B?nard <eric@eukrea.com>
- *
- * Configuration settings for the Embest RIoTboard
- *
- * based on mx6*sabre*.h which are :
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
- */
-
-#ifndef __RIOTBOARD_CONFIG_H
-#define __RIOTBOARD_CONFIG_H
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONSOLE_DEV "ttymxc1"
-
-#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-
-#define CONFIG_IMX_THERMAL
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
-#define CONFIG_MXC_UART
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/* USB Configs */
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS 0
-
-/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 4
-
-#define CONFIG_ARP_TIMEOUT 200UL
-
-/* Physical Memory Map */
-#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* Environment organization */
-
-#if defined(CONFIG_ENV_IS_IN_MMC)
-/* RiOTboard */
-#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
-#define CONFIG_SYS_FSL_USDHC_NUM 3
-#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
-#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-/* MarSBoard */
-#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
-#define CONFIG_SYS_FSL_USDHC_NUM 2
-#endif
-
-/* Framebuffer */
-#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_BMP_16BPP
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IMX_HDMI
-#define CONFIG_IMX_VIDEO_SKIP
-
-#include "mx6_common.h"
-
-#ifdef CONFIG_SPL
-#include "imx6_spl.h"
-/* RiOTboard */
-#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
-#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
-#define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
-
-#endif
-
-/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
- * 1M script, 1M pxe and the ramdisk at the end */
-#define MEM_LAYOUT_ENV_SETTINGS \
- "bootm_size=0x10000000\0" \
- "kernel_addr_r=0x12000000\0" \
- "fdt_addr_r=0x13000000\0" \
- "scriptaddr=0x13100000\0" \
- "pxefile_addr_r=0x13200000\0" \
- "ramdisk_addr_r=0x13300000\0"
-
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 0) \
- func(MMC, mmc, 1) \
- func(MMC, mmc, 2) \
- func(USB, usb, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dhcp, na)
-
-#include <config_distro_bootcmd.h>
-
-#define CONSOLE_STDIN_SETTINGS \
- "stdin=serial\0"
-
-#define CONSOLE_STDOUT_SETTINGS \
- "stdout=serial\0" \
- "stderr=serial\0"
-
-#define CONSOLE_ENV_SETTINGS \
- CONSOLE_STDIN_SETTINGS \
- CONSOLE_STDOUT_SETTINGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- CONSOLE_ENV_SETTINGS \
- MEM_LAYOUT_ENV_SETTINGS \
- "fdtfile=" CONFIG_FDTFILE "\0" \
- "finduuid=part uuid mmc 0:1 uuid\0" \
- BOOTENV
-
-#endif /* __RIOTBOARD_CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 10/16] arm: Remove zc5202/zc5601 board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (8 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 09/16] arm: Remove riotboard board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 12:59 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 11/16] arm: Remove cgtqmx6eval board Jagan Teki
` (6 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Patch-cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 17 -
board/el/el6x/Kconfig | 25 --
board/el/el6x/MAINTAINERS | 8 -
board/el/el6x/Makefile | 5 -
board/el/el6x/el6x.c | 636 ----------------------------------
configs/zc5202_defconfig | 56 ---
configs/zc5601_defconfig | 54 ---
include/configs/zc5202.h | 27 --
include/configs/zc5601.h | 26 --
9 files changed, 854 deletions(-)
delete mode 100644 board/el/el6x/Kconfig
delete mode 100644 board/el/el6x/MAINTAINERS
delete mode 100644 board/el/el6x/Makefile
delete mode 100644 board/el/el6x/el6x.c
delete mode 100644 configs/zc5202_defconfig
delete mode 100644 configs/zc5601_defconfig
delete mode 100644 include/configs/zc5202.h
delete mode 100644 include/configs/zc5601.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 40814b22ad..2ca78d22a8 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -631,22 +631,6 @@ config TARGET_XPRESS
select SUPPORT_SPL
imply CMD_DM
-config TARGET_ZC5202
- bool "zc5202"
- select BOARD_LATE_INIT
- select DM
- select DM_THERMAL
- select SUPPORT_SPL
- imply CMD_DM
-
-config TARGET_ZC5601
- bool "zc5601"
- select BOARD_LATE_INIT
- select DM
- select DM_THERMAL
- select SUPPORT_SPL
- imply CMD_DM
-
config TARGET_BRPPT2
bool "brppt2"
select BOARD_LATE_INIT
@@ -683,7 +667,6 @@ source "board/ccv/xpress/Kconfig"
source "board/compulab/cm_fx6/Kconfig"
source "board/congatec/cgtqmx6eval/Kconfig"
source "board/dhelectronics/dh_imx6/Kconfig"
-source "board/el/el6x/Kconfig"
source "board/engicam/imx6q/Kconfig"
source "board/engicam/imx6ul/Kconfig"
source "board/freescale/mx6qarm2/Kconfig"
diff --git a/board/el/el6x/Kconfig b/board/el/el6x/Kconfig
deleted file mode 100644
index aa9bf25fb4..0000000000
--- a/board/el/el6x/Kconfig
+++ /dev/null
@@ -1,25 +0,0 @@
-if TARGET_ZC5202
-
-config SYS_BOARD
- default "el6x"
-
-config SYS_VENDOR
- default "el"
-
-config SYS_CONFIG_NAME
- default "zc5202"
-
-endif
-
-if TARGET_ZC5601
-
-config SYS_BOARD
- default "el6x"
-
-config SYS_VENDOR
- default "el"
-
-config SYS_CONFIG_NAME
- default "zc5601"
-
-endif
diff --git a/board/el/el6x/MAINTAINERS b/board/el/el6x/MAINTAINERS
deleted file mode 100644
index 9a40010f50..0000000000
--- a/board/el/el6x/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-EL6X BOARD
-M: Stefano Babic <sbabic@denx.de>
-S: Maintained
-F: board/el/el6x/
-F: include/configs/zc5202.h
-F: include/configs/zc5601.h
-F: configs/zc5202_defconfig
-F: configs/zc5601_defconfig
diff --git a/board/el/el6x/Makefile b/board/el/el6x/Makefile
deleted file mode 100644
index 065a867475..0000000000
--- a/board/el/el6x/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) Stefano Babic <sbabic@denx.de>
-
-obj-y := el6x.o
diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
deleted file mode 100644
index d3e2981fa8..0000000000
--- a/board/el/el6x/el6x.c
+++ /dev/null
@@ -1,636 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) Stefano Babic <sbabic@denx.de>
- *
- * Based on other i.MX6 boards
- */
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <env.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/video.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <i2c.h>
-#include <input.h>
-#include <power/pmic.h>
-#include <power/pfuze100_pmic.h>
-#include <asm/arch/mx6-ddr.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define OPEN_PAD_CTRL (PAD_CTL_ODE | PAD_CTL_DSE_DISABLE | (0 << 12))
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PMIC 1
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-#define ETH_PHY_RESET IMX_GPIO_NR(2, 4)
-
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
-
- return 0;
-}
-
-iomux_v3_cfg_t const uart2_pads[] = {
- MX6_PAD_SD3_DAT5__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_SD3_DAT4__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
-}
-
-#ifdef CONFIG_TARGET_ZC5202
-iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_GPIO_18__ENET_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_COL2__ENET_RX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_COL0__ENET_RX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK),
- MX6_PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_GPIO_19__ENET_TX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_ROW2__ENET_TX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_ROW0__ENET_TX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_RX_ER__ENET_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- /* Switch Reset */
- MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD),
- /* Switch Interrupt */
- MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* use CRS and COL pads as GPIOs */
- MX6_PAD_KEY_COL3__GPIO4_IO12 | MUX_PAD_CTRL(OPEN_PAD_CTRL),
- MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(OPEN_PAD_CTRL),
-
-};
-
-#define BOARD_NAME "EL6x-ZC5202"
-#else
-iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-#define BOARD_NAME "EL6x-ZC5601"
-#endif
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-
-#ifdef CONFIG_TARGET_ZC5202
- /* set CRS and COL to input */
- gpio_direction_input(IMX_GPIO_NR(4, 9));
- gpio_direction_input(IMX_GPIO_NR(4, 12));
-
- /* Reset Switch */
- gpio_direction_output(ETH_PHY_RESET , 0);
- mdelay(2);
- gpio_set_value(ETH_PHY_RESET, 1);
-#endif
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
-
-#ifdef CONFIG_MXC_SPI
-#ifdef CONFIG_TARGET_ZC5202
-iomux_v3_cfg_t const ecspi1_pads[] = {
- MX6_PAD_DISP0_DAT20__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT21__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT22__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT23__GPIO5_IO17 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_DISP0_DAT15__GPIO5_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const ecspi3_pads[] = {
- MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT7__GPIO4_IO28 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT8__GPIO4_IO29 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT9__GPIO4_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT10__GPIO4_IO31 | MUX_PAD_CTRL(SPI_PAD_CTRL),
-};
-#endif
-
-iomux_v3_cfg_t const ecspi4_pads[] = {
- MX6_PAD_EIM_D21__ECSPI4_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D28__ECSPI4_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D22__ECSPI4_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- return (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS)
- ? (IMX_GPIO_NR(3, 20)) : -1;
-}
-
-static void setup_spi(void)
-{
-#ifdef CONFIG_TARGET_ZC5202
- gpio_request(IMX_GPIO_NR(5, 17), "spi_cs0");
- gpio_request(IMX_GPIO_NR(5, 9), "spi_cs1");
- gpio_direction_output(IMX_GPIO_NR(5, 17), 1);
- gpio_direction_output(IMX_GPIO_NR(5, 9), 1);
- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-#endif
-
- gpio_request(IMX_GPIO_NR(3, 20), "spi4_cs0");
- gpio_direction_output(IMX_GPIO_NR(3, 20), 1);
- imx_iomux_v3_setup_multiple_pads(ecspi4_pads, ARRAY_SIZE(ecspi4_pads));
-
- enable_spi_clk(true, 3);
-}
-#endif
-
-static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | I2C_PAD,
- .gp = IMX_GPIO_NR(2, 30)
- },
- .sda = {
- .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-static struct i2c_pads_info i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | I2C_PAD,
- .gp = IMX_GPIO_NR(1, 5)
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | I2C_PAD,
- .gp = IMX_GPIO_NR(7, 11)
- }
-};
-
-iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_GPIO_4__SD2_CD_B | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
-};
-
-iomux_v3_cfg_t const usdhc4_pads[] = {
- MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-struct fsl_esdhc_cfg usdhc_cfg[2] = {
- {USDHC2_BASE_ADDR},
- {USDHC4_BASE_ADDR},
-};
-
-#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC2_BASE_ADDR:
- ret = !gpio_get_value(USDHC2_CD_GPIO);
- break;
- case USDHC4_BASE_ADDR:
- ret = 1; /* eMMC/uSDHC4 is always present */
- break;
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-#ifndef CONFIG_SPL_BUILD
- int ret;
- int i;
-
- /*
- * According to the board_mmc_init() the following map is done:
- * (U-boot device node) (Physical Port)
- * mmc0 SD2
- * mmc1 SD3
- * mmc2 eMMC
- */
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
- gpio_direction_input(USDHC2_CD_GPIO);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- break;
- default:
- printf("Warning: you configured more USDHC controllers"
- "(%d) then supported by the board (%d)\n",
- i + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret)
- return ret;
- }
-
- return 0;
-#else
- struct src *psrc = (struct src *)SRC_BASE_ADDR;
- unsigned reg = readl(&psrc->sbmr1) >> 11;
-
- /*
- * Upon reading BOOT_CFG register the following map is done:
- * Bit 11 and 12 of BOOT_CFG register can determine the current
- * mmc port
- * 0x1 SD1
- * 0x2 SD2
- * 0x3 SD4
- */
-
- switch (reg & 0x3) {
- case 0x1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
- usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- break;
- case 0x3:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
- break;
- }
-
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-#endif
-
-}
-#endif
-
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
- return 1;
-}
-
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
- enable_enet_clk(1);
-
- return cpu_eth_init(bis);
-}
-
-int board_early_init_f(void)
-{
-
- setup_iomux_uart();
- setup_spi();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-
- return 0;
-}
-
-int power_init_board(void)
-{
- struct pmic *p;
- int ret;
- unsigned int reg;
-
- ret = power_pfuze100_init(I2C_PMIC);
- if (ret)
- return ret;
-
- p = pmic_get("PFUZE100");
- ret = pmic_probe(p);
- if (ret)
- return ret;
-
- pmic_reg_read(p, PFUZE100_DEVICEID, ®);
- printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
-
- /* Increase VGEN3 from 2.5 to 2.8V */
- pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
- reg &= ~LDO_VOL_MASK;
- reg |= LDOB_2_80V;
- pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
-
- /* Increase VGEN5 from 2.8 to 3V */
- pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
- reg &= ~LDO_VOL_MASK;
- reg |= LDOB_3_00V;
- pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
-
- /* Set SW1AB stanby volage to 0.975V */
- pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®);
- reg &= ~SW1x_STBY_MASK;
- reg |= SW1x_0_975V;
- pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
-
- /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PFUZE100_SW1ABCONF, ®);
- reg &= ~SW1xCONF_DVSSPEED_MASK;
- reg |= SW1xCONF_DVSSPEED_4US;
- pmic_reg_write(p, PFUZE100_SW1ABCONF, reg);
-
- /* Set SW1C standby voltage to 0.975V */
- pmic_reg_read(p, PFUZE100_SW1CSTBY, ®);
- reg &= ~SW1x_STBY_MASK;
- reg |= SW1x_0_975V;
- pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
-
- /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
- pmic_reg_read(p, PFUZE100_SW1CCONF, ®);
- reg &= ~SW1xCONF_DVSSPEED_MASK;
- reg |= SW1xCONF_DVSSPEED_4US;
- pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_BMODE
-static const struct boot_mode board_boot_modes[] = {
- /* 4 bit bus width */
- {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
- /* 8 bit bus width */
- {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_BMODE
- add_board_boot_modes(board_boot_modes);
-#endif
-
- env_set("board_name", BOARD_NAME);
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: ");
- puts(BOARD_NAME "\n");
-
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-#include <spl.h>
-#include <linux/libfdt.h>
-
-const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = {
- .dram_sdclk_0 = 0x00020030,
- .dram_sdclk_1 = 0x00020030,
- .dram_cas = 0x00020030,
- .dram_ras = 0x00020030,
- .dram_reset = 0x00020030,
- .dram_sdcke0 = 0x00003000,
- .dram_sdcke1 = 0x00003000,
- .dram_sdba2 = 0x00000000,
- .dram_sdodt0 = 0x00003030,
- .dram_sdodt1 = 0x00003030,
- .dram_sdqs0 = 0x00000030,
- .dram_sdqs1 = 0x00000030,
- .dram_sdqs2 = 0x00000030,
- .dram_sdqs3 = 0x00000030,
- .dram_sdqs4 = 0x00000030,
- .dram_sdqs5 = 0x00000030,
- .dram_sdqs6 = 0x00000030,
- .dram_sdqs7 = 0x00000030,
- .dram_dqm0 = 0x00020030,
- .dram_dqm1 = 0x00020030,
- .dram_dqm2 = 0x00020030,
- .dram_dqm3 = 0x00020030,
- .dram_dqm4 = 0x00020030,
- .dram_dqm5 = 0x00020030,
- .dram_dqm6 = 0x00020030,
- .dram_dqm7 = 0x00020030,
-};
-
-const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = {
- .grp_ddr_type = 0x000C0000,
- .grp_ddrmode_ctl = 0x00020000,
- .grp_ddrpke = 0x00000000,
- .grp_addds = 0x00000030,
- .grp_ctlds = 0x00000030,
- .grp_ddrmode = 0x00020000,
- .grp_b0ds = 0x00000030,
- .grp_b1ds = 0x00000030,
- .grp_b2ds = 0x00000030,
- .grp_b3ds = 0x00000030,
- .grp_b4ds = 0x00000030,
- .grp_b5ds = 0x00000030,
- .grp_b6ds = 0x00000030,
- .grp_b7ds = 0x00000030,
-};
-
-const struct mx6_mmdc_calibration mx6_mmcd_calib = {
- .p0_mpwldectrl0 = 0x001F001F,
- .p0_mpwldectrl1 = 0x001F001F,
- .p1_mpwldectrl0 = 0x00440044,
- .p1_mpwldectrl1 = 0x00440044,
- .p0_mpdgctrl0 = 0x434B0350,
- .p0_mpdgctrl1 = 0x034C0359,
- .p1_mpdgctrl0 = 0x434B0350,
- .p1_mpdgctrl1 = 0x03650348,
- .p0_mprddlctl = 0x4436383B,
- .p1_mprddlctl = 0x39393341,
- .p0_mpwrdlctl = 0x35373933,
- .p1_mpwrdlctl = 0x48254A36,
-};
-
-/* MT41K128M16JT-125 */
-static struct mx6_ddr3_cfg mem_ddr = {
- .mem_speed = 1600,
- .density = 2,
- .width = 16,
- .banks = 8,
- .rowaddr = 14,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1375,
- .trcmin = 4875,
- .trasmin = 3500,
-};
-
-static void ccgr_init(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- writel(0x00C03F3F, &ccm->CCGR0);
- writel(0x0030FC03, &ccm->CCGR1);
- writel(0x0FFFC000, &ccm->CCGR2);
- writel(0x3FF00000, &ccm->CCGR3);
- writel(0x00FFF300, &ccm->CCGR4);
- writel(0x0F0000C3, &ccm->CCGR5);
- writel(0x000003FF, &ccm->CCGR6);
-}
-
-/*
- * This section requires the differentiation between iMX6 Sabre boards, but
- * for now, it will configure only for the mx6q variant.
- */
-static void spl_dram_init(void)
-{
- struct mx6_ddr_sysinfo sysinfo = {
- /* width of data bus:0=16,1=32,2=64 */
- .dsize = 2,
- /* config for full 4GB range so that get_mem_size() works */
- .cs_density = 32, /* 32Gb per CS */
- /* single chip select */
- .ncs = 1,
- .cs1_mirror = 0,
- .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */
- .rtt_nom = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Nom = RZQ/4 */
- .walat = 1, /* Write additional latency */
- .ralat = 5, /* Read additional latency */
- .mif3_mode = 3, /* Command prediction working mode */
- .bi_on = 1, /* Bank interleaving enabled */
- .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
- .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
- .ddr_type = DDR_TYPE_DDR3,
- .refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
- };
-
- mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);
-}
-
-void board_init_f(ulong dummy)
-{
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
-
- ccgr_init();
- gpr_init();
-
- /* iomux and setup of i2c */
- board_early_init_f();
-
- /* setup GP timer */
- timer_init();
-
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
-
- /* DDR initialization */
- spl_dram_init();
-
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
-
- /* load/boot image from boot device */
- board_init_r(NULL, 0);
-}
-
-#endif
diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig
deleted file mode 100644
index 4c298cb4da..0000000000
--- a/configs/zc5202_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x0
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
-CONFIG_TARGET_ZC5202=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
-CONFIG_BOOTDELAY=3
-CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
-CONFIG_DEFAULT_FDT_FILE="imx6q-zc5202.dtb"
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_SYS_MEMTEST_START=0x10000000
-CONFIG_SYS_MEMTEST_END=0x10800000
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_BUS=3
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_MV88E6352_SWITCH=y
-CONFIG_MII=y
-CONFIG_PCI=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig
deleted file mode 100644
index e8f4736541..0000000000
--- a/configs/zc5601_defconfig
+++ /dev/null
@@ -1,54 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x0
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
-CONFIG_TARGET_ZC5601=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
-CONFIG_BOOTDELAY=3
-CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
-CONFIG_DEFAULT_FDT_FILE="imx6q-zc5601.dtb"
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_SYS_MEMTEST_START=0x10000000
-CONFIG_SYS_MEMTEST_END=0x10800000
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_BUS=3
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h
deleted file mode 100644
index 7246b9eb65..0000000000
--- a/include/configs/zc5202.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) Stefano Babic <sbabic@denx.de>
- *
- * Configuration settings for the E+L i.MX6Q DO82 board.
- */
-
-#ifndef __EL_ZC5202_H
-#define __EL_ZC5202_H
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONSOLE_DEV "ttymxc1"
-#define CONFIG_MMCROOT "/dev/mmcblk0p2"
-
-#include "el6x_common.h"
-
-/* Ethernet */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE MII100
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0
-
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_PCIE_IMX
-
-#endif /*__EL6Q_CONFIG_H */
diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h
deleted file mode 100644
index e4fe7a462d..0000000000
--- a/include/configs/zc5601.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) Stefano Babic <sbabic@denx.de>
- *
- * Configuration settings for the E+L i.MX6Q DO82 board.
- */
-
-#ifndef __EL_ZC5601_H
-#define __EL_ZC5601_H
-
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONSOLE_DEV "ttymxc1"
-#define CONFIG_MMCROOT "/dev/mmcblk0p1"
-
-#include "el6x_common.h"
-
-/* Ethernet */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x10
-#define CONFIG_FEC_FIXED_SPEED 1000 /* No autoneg, fix Gb */
-
-#endif /*__EL6Q_CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 11/16] arm: Remove cgtqmx6eval board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (9 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 10/16] arm: Remove zc5202/zc5601 board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 13:00 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 12/16] arm: Remove ot1200 board Jagan Teki
` (5 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 10 -
board/congatec/cgtqmx6eval/Kconfig | 12 -
board/congatec/cgtqmx6eval/MAINTAINERS | 6 -
board/congatec/cgtqmx6eval/Makefile | 8 -
board/congatec/cgtqmx6eval/README | 74 --
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 ----------------------
configs/cgtqmx6eval_defconfig | 85 --
include/configs/cgtqmx6eval.h | 209 -----
8 files changed, 1495 deletions(-)
delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
delete mode 100644 board/congatec/cgtqmx6eval/Makefile
delete mode 100644 board/congatec/cgtqmx6eval/README
delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
delete mode 100644 configs/cgtqmx6eval_defconfig
delete mode 100644 include/configs/cgtqmx6eval.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 2ca78d22a8..6816acdf4f 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -169,15 +169,6 @@ config TARGET_ARISTAINETOS2C
imply CMD_SATA
imply CMD_DM
-config TARGET_CGTQMX6EVAL
- bool "cgtqmx6eval"
- select BOARD_LATE_INIT
- select DM
- select DM_THERMAL
- select MX6QDL
- select SUPPORT_SPL
- imply CMD_DM
-
config TARGET_CM_FX6
bool "CM-FX6"
select BOARD_LATE_INIT
@@ -665,7 +656,6 @@ source "board/boundary/nitrogen6x/Kconfig"
source "board/bticino/mamoj/Kconfig"
source "board/ccv/xpress/Kconfig"
source "board/compulab/cm_fx6/Kconfig"
-source "board/congatec/cgtqmx6eval/Kconfig"
source "board/dhelectronics/dh_imx6/Kconfig"
source "board/engicam/imx6q/Kconfig"
source "board/engicam/imx6ul/Kconfig"
diff --git a/board/congatec/cgtqmx6eval/Kconfig b/board/congatec/cgtqmx6eval/Kconfig
deleted file mode 100644
index 773551baa9..0000000000
--- a/board/congatec/cgtqmx6eval/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_CGTQMX6EVAL
-
-config SYS_BOARD
- default "cgtqmx6eval"
-
-config SYS_VENDOR
- default "congatec"
-
-config SYS_CONFIG_NAME
- default "cgtqmx6eval"
-
-endif
diff --git a/board/congatec/cgtqmx6eval/MAINTAINERS b/board/congatec/cgtqmx6eval/MAINTAINERS
deleted file mode 100644
index 48c08891b3..0000000000
--- a/board/congatec/cgtqmx6eval/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-CGTQMX6EVAL BOARD
-M: Otavio Salvador <otavio@ossystems.com.br>
-S: Maintained
-F: board/congatec/cgtqmx6eval/
-F: include/configs/cgtqmx6eval.h
-F: configs/cgtqmx6eval_defconfig
diff --git a/board/congatec/cgtqmx6eval/Makefile b/board/congatec/cgtqmx6eval/Makefile
deleted file mode 100644
index 2c45ca0e12..0000000000
--- a/board/congatec/cgtqmx6eval/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2011 Freescale Semiconductor, Inc.
-# (C) Copyright 2013 Adeneo Embedded <www.adeneo-embedded.com>
-
-obj-y := cgtqmx6eval.o
diff --git a/board/congatec/cgtqmx6eval/README b/board/congatec/cgtqmx6eval/README
deleted file mode 100644
index 0777c781c2..0000000000
--- a/board/congatec/cgtqmx6eval/README
+++ /dev/null
@@ -1,74 +0,0 @@
-U-Boot for the Congatec QMX6 boards
-
-This file contains information for the port of U-Boot to the Congatec
-QMX6 boards.
-
-1. Building U-Boot
-------------------
-
-- Build U-Boot for Congatec QMX6 boards:
-
-$ make mrproper
-$ make cgtqmx6eval_defconfig
-$ make
-
-This will generate the following binaries:
-
-- SPL
-- u-boot.img
-
-2. Flashing U-Boot in the SPI NOR
----------------------------------
-
-Copy SPL and u-boot.img to the exported TFTP directory of the
-host PC (/tftpboot , for example).
-
-=> sf probe
-
-=> setenv serverip <server_ip_address>
-
-=> setenv ipaddr <board_ip_address>
-
-=> tftp 0x12000000 SPL
-
-=> sf erase 0x0 0x10000
-
-=> sf write 0x12000000 0x400 0x10000
-
-=> tftp 0x12000000 u-boot.img
-
-=> sf erase 0x10000 0x70000
-
-=> sf write 0x12000000 0x10000 0x70000
-
-Reboot the board and the new U-Boot should come up.
-
-3. Booting from the SD card
----------------------------
-
-- Flash the SPL image into the SD card:
-
-sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
-
-- Flash the u-boot.img image into the SD card:
-
-sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
-
-- Insert the SD card into the big slot.
-
-The boot medium of Congatec QMX6 boards is the SPI NOR flash, so boot
-the board from SPI first.
-
-It is also possible to boot from the SD card slot by using the 'bmode'
-command:
-
-=> bmode esdhc4
-
-And then the U-Boot from the big slot will boot.
-
-Note: If the "bmode" command is not available from your pre-installed U-Boot,
-these instruction will produce the same effect:
-
-=> mw.l 0x20d8040 0x3850
-=> mw.l 0x020d8044 0x10000000
-=> reset
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
deleted file mode 100644
index 044cefd979..0000000000
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ /dev/null
@@ -1,1091 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
- * Based on mx6qsabrelite.c file
- * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
- * Leo Sartre, <lsartre@adeneo-embedded.com>
- */
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/sata.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <env.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <i2c.h>
-#include <input.h>
-#include <linux/delay.h>
-#include <power/pmic.h>
-#include <power/pfuze100_pmic.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-#include <malloc.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <micrel.h>
-#include <spi_flash.h>
-#include <spi.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |\
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
- PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | \
- PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define MX6Q_QMX6_PFUZE_MUX IMX_GPIO_NR(6, 9)
-
-
-#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
-
- return 0;
-}
-
-static iomux_v3_cfg_t const uart2_pads[] = {
- IOMUX_PADS(PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
-#ifndef CONFIG_SPL_BUILD
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
- IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-};
-#endif
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
- IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
- IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const usb_otg_pads[] = {
- IOMUX_PADS(PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t enet_pads_ksz9031[] = {
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t enet_pads_final_ksz9031[] = {
- IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t enet_pads_ar8035[] = {
- IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
- IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
-};
-
-static iomux_v3_cfg_t const ecspi1_pads[] = {
- IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)),
-};
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info mx6q_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
- .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
- .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-struct i2c_pads_info mx6dl_i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
- .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
- .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-#define I2C_PMIC 1 /* I2C2 port is used to connect to the PMIC */
-
-struct interface_level {
- char *name;
- uchar value;
-};
-
-static struct interface_level mipi_levels[] = {
- {"0V0", 0x00},
- {"2V5", 0x17},
-};
-
-/* setup board specific PMIC */
-int power_init_board(void)
-{
- struct pmic *p;
- u32 id1, id2, i;
- int ret;
- char const *lv_mipi;
-
- /* configure I2C multiplexer */
- gpio_direction_output(MX6Q_QMX6_PFUZE_MUX, 1);
-
- power_pfuze100_init(I2C_PMIC);
- p = pmic_get("PFUZE100");
- if (!p)
- return -EINVAL;
-
- ret = pmic_probe(p);
- if (ret)
- return ret;
-
- pmic_reg_read(p, PFUZE100_DEVICEID, &id1);
- pmic_reg_read(p, PFUZE100_REVID, &id2);
- printf("PFUZE100 Rev. [%02x/%02x] detected\n", id1, id2);
-
- if (id2 >= 0x20)
- return 0;
-
- /* set level of MIPI if specified */
- lv_mipi = env_get("lv_mipi");
- if (lv_mipi)
- return 0;
-
- for (i = 0; i < ARRAY_SIZE(mipi_levels); i++) {
- if (!strcmp(mipi_levels[i].name, lv_mipi)) {
- printf("set MIPI level %s\n", mipi_levels[i].name);
- ret = pmic_reg_write(p, PFUZE100_VGEN4VOL,
- mipi_levels[i].value);
- if (ret)
- return ret;
- }
- }
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- struct phy_device *phydev;
- struct mii_dev *bus;
- unsigned short id1, id2;
- int ret;
-
- /* check whether KSZ9031 or AR8035 has to be configured */
- SETUP_IOMUX_PADS(enet_pads_ar8035);
-
- /* phy reset */
- gpio_direction_output(IMX_GPIO_NR(3, 23), 0);
- udelay(2000);
- gpio_set_value(IMX_GPIO_NR(3, 23), 1);
- udelay(500);
-
- bus = fec_get_miibus(IMX_FEC_BASE, -1);
- if (!bus)
- return -EINVAL;
- phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
- if (!phydev) {
- printf("Error: phy device not found.\n");
- ret = -ENODEV;
- goto free_bus;
- }
-
- /* get the PHY id */
- id1 = phy_read(phydev, MDIO_DEVAD_NONE, 2);
- id2 = phy_read(phydev, MDIO_DEVAD_NONE, 3);
-
- if ((id1 == 0x22) && ((id2 & 0xFFF0) == 0x1620)) {
- /* re-configure for Micrel KSZ9031 */
- printf("configure Micrel KSZ9031 Ethernet Phy@address %d\n",
- phydev->addr);
-
- /* phy reset: gpio3-23 */
- gpio_set_value(IMX_GPIO_NR(3, 23), 0);
- gpio_set_value(IMX_GPIO_NR(6, 30), (phydev->addr >> 2));
- gpio_set_value(IMX_GPIO_NR(6, 25), 1);
- gpio_set_value(IMX_GPIO_NR(6, 27), 1);
- gpio_set_value(IMX_GPIO_NR(6, 28), 1);
- gpio_set_value(IMX_GPIO_NR(6, 29), 1);
- SETUP_IOMUX_PADS(enet_pads_ksz9031);
- gpio_set_value(IMX_GPIO_NR(6, 24), 1);
- udelay(500);
- gpio_set_value(IMX_GPIO_NR(3, 23), 1);
- SETUP_IOMUX_PADS(enet_pads_final_ksz9031);
- } else if ((id1 == 0x004d) && (id2 == 0xd072)) {
- /* configure Atheros AR8035 - actually nothing to do */
- printf("configure Atheros AR8035 Ethernet Phy at address %d\n",
- phydev->addr);
- } else {
- printf("Unknown Ethernet-Phy: 0x%04x 0x%04x\n", id1, id2);
- ret = -EINVAL;
- goto free_phydev;
- }
-
- ret = fec_probe(bis, -1, IMX_FEC_BASE, bus, phydev);
- if (ret)
- goto free_phydev;
-
- return 0;
-
-free_phydev:
- free(phydev);
-free_bus:
- free(bus);
- return ret;
-}
-
-int mx6_rgmii_rework(struct phy_device *phydev)
-{
- unsigned short id1, id2;
- unsigned short val;
-
- /* check whether KSZ9031 or AR8035 has to be configured */
- id1 = phy_read(phydev, MDIO_DEVAD_NONE, 2);
- id2 = phy_read(phydev, MDIO_DEVAD_NONE, 3);
-
- if ((id1 == 0x22) && ((id2 & 0xFFF0) == 0x1620)) {
- /* finalize phy configuration for Micrel KSZ9031 */
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 4);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_POST_INC_W | 0x2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x0000);
-
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 5);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_POST_INC_W | 0x2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, MII_KSZ9031_MOD_REG);
-
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 6);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_POST_INC_W | 0x2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0xFFFF);
-
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 8);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_POST_INC_W | 0x2);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x3FFF);
-
- /* fix KSZ9031 link up issue */
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 0x0);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x4);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_NO_POST_INC);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x6);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_REG);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x3);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_NO_POST_INC);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, 0x1A80);
- }
-
- if ((id1 == 0x004d) && (id2 == 0xd072)) {
- /* enable AR8035 ouput a 125MHz clk from CLK_25M */
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, 0x7);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, MII_KSZ9031_MOD_DATA_POST_INC_RW | 0x16);
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_CONTROL, MII_KSZ9031_MOD_DATA_NO_POST_INC | 0x7);
- val = phy_read(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA);
- val &= 0xfe63;
- val |= 0x18;
- phy_write(phydev, MDIO_DEVAD_NONE, MMD_ACCESS_REG_DATA, val);
-
- /* introduce tx clock delay */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
- val |= 0x0100;
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
- /* disable hibernation */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0xb);
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3c40);
- }
- return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- mx6_rgmii_rework(phydev);
-
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
-
-static void setup_iomux_uart(void)
-{
- SETUP_IOMUX_PADS(uart2_pads);
-}
-
-#ifdef CONFIG_MXC_SPI
-static void setup_spi(void)
-{
- SETUP_IOMUX_PADS(ecspi1_pads);
- gpio_direction_output(IMX_GPIO_NR(3, 19), 0);
-}
-#endif
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-static struct fsl_esdhc_cfg usdhc_cfg[] = {
- {USDHC2_BASE_ADDR},
- {USDHC3_BASE_ADDR},
- {USDHC4_BASE_ADDR},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC2_BASE_ADDR:
- gpio_direction_input(IMX_GPIO_NR(1, 4));
- ret = !gpio_get_value(IMX_GPIO_NR(1, 4));
- break;
- case USDHC3_BASE_ADDR:
- ret = 1; /* eMMC is always present */
- break;
- case USDHC4_BASE_ADDR:
- gpio_direction_input(IMX_GPIO_NR(2, 6));
- ret = !gpio_get_value(IMX_GPIO_NR(2, 6));
- break;
- default:
- printf("Bad USDHC interface\n");
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
-#ifndef CONFIG_SPL_BUILD
- s32 status = 0;
- int i;
-
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-
- SETUP_IOMUX_PADS(usdhc2_pads);
- SETUP_IOMUX_PADS(usdhc3_pads);
- SETUP_IOMUX_PADS(usdhc4_pads);
-
- for (i = 0; i < ARRAY_SIZE(usdhc_cfg); i++) {
- status = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (status)
- return status;
- }
-
- return 0;
-#else
- SETUP_IOMUX_PADS(usdhc4_pads);
- usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR;
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk;
-
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
-#endif
-}
-#endif
-
-int board_ehci_hcd_init(int port)
-{
- switch (port) {
- case 0:
- SETUP_IOMUX_PADS(usb_otg_pads);
- /*
- * set daisy chain for otg_pin_id on 6q.
- * for 6dl, this bit is reserved
- */
- imx_iomux_set_gpr_register(1, 13, 1, 1);
- break;
- case 1:
- /* nothing to do */
- break;
- default:
- printf("Invalid USB port: %d\n", port);
- return -EINVAL;
- }
-
- return 0;
-}
-
-int board_ehci_power(int port, int on)
-{
- switch (port) {
- case 0:
- break;
- case 1:
- gpio_direction_output(IMX_GPIO_NR(5, 5), on);
- break;
- default:
- printf("Invalid USB port: %d\n", port);
- return -EINVAL;
- }
-
- return 0;
-}
-
-struct display_info_t {
- int bus;
- int addr;
- int pixfmt;
- int (*detect)(struct display_info_t const *dev);
- void (*enable)(struct display_info_t const *dev);
- struct fb_videomode mode;
-};
-
-static void disable_lvds(struct display_info_t const *dev)
-{
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
- clrbits_le32(&iomux->gpr[2], IOMUXC_GPR2_LVDS_CH0_MODE_MASK |
- IOMUXC_GPR2_LVDS_CH1_MODE_MASK);
-}
-
-static void do_enable_hdmi(struct display_info_t const *dev)
-{
- disable_lvds(dev);
- imx_enable_hdmi_phy();
-}
-
-static struct display_info_t const displays[] = {
-{
- .bus = -1,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB666,
- .detect = NULL,
- .enable = NULL,
- .mode = {
- .name =
- "Hannstar-XGA",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED } },
-{
- .bus = -1,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB24,
- .detect = NULL,
- .enable = do_enable_hdmi,
- .mode = {
- .name = "HDMI",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED } }
-};
-
-int board_video_skip(void)
-{
- int i;
- int ret;
- char const *panel = env_get("panel");
- if (!panel) {
- for (i = 0; i < ARRAY_SIZE(displays); i++) {
- struct display_info_t const *dev = displays + i;
- if (dev->detect && dev->detect(dev)) {
- panel = dev->mode.name;
- printf("auto-detected panel %s\n", panel);
- break;
- }
- }
- if (!panel) {
- panel = displays[0].mode.name;
- printf("No panel detected: default to %s\n", panel);
- i = 0;
- }
- } else {
- for (i = 0; i < ARRAY_SIZE(displays); i++) {
- if (!strcmp(panel, displays[i].mode.name))
- break;
- }
- }
- if (i < ARRAY_SIZE(displays)) {
- ret = ipuv3_fb_init(&displays[i].mode, 0, displays[i].pixfmt);
- if (!ret) {
- if (displays[i].enable)
- displays[i].enable(displays + i);
- printf("Display: %s (%ux%u)\n",
- displays[i].mode.name, displays[i].mode.xres,
- displays[i].mode.yres);
- } else
- printf("LCD %s cannot be configured: %d\n",
- displays[i].mode.name, ret);
- } else {
- printf("unsupported panel %s\n", panel);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void setup_display(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
- int reg;
-
- enable_ipu_clock();
- imx_setup_hdmi();
-
- /* Turn on LDB0, LDB1, IPU,IPU DI0 clocks */
- setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK |
- MXC_CCM_CCGR3_LDB_DI1_MASK);
-
- /* set LDB0, LDB1 clk select to 011/011 */
- reg = readl(&mxc_ccm->cs2cdr);
- reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
- MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
- reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
- (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
- writel(reg, &mxc_ccm->cs2cdr);
-
- setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV |
- MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV);
-
- setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 <<
- MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET |
- CHSCCDR_CLK_SEL_LDB_DI0 <<
- MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
-
- reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
- | IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW
- | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
- | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
- | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
- | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
- | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
- | IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED
- | IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0;
- writel(reg, &iomux->gpr[2]);
-
- reg = readl(&iomux->gpr[3]);
- reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK |
- IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) |
- (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
- IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET);
- writel(reg, &iomux->gpr[3]);
-}
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
- return 1;
-}
-
-int board_early_init_f(void)
-{
- setup_iomux_uart();
-#ifdef CONFIG_MXC_SPI
- setup_spi();
-#endif
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-
- if (is_mx6dq())
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1);
- else
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
-
- setup_display();
-
-#ifdef CONFIG_SATA
- setup_sata();
-#endif
-
- return 0;
-}
-
-int checkboard(void)
-{
- char *type = "unknown";
-
- if (is_cpu_type(MXC_CPU_MX6Q))
- type = "Quad";
- else if (is_cpu_type(MXC_CPU_MX6D))
- type = "Dual";
- else if (is_cpu_type(MXC_CPU_MX6DL))
- type = "Dual-Lite";
- else if (is_cpu_type(MXC_CPU_MX6SOLO))
- type = "Solo";
-
- printf("Board: conga-QMX6 %s\n", type);
-
- return 0;
-}
-
-#ifdef CONFIG_MXC_SPI
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -EINVAL;
-}
-#endif
-
-#ifdef CONFIG_CMD_BMODE
-static const struct boot_mode board_boot_modes[] = {
- /* 4 bit bus width */
- {"mmc0", MAKE_CFGVAL(0x50, 0x20, 0x00, 0x00)},
- {"mmc1", MAKE_CFGVAL(0x50, 0x38, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-int misc_init_r(void)
-{
-#ifdef CONFIG_CMD_BMODE
- add_board_boot_modes(board_boot_modes);
-#endif
- return 0;
-}
-
-int board_late_init(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- if (is_mx6dq())
- env_set("board_rev", "MX6Q");
- else
- env_set("board_rev", "MX6DL");
-#endif
-
- return 0;
-}
-
-#ifdef CONFIG_SPL_BUILD
-#include <asm/arch/mx6-ddr.h>
-#include <spl.h>
-#include <linux/libfdt.h>
-#include <spi_flash.h>
-#include <spi.h>
-
-const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {
- .dram_sdclk_0 = 0x00000030,
- .dram_sdclk_1 = 0x00000030,
- .dram_cas = 0x00000030,
- .dram_ras = 0x00000030,
- .dram_reset = 0x00000030,
- .dram_sdcke0 = 0x00003000,
- .dram_sdcke1 = 0x00003000,
- .dram_sdba2 = 0x00000000,
- .dram_sdodt0 = 0x00000030,
- .dram_sdodt1 = 0x00000030,
- .dram_sdqs0 = 0x00000030,
- .dram_sdqs1 = 0x00000030,
- .dram_sdqs2 = 0x00000030,
- .dram_sdqs3 = 0x00000030,
- .dram_sdqs4 = 0x00000030,
- .dram_sdqs5 = 0x00000030,
- .dram_sdqs6 = 0x00000030,
- .dram_sdqs7 = 0x00000030,
- .dram_dqm0 = 0x00000030,
- .dram_dqm1 = 0x00000030,
- .dram_dqm2 = 0x00000030,
- .dram_dqm3 = 0x00000030,
- .dram_dqm4 = 0x00000030,
- .dram_dqm5 = 0x00000030,
- .dram_dqm6 = 0x00000030,
- .dram_dqm7 = 0x00000030,
-};
-
-static const struct mx6sdl_iomux_ddr_regs mx6dl_ddr_ioregs = {
- .dram_sdclk_0 = 0x00000030,
- .dram_sdclk_1 = 0x00000030,
- .dram_cas = 0x00000030,
- .dram_ras = 0x00000030,
- .dram_reset = 0x00000030,
- .dram_sdcke0 = 0x00003000,
- .dram_sdcke1 = 0x00003000,
- .dram_sdba2 = 0x00000000,
- .dram_sdodt0 = 0x00000030,
- .dram_sdodt1 = 0x00000030,
- .dram_sdqs0 = 0x00000030,
- .dram_sdqs1 = 0x00000030,
- .dram_sdqs2 = 0x00000030,
- .dram_sdqs3 = 0x00000030,
- .dram_sdqs4 = 0x00000030,
- .dram_sdqs5 = 0x00000030,
- .dram_sdqs6 = 0x00000030,
- .dram_sdqs7 = 0x00000030,
- .dram_dqm0 = 0x00000030,
- .dram_dqm1 = 0x00000030,
- .dram_dqm2 = 0x00000030,
- .dram_dqm3 = 0x00000030,
- .dram_dqm4 = 0x00000030,
- .dram_dqm5 = 0x00000030,
- .dram_dqm6 = 0x00000030,
- .dram_dqm7 = 0x00000030,
-};
-
-const struct mx6dq_iomux_grp_regs mx6q_grp_ioregs = {
- .grp_ddr_type = 0x000C0000,
- .grp_ddrmode_ctl = 0x00020000,
- .grp_ddrpke = 0x00000000,
- .grp_addds = 0x00000030,
- .grp_ctlds = 0x00000030,
- .grp_ddrmode = 0x00020000,
- .grp_b0ds = 0x00000030,
- .grp_b1ds = 0x00000030,
- .grp_b2ds = 0x00000030,
- .grp_b3ds = 0x00000030,
- .grp_b4ds = 0x00000030,
- .grp_b5ds = 0x00000030,
- .grp_b6ds = 0x00000030,
- .grp_b7ds = 0x00000030,
-};
-
-static const struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {
- .grp_ddr_type = 0x000c0000,
- .grp_ddrmode_ctl = 0x00020000,
- .grp_ddrpke = 0x00000000,
- .grp_addds = 0x00000030,
- .grp_ctlds = 0x00000030,
- .grp_ddrmode = 0x00020000,
- .grp_b0ds = 0x00000030,
- .grp_b1ds = 0x00000030,
- .grp_b2ds = 0x00000030,
- .grp_b3ds = 0x00000030,
- .grp_b4ds = 0x00000030,
- .grp_b5ds = 0x00000030,
- .grp_b6ds = 0x00000030,
- .grp_b7ds = 0x00000030,
-};
-
-const struct mx6_mmdc_calibration mx6q_mmcd_calib = {
- .p0_mpwldectrl0 = 0x0016001A,
- .p0_mpwldectrl1 = 0x0023001C,
- .p1_mpwldectrl0 = 0x0028003A,
- .p1_mpwldectrl1 = 0x001F002C,
- .p0_mpdgctrl0 = 0x43440354,
- .p0_mpdgctrl1 = 0x033C033C,
- .p1_mpdgctrl0 = 0x43300368,
- .p1_mpdgctrl1 = 0x03500330,
- .p0_mprddlctl = 0x3228242E,
- .p1_mprddlctl = 0x2C2C2636,
- .p0_mpwrdlctl = 0x36323A38,
- .p1_mpwrdlctl = 0x42324440,
-};
-
-const struct mx6_mmdc_calibration mx6q_2g_mmcd_calib = {
- .p0_mpwldectrl0 = 0x00080016,
- .p0_mpwldectrl1 = 0x001D0016,
- .p1_mpwldectrl0 = 0x0018002C,
- .p1_mpwldectrl1 = 0x000D001D,
- .p0_mpdgctrl0 = 0x43200334,
- .p0_mpdgctrl1 = 0x0320031C,
- .p1_mpdgctrl0 = 0x0344034C,
- .p1_mpdgctrl1 = 0x03380314,
- .p0_mprddlctl = 0x3E36383A,
- .p1_mprddlctl = 0x38363240,
- .p0_mpwrdlctl = 0x36364238,
- .p1_mpwrdlctl = 0x4230423E,
-};
-
-static const struct mx6_mmdc_calibration mx6s_mmcd_calib = {
- .p0_mpwldectrl0 = 0x00480049,
- .p0_mpwldectrl1 = 0x00410044,
- .p0_mpdgctrl0 = 0x42480248,
- .p0_mpdgctrl1 = 0x023C023C,
- .p0_mprddlctl = 0x40424644,
- .p0_mpwrdlctl = 0x34323034,
-};
-
-const struct mx6_mmdc_calibration mx6dl_mmcd_calib = {
- .p0_mpwldectrl0 = 0x0043004B,
- .p0_mpwldectrl1 = 0x003A003E,
- .p1_mpwldectrl0 = 0x0047004F,
- .p1_mpwldectrl1 = 0x004E0061,
- .p0_mpdgctrl0 = 0x42500250,
- .p0_mpdgctrl1 = 0x0238023C,
- .p1_mpdgctrl0 = 0x42640264,
- .p1_mpdgctrl1 = 0x02500258,
- .p0_mprddlctl = 0x40424846,
- .p1_mprddlctl = 0x46484842,
- .p0_mpwrdlctl = 0x38382C30,
- .p1_mpwrdlctl = 0x34343430,
-};
-
-static struct mx6_ddr3_cfg mem_ddr_2g = {
- .mem_speed = 1600,
- .density = 2,
- .width = 16,
- .banks = 8,
- .rowaddr = 14,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1310,
- .trcmin = 4875,
- .trasmin = 3500,
-};
-
-static struct mx6_ddr3_cfg mem_ddr_4g = {
- .mem_speed = 1600,
- .density = 4,
- .width = 16,
- .banks = 8,
- .rowaddr = 15,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1310,
- .trcmin = 4875,
- .trasmin = 3500,
-};
-
-static void ccgr_init(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- writel(0x00C03F3F, &ccm->CCGR0);
- writel(0x0030FC03, &ccm->CCGR1);
- writel(0x0FFFC000, &ccm->CCGR2);
- writel(0x3FF00000, &ccm->CCGR3);
- writel(0x00FFF300, &ccm->CCGR4);
- writel(0x0F0000C3, &ccm->CCGR5);
- writel(0x000003FF, &ccm->CCGR6);
-}
-
-/* Define a minimal structure so that the part number can be read via SPL */
-struct mfgdata {
- unsigned char tsize;
- /* size of checksummed part in bytes */
- unsigned char ckcnt;
- /* checksum corrected byte */
- unsigned char cksum;
- /* decimal serial number, packed BCD */
- unsigned char serial[6];
- /* part number, right justified, ASCII */
- unsigned char pn[16];
-};
-
-static void conv_ascii(unsigned char *dst, unsigned char *src, int len)
-{
- int remain = len;
- unsigned char *sptr = src;
- unsigned char *dptr = dst;
-
- while (remain) {
- if (*sptr) {
- *dptr = *sptr;
- dptr++;
- }
- sptr++;
- remain--;
- }
- *dptr = 0x0;
-}
-
-#define CFG_MFG_ADDR_OFFSET (spi->size - SZ_16K)
-static bool is_2gb(void)
-{
- struct spi_flash *spi;
- int ret;
- char buf[sizeof(struct mfgdata)];
- struct mfgdata *data = (struct mfgdata *)buf;
- unsigned char outbuf[32];
-
- spi = spi_flash_probe(CONFIG_ENV_SPI_BUS,
- CONFIG_ENV_SPI_CS,
- CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
- ret = spi_flash_read(spi, CFG_MFG_ADDR_OFFSET, sizeof(struct mfgdata),
- buf);
- if (ret)
- return false;
-
- /* Congatec Part Numbers 104 and 105 have 2GiB of RAM */
- conv_ascii(outbuf, data->pn, sizeof(data->pn));
- if (!memcmp(outbuf, "016104", 6) || !memcmp(outbuf, "016105", 6))
- return true;
- else
- return false;
-}
-
-static void spl_dram_init(int width)
-{
- struct mx6_ddr_sysinfo sysinfo = {
- /* width of data bus:0=16,1=32,2=64 */
- .dsize = width / 32,
- /* config for full 4GB range so that get_mem_size() works */
- .cs_density = 32, /* 32Gb per CS */
- /* single chip select */
- .ncs = 1,
- .cs1_mirror = 0,
- .rtt_wr = 2,
- .rtt_nom = 2,
- .walat = 0,
- .ralat = 5,
- .mif3_mode = 3,
- .bi_on = 1,
- .sde_to_rst = 0x0d,
- .rst_to_cke = 0x20,
- .refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
- };
-
- if (is_cpu_type(MXC_CPU_MX6Q) && is_2gb()) {
- mx6dq_dram_iocfg(width, &mx6q_ddr_ioregs, &mx6q_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6q_2g_mmcd_calib, &mem_ddr_4g);
- return;
- }
-
- if (is_mx6dq()) {
- mx6dq_dram_iocfg(width, &mx6q_ddr_ioregs, &mx6q_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6q_mmcd_calib, &mem_ddr_2g);
- } else if (is_cpu_type(MXC_CPU_MX6SOLO)) {
- sysinfo.walat = 1;
- mx6sdl_dram_iocfg(width, &mx6dl_ddr_ioregs, &mx6sdl_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6s_mmcd_calib, &mem_ddr_4g);
- } else if (is_cpu_type(MXC_CPU_MX6DL)) {
- sysinfo.walat = 1;
- mx6sdl_dram_iocfg(width, &mx6dl_ddr_ioregs, &mx6sdl_grp_ioregs);
- mx6_dram_cfg(&sysinfo, &mx6dl_mmcd_calib, &mem_ddr_2g);
- }
-}
-
-void board_init_f(ulong dummy)
-{
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
-
- ccgr_init();
- gpr_init();
-
- /* iomux and setup of i2c */
- board_early_init_f();
-
- /* setup GP timer */
- timer_init();
-
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
-
- /* Needed for malloc() to work in SPL prior to board_init_r() */
- spl_init();
-
- /* DDR initialization */
- if (is_cpu_type(MXC_CPU_MX6SOLO))
- spl_dram_init(32);
- else
- spl_dram_init(64);
-
- /* Clear the BSS. */
- memset(__bss_start, 0, __bss_end - __bss_start);
-
- /* load/boot image from boot device */
- board_init_r(NULL, 0);
-}
-#endif
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
deleted file mode 100644
index a934336f41..0000000000
--- a/configs/cgtqmx6eval_defconfig
+++ /dev/null
@@ -1,85 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
-CONFIG_TARGET_CGTQMX6EVAL=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
-CONFIG_BOOTDELAY=3
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_MISC_INIT_R=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DFU=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SATA=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_DWC_AHSATA=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_SF=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x12000000
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_PHYLIB=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Congatec"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
-CONFIG_CI_UDC=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
deleted file mode 100644
index fccc9b18c0..0000000000
--- a/include/configs/cgtqmx6eval.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- *
- * Congatec Conga-QEVAl board configuration file.
- *
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
- * Based on Freescale i.MX6Q Sabre Lite board configuration file.
- * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
- * Leo Sartre, <lsartre@adeneo-embedded.com>
- */
-
-#ifndef __CONFIG_CGTQMX6EVAL_H
-#define __CONFIG_CGTQMX6EVAL_H
-
-#include <linux/stringify.h>
-
-#include "mx6_common.h"
-
-#define CONFIG_MACH_TYPE 4122
-
-#ifdef CONFIG_SPL
-#include "imx6_spl.h"
-#endif
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART2_BASE
-
-/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-
-/* SPI NOR */
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SPI_FLASH_SST
-
-/* Thermal support */
-#define CONFIG_IMX_THERMAL
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/* PMIC */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_PFUZE100
-#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
-
-/* USB Configs */
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS 0
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
-
-#define CONFIG_USBD_HS
-
-/* Framebuffer */
-#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_BMP_16BPP
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IMX_HDMI
-
-/* SATA */
-#define CONFIG_SYS_SATA_MAX_DEVICE 1
-#define CONFIG_DWC_AHSATA_PORT_ID 0
-#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
-#define CONFIG_LBA48
-
-/* Ethernet */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 6
-
-/* Command definition */
-
-#define CONFIG_MXC_UART_BASE UART2_BASE
-#define CONSOLE_DEV "ttymxc1"
-#define CONFIG_MMCROOT "/dev/mmcblk0p2"
-#define CONFIG_SYS_MMC_ENV_DEV 0
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "image=zImage\0" \
- "fdtfile=undefined\0" \
- "fdt_addr_r=0x18000000\0" \
- "boot_fdt=try\0" \
- "ip_dyn=yes\0" \
- "console=" CONSOLE_DEV "\0" \
- "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
- "dfu_alt_info_spl=spl raw 0x400\0" \
- "dfu_alt_info_img=u-boot raw 0x10000\0" \
- "dfu_alt_info=spl raw 0x400\0" \
- "bootm_size=0x10000000\0" \
- "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=1\0" \
- "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
- "update_sd_firmware=" \
- "if test ${ip_dyn} = yes; then " \
- "setenv get_cmd dhcp; " \
- "else " \
- "setenv get_cmd tftp; " \
- "fi; " \
- "if mmc dev ${mmcdev}; then " \
- "if ${get_cmd} ${update_sd_firmware_filename}; then " \
- "setexpr fw_sz ${filesize} / 0x200; " \
- "setexpr fw_sz ${fw_sz} + 1; " \
- "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
- "fi; " \
- "fi\0" \
- "mmcargs=setenv bootargs console=${console},${baudrate} " \
- "root=${mmcroot}\0" \
- "loadbootscript=" \
- "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source\0" \
- "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
- "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
- "if run loadfdt; then " \
- "bootz ${loadaddr} - ${fdt_addr_r}; " \
- "else " \
- "if test ${boot_fdt} = try; then " \
- "bootz; " \
- "else " \
- "echo WARN: Cannot load the DT; " \
- "fi; " \
- "fi; " \
- "else " \
- "bootz; " \
- "fi;\0" \
- "findfdt="\
- "if test $board_rev = MX6Q ; then " \
- "setenv fdtfile imx6q-qmx6.dtb; fi; " \
- "if test $board_rev = MX6DL ; then " \
- "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
- "if test $fdtfile = undefined; then " \
- "echo WARNING: Could not determine dtb to use; fi; \0" \
- "netargs=setenv bootargs console=${console},${baudrate} " \
- "root=/dev/nfs " \
- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
- "netboot=echo Booting from net ...; " \
- "run netargs; " \
- "if test ${ip_dyn} = yes; then " \
- "setenv get_cmd dhcp; " \
- "else " \
- "setenv get_cmd tftp; " \
- "fi; " \
- "${get_cmd} ${image}; " \
- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
- "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
- "bootz ${loadaddr} - ${fdt_addr_r}; " \
- "else " \
- "if test ${boot_fdt} = try; then " \
- "bootz; " \
- "else " \
- "echo WARN: Cannot load the DT; " \
- "fi; " \
- "fi; " \
- "else " \
- "bootz; " \
- "fi;\0" \
- "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
-
-#define CONFIG_BOOTCOMMAND \
- "run spilock;" \
- "run findfdt; " \
- "mmc dev ${mmcdev};" \
- "if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loadimage; then " \
- "run mmcboot; " \
- "else run netboot; " \
- "fi; " \
- "fi; " \
- "else run netboot; fi"
-
-/* Physical Memory Map */
-#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* Environment organization */
-#if defined (CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-
-#endif /* __CONFIG_CGTQMX6EVAL_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 12/16] arm: Remove ot1200 board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (10 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 11/16] arm: Remove cgtqmx6eval board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 13:00 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 13/16] arm: Remove dms-ba16 board Jagan Teki
` (4 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 6 -
board/bachmann/ot1200/Kconfig | 12 -
board/bachmann/ot1200/MAINTAINERS | 6 -
board/bachmann/ot1200/Makefile | 11 -
board/bachmann/ot1200/README | 20 --
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 ---------
board/bachmann/ot1200/ot1200.c | 359 ---------------------
board/bachmann/ot1200/ot1200_spl.c | 152 ---------
configs/ot1200_defconfig | 55 ----
configs/ot1200_spl_defconfig | 66 ----
include/configs/ot1200.h | 99 ------
11 files changed, 940 deletions(-)
delete mode 100644 board/bachmann/ot1200/Kconfig
delete mode 100644 board/bachmann/ot1200/MAINTAINERS
delete mode 100644 board/bachmann/ot1200/Makefile
delete mode 100644 board/bachmann/ot1200/README
delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
delete mode 100644 board/bachmann/ot1200/ot1200.c
delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
delete mode 100644 configs/ot1200_defconfig
delete mode 100644 configs/ot1200_spl_defconfig
delete mode 100644 include/configs/ot1200.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 6816acdf4f..de5753333b 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -458,11 +458,6 @@ config TARGET_OPOS6ULDEV
bool "Armadeus OPOS6ULDev board"
select MX6UL_OPOS6UL
-config TARGET_OT1200
- bool "Bachmann OT1200"
- select SUPPORT_SPL
- imply CMD_SATA
-
config TARGET_PICO_IMX6
bool "PICO-IMX6"
select BOARD_EARLY_INIT_F
@@ -649,7 +644,6 @@ source "board/ge/bx50v3/Kconfig"
source "board/advantech/dms-ba16/Kconfig"
source "board/aristainetos/Kconfig"
source "board/armadeus/opos6uldev/Kconfig"
-source "board/bachmann/ot1200/Kconfig"
source "board/barco/platinum/Kconfig"
source "board/barco/titanium/Kconfig"
source "board/boundary/nitrogen6x/Kconfig"
diff --git a/board/bachmann/ot1200/Kconfig b/board/bachmann/ot1200/Kconfig
deleted file mode 100644
index 4ccb60a97f..0000000000
--- a/board/bachmann/ot1200/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_OT1200
-
-config SYS_BOARD
- default "ot1200"
-
-config SYS_VENDOR
- default "bachmann"
-
-config SYS_CONFIG_NAME
- default "ot1200"
-
-endif
diff --git a/board/bachmann/ot1200/MAINTAINERS b/board/bachmann/ot1200/MAINTAINERS
deleted file mode 100644
index ad75c24ee4..0000000000
--- a/board/bachmann/ot1200/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-BACHMANN ELECTRONIC OT1200 BOARD
-M: Christian Gmeiner <christian.gmeiner@gmail.com>
-S: Maintained
-F: board/bachmann/ot1200
-F: include/configs/ot1200.h
-F: configs/ot1200*_defconfig
diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile
deleted file mode 100644
index 73000e3d3c..0000000000
--- a/board/bachmann/ot1200/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2012-2013, Guennadi Liakhovetski <lg@denx.de>
-# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
-# Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
-
-ifdef CONFIG_SPL_BUILD
-obj-y := ot1200.o ot1200_spl.o
-else
-obj-y := ot1200.o
-endif
diff --git a/board/bachmann/ot1200/README b/board/bachmann/ot1200/README
deleted file mode 100644
index c03d44e458..0000000000
--- a/board/bachmann/ot1200/README
+++ /dev/null
@@ -1,20 +0,0 @@
-U-Boot for the Bachmann electronic GmbH OT1200 devices
-
-There are two different versions of the base board, which differ
-in the way ethernet is done. The variant detection is done during
-runtime based on the address of the found phy.
-
-- "mr" variant
-FEC is connected directly to an ethernet switch (KSZ8895). The ethernet
-port is always up and auto-negotiation is not possible.
-
-- normal variant
-FEC is connected to a normal phy and auto-negotiation is possible.
-
-
-The variant name is part of the dtb file name loaded by u-boot. This
-make is possible to boot the linux kernel and make use variant specific
-devicetree (fixed-phy link).
-
-In order to support different display resoltuions/sizes the OT1200 devices
-are making use of EDID data stored in an i2c EEPROM.
diff --git a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
deleted file mode 100644
index f4f605fc8d..0000000000
--- a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
+++ /dev/null
@@ -1,154 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc.
- * Jason Liu <r64343@freescale.com>
- *
- * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-/* image version */
-IMAGE_VERSION 2
-
-/*
- * Boot Device : one of
- * spi, sd (the board has no nand neither onenand)
- */
-BOOT_FROM sd
-
-/*
- * Device Configuration Data (DCD)
- *
- * Each entry must have the format:
- * Addr-type Address Value
- *
- * where:
- * Addr-type register length (1,2 or 4 bytes)
- * Address absolute address of the register
- * value value to be stored in the register
- */
-DATA 4 0x020e05a8 0x00000030
-DATA 4 0x020e05b0 0x00000030
-DATA 4 0x020e0524 0x00000030
-DATA 4 0x020e051c 0x00000030
-
-DATA 4 0x020e0518 0x00000030
-DATA 4 0x020e050c 0x00000030
-DATA 4 0x020e05b8 0x00000030
-DATA 4 0x020e05c0 0x00000030
-
-DATA 4 0x020e05ac 0x00020030
-DATA 4 0x020e05b4 0x00020030
-DATA 4 0x020e0528 0x00020030
-DATA 4 0x020e0520 0x00020030
-
-DATA 4 0x020e0514 0x00020030
-DATA 4 0x020e0510 0x00020030
-DATA 4 0x020e05bc 0x00020030
-DATA 4 0x020e05c4 0x00020030
-
-DATA 4 0x020e056c 0x00020030
-DATA 4 0x020e0578 0x00020030
-DATA 4 0x020e0588 0x00020030
-DATA 4 0x020e0594 0x00020030
-
-DATA 4 0x020e057c 0x00020030
-DATA 4 0x020e0590 0x00003000
-DATA 4 0x020e0598 0x00003000
-DATA 4 0x020e058c 0x00000000
-
-DATA 4 0x020e059c 0x00003030
-DATA 4 0x020e05a0 0x00003030
-DATA 4 0x020e0784 0x00000030
-DATA 4 0x020e0788 0x00000030
-
-DATA 4 0x020e0794 0x00000030
-DATA 4 0x020e079c 0x00000030
-DATA 4 0x020e07a0 0x00000030
-DATA 4 0x020e07a4 0x00000030
-
-DATA 4 0x020e07a8 0x00000030
-DATA 4 0x020e0748 0x00000030
-DATA 4 0x020e074c 0x00000030
-DATA 4 0x020e0750 0x00020000
-
-DATA 4 0x020e0758 0x00000000
-DATA 4 0x020e0774 0x00020000
-DATA 4 0x020e078c 0x00000030
-DATA 4 0x020e0798 0x000C0000
-
-DATA 4 0x021b081c 0x33333333
-DATA 4 0x021b0820 0x33333333
-DATA 4 0x021b0824 0x33333333
-DATA 4 0x021b0828 0x33333333
-
-DATA 4 0x021b481c 0x33333333
-DATA 4 0x021b4820 0x33333333
-DATA 4 0x021b4824 0x33333333
-DATA 4 0x021b4828 0x33333333
-
-DATA 4 0x021b0018 0x00081740
-
-DATA 4 0x021b001c 0x00008000
-DATA 4 0x021b000c 0x555A7974
-DATA 4 0x021b0010 0xDB538F64
-DATA 4 0x021b0014 0x01FF00DB
-DATA 4 0x021b002c 0x000026D2
-
-DATA 4 0x021b0030 0x005A1023
-DATA 4 0x021b0008 0x09444040
-DATA 4 0x021b0004 0x00025576
-DATA 4 0x021b0040 0x00000027
-DATA 4 0x021b0000 0x831A0000
-
-DATA 4 0x021b001c 0x04088032
-DATA 4 0x021b001c 0x0408803A
-DATA 4 0x021b001c 0x00008033
-DATA 4 0x021b001c 0x0000803B
-DATA 4 0x021b001c 0x00428031
-DATA 4 0x021b001c 0x00428039
-DATA 4 0x021b001c 0x19308030
-DATA 4 0x021b001c 0x19308038
-
-DATA 4 0x021b001c 0x04008040
-DATA 4 0x021b001c 0x04008048
-DATA 4 0x021b0800 0xA1380003
-DATA 4 0x021b4800 0xA1380003
-DATA 4 0x021b0020 0x00005800
-DATA 4 0x021b0818 0x00022227
-DATA 4 0x021b4818 0x00022227
-
-DATA 4 0x021b083c 0x434B0350
-DATA 4 0x021b0840 0x034C0359
-DATA 4 0x021b483c 0x434B0350
-DATA 4 0x021b4840 0x03650348
-DATA 4 0x021b0848 0x4436383B
-DATA 4 0x021b4848 0x39393341
-DATA 4 0x021b0850 0x35373933
-DATA 4 0x021b4850 0x48254A36
-
-DATA 4 0x021b080c 0x001F001F
-DATA 4 0x021b0810 0x001F001F
-
-DATA 4 0x021b480c 0x00440044
-DATA 4 0x021b4810 0x00440044
-
-DATA 4 0x021b08b8 0x00000800
-DATA 4 0x021b48b8 0x00000800
-
-DATA 4 0x021b001c 0x00000000
-DATA 4 0x021b0404 0x00011006
-
-
-/*
- * Setup CCM_CCOSR register as follows:
- *
- * cko1_en = 1 --> CKO1 enabled
- * cko1_div = 111 --> divide by 8
- * cko1_sel = 1011 --> ahb_clk_root
- *
- * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
- */
-DATA 4 0x020c4060 0x000000fb
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
deleted file mode 100644
index db0da0ca2f..0000000000
--- a/board/bachmann/ot1200/ot1200.c
+++ /dev/null
@@ -1,359 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2014, Bachmann electronic GmbH
- */
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <env.h>
-#include <malloc.h>
-#include <asm/arch/mx6-pins.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/sata.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/sys_proto.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <netdev.h>
-#include <i2c.h>
-#include <pca953x.h>
-#include <asm/gpio.h>
-#include <phy.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- OUTPUT_40OHM | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \
- PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | OUTPUT_40OHM | \
- PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | OUTPUT_40OHM | \
- PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
-
- return 0;
-}
-
-static iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-}
-
-static iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_KEY_ROW1__ENET_COL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_COL3__ENET_CRS | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_GPIO_18__ENET_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_RXD0__ENET_RX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_RXD1__ENET_RX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_COL2__ENET_RX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_COL0__ENET_RX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_TXD0__ENET_TX_DATA0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_TXD1__ENET_TX_DATA1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_ROW2__ENET_TX_DATA2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_KEY_ROW0__ENET_TX_DATA3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
-};
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-}
-
-static iomux_v3_cfg_t const ecspi1_pads[] = {
- MX6_PAD_DISP0_DAT3__ECSPI3_SS0 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT4__ECSPI3_SS1 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
-};
-
-static void setup_iomux_spi(void)
-{
- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-}
-
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- return (bus == 2 && cs == 0) ? (IMX_GPIO_NR(1, 3)) : -1;
-}
-
-static iomux_v3_cfg_t const feature_pads[] = {
- /* SD card detect */
- MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_DOWN),
-
- /* eMMC soldered? */
- MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(PAD_CTL_PUS_100K_UP),
-};
-
-static void setup_iomux_features(void)
-{
- imx_iomux_v3_setup_multiple_pads(feature_pads,
- ARRAY_SIZE(feature_pads));
-}
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-/* I2C2 - EEPROM */
-static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
- .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
- .gp = IMX_GPIO_NR(2, 30)
- },
- .sda = {
- .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
- .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
- .gp = IMX_GPIO_NR(3, 16)
- }
-};
-
-/* I2C3 - IO expander */
-static struct i2c_pads_info i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
- .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
- .gp = IMX_GPIO_NR(3, 17)
- },
- .sda = {
- .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
- .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
- .gp = IMX_GPIO_NR(3, 18)
- }
-};
-
-static void setup_iomux_i2c(void)
-{
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
-}
-
-static void ccgr_init(void)
-{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-
- writel(0x00C03F3F, &ccm->CCGR0);
- writel(0x0030FC33, &ccm->CCGR1);
- writel(0x0FFFC000, &ccm->CCGR2);
- writel(0x3FF00000, &ccm->CCGR3);
- writel(0x00FFF300, &ccm->CCGR4);
- writel(0x0F0000C3, &ccm->CCGR5);
- writel(0x000003FF, &ccm->CCGR6);
-}
-
-int board_early_init_f(void)
-{
- ccgr_init();
- gpr_init();
-
- setup_iomux_uart();
- setup_iomux_spi();
- setup_iomux_i2c();
- setup_iomux_features();
-
- return 0;
-}
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
- MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const usdhc4_pads[] = {
- MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret;
-
- if (cfg->esdhc_base == USDHC3_BASE_ADDR) {
- gpio_direction_input(IMX_GPIO_NR(4, 5));
- ret = gpio_get_value(IMX_GPIO_NR(4, 5));
- } else {
- gpio_direction_input(IMX_GPIO_NR(1, 5));
- ret = !gpio_get_value(IMX_GPIO_NR(1, 5));
- }
-
- return ret;
-}
-
-struct fsl_esdhc_cfg usdhc_cfg[2] = {
- {USDHC3_BASE_ADDR},
- {USDHC4_BASE_ADDR},
-};
-
-int board_mmc_init(bd_t *bis)
-{
- int ret;
- u32 index = 0;
-
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
-
- usdhc_cfg[0].max_bus_width = 8;
- usdhc_cfg[1].max_bus_width = 4;
-
- for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
- switch (index) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- break;
- default:
- printf("Warning: you configured more USDHC controllers"
- "(%d) then supported by the board (%d)\n",
- index + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-
-static void leds_on(void)
-{
- /* turn on all possible leds connected via GPIO expander */
- i2c_set_bus_num(2);
- pca953x_set_dir(CONFIG_SYS_I2C_PCA953X_ADDR, 0xffff, PCA953X_DIR_OUT);
- pca953x_set_val(CONFIG_SYS_I2C_PCA953X_ADDR, 0xffff, 0x0);
-}
-
-static void backlight_lcd_off(void)
-{
- unsigned gpio = IMX_GPIO_NR(2, 0);
- gpio_direction_output(gpio, 0);
-
- gpio = IMX_GPIO_NR(2, 3);
- gpio_direction_output(gpio, 0);
-}
-
-int board_eth_init(bd_t *bis)
-{
- uint32_t base = IMX_FEC_BASE;
- struct mii_dev *bus = NULL;
- struct phy_device *phydev = NULL;
- int ret;
-
- setup_iomux_enet();
-
- bus = fec_get_miibus(base, -1);
- if (!bus)
- return -EINVAL;
-
- /* scan phy 0 and 5 */
- phydev = phy_find_by_mask(bus, 0x21, PHY_INTERFACE_MODE_RGMII);
- if (!phydev) {
- ret = -EINVAL;
- goto free_bus;
- }
-
- /* depending on the phy address we can detect our board version */
- if (phydev->addr == 0)
- env_set("boardver", "");
- else
- env_set("boardver", "mr");
-
- printf("using phy at %d\n", phydev->addr);
- ret = fec_probe(bis, -1, base, bus, phydev);
- if (ret)
- goto free_phydev;
-
- return 0;
-
-free_phydev:
- free(phydev);
-free_bus:
- free(bus);
- return ret;
-}
-
-int board_init(void)
-{
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- backlight_lcd_off();
-
- leds_on();
-
-#ifdef CONFIG_SATA
- setup_sata();
-#endif
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: "CONFIG_SYS_BOARD"\n");
- return 0;
-}
-
-#ifdef CONFIG_CMD_BMODE
-static const struct boot_mode board_boot_modes[] = {
- /* 4 bit bus width */
- {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-int misc_init_r(void)
-{
-#ifdef CONFIG_CMD_BMODE
- add_board_boot_modes(board_boot_modes);
-#endif
- return 0;
-}
diff --git a/board/bachmann/ot1200/ot1200_spl.c b/board/bachmann/ot1200/ot1200_spl.c
deleted file mode 100644
index 7fbd6f2c5d..0000000000
--- a/board/bachmann/ot1200/ot1200_spl.c
+++ /dev/null
@@ -1,152 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015, Bachmann electronic GmbH
- */
-
-#include <common.h>
-#include <init.h>
-#include <spl.h>
-#include <asm/arch/mx6-ddr.h>
-
-/* Configure MX6Q/DUAL mmdc DDR io registers */
-static struct mx6dq_iomux_ddr_regs ot1200_ddr_ioregs = {
- /* SDCLK[0:1], CAS, RAS, Reset: Differential input, 48ohm */
- .dram_sdclk_0 = 0x00000028,
- .dram_sdclk_1 = 0x00000028,
- .dram_cas = 0x00000028,
- .dram_ras = 0x00000028,
- .dram_reset = 0x00000028,
- /* SDCKE[0:1]: 100k pull-up */
- .dram_sdcke0 = 0x00003000,
- .dram_sdcke1 = 0x00003000,
- /* SDBA2: pull-up disabled */
- .dram_sdba2 = 0x00000000,
- /* SDODT[0:1]: 100k pull-up, 48 ohm */
- .dram_sdodt0 = 0x00000028,
- .dram_sdodt1 = 0x00000028,
- /* SDQS[0:7]: Differential input, 48 ohm */
- .dram_sdqs0 = 0x00000028,
- .dram_sdqs1 = 0x00000028,
- .dram_sdqs2 = 0x00000028,
- .dram_sdqs3 = 0x00000028,
- .dram_sdqs4 = 0x00000028,
- .dram_sdqs5 = 0x00000028,
- .dram_sdqs6 = 0x00000028,
- .dram_sdqs7 = 0x00000028,
- /* DQM[0:7]: Differential input, 48 ohm */
- .dram_dqm0 = 0x00000028,
- .dram_dqm1 = 0x00000028,
- .dram_dqm2 = 0x00000028,
- .dram_dqm3 = 0x00000028,
- .dram_dqm4 = 0x00000028,
- .dram_dqm5 = 0x00000028,
- .dram_dqm6 = 0x00000028,
- .dram_dqm7 = 0x00000028,
-};
-
-/* Configure MX6Q/DUAL mmdc GRP io registers */
-static struct mx6dq_iomux_grp_regs ot1200_grp_ioregs = {
- /* DDR3 */
- .grp_ddr_type = 0x000c0000,
- .grp_ddrmode_ctl = 0x00020000,
- /* Disable DDR pullups */
- .grp_ddrpke = 0x00000000,
- /* ADDR[00:16], SDBA[0:1]: 48 ohm */
- .grp_addds = 0x00000028,
- /* CS0/CS1/SDBA2/CKE0/CKE1/SDWE: 48 ohm */
- .grp_ctlds = 0x00000028,
- /* DATA[00:63]: Differential input, 48 ohm */
- .grp_ddrmode = 0x00020000,
- .grp_b0ds = 0x00000028,
- .grp_b1ds = 0x00000028,
- .grp_b2ds = 0x00000028,
- .grp_b3ds = 0x00000028,
- .grp_b4ds = 0x00000028,
- .grp_b5ds = 0x00000028,
- .grp_b6ds = 0x00000028,
- .grp_b7ds = 0x00000028,
-};
-
-static struct mx6_ddr_sysinfo ot1200_ddr_sysinfo = {
- /* Width of data bus: 0=16, 1=32, 2=64 */
- .dsize = 2,
- /* config for full 4GB range so that get_mem_size() works */
- .cs_density = 32, /* 32Gb per CS */
- /* Single chip select */
- .ncs = 1,
- .cs1_mirror = 0, /* war 0 */
- .rtt_wr = 1, /* DDR3_RTT_60_OHM - RTT_Wr = RZQ/4 */
- .rtt_nom = 1, /* DDR3_RTT_60_OHM - RTT_Nom = RZQ/4 */
- .walat = 1, /* Write additional latency */
- .ralat = 5, /* Read additional latency */
- .mif3_mode = 3, /* Command prediction working mode */
- .bi_on = 1, /* Bank interleaving enabled */ /* war 1 */
- .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
- .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
- .refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
-};
-
-/* MT41K128M16JT-125 */
-static struct mx6_ddr3_cfg micron_2gib_1600 = {
- .mem_speed = 1600,
- .density = 2,
- .width = 16,
- .banks = 8,
- .rowaddr = 14,
- .coladdr = 10,
- .pagesz = 2,
- .trcd = 1375,
- .trcmin = 4875,
- .trasmin = 3500,
- .SRT = 1,
-};
-
-static struct mx6_mmdc_calibration micron_2gib_1600_mmdc_calib = {
- /* write leveling calibration determine */
- .p0_mpwldectrl0 = 0x00260025,
- .p0_mpwldectrl1 = 0x00270021,
- .p1_mpwldectrl0 = 0x00180034,
- .p1_mpwldectrl1 = 0x00180024,
- /* Read DQS Gating calibration */
- .p0_mpdgctrl0 = 0x04380344,
- .p0_mpdgctrl1 = 0x0330032C,
- .p1_mpdgctrl0 = 0x0338033C,
- .p1_mpdgctrl1 = 0x032C0300,
- /* Read Calibration: DQS delay relative to DQ read access */
- .p0_mprddlctl = 0x3C2E3238,
- .p1_mprddlctl = 0x3A2E303C,
- /* Write Calibration: DQ/DM delay relative to DQS write access */
- .p0_mpwrdlctl = 0x36384036,
- .p1_mpwrdlctl = 0x442E4438,
-};
-
-static void ot1200_spl_dram_init(void)
-{
- mx6dq_dram_iocfg(64, &ot1200_ddr_ioregs, &ot1200_grp_ioregs);
- mx6_dram_cfg(&ot1200_ddr_sysinfo, µn_2gib_1600_mmdc_calib,
- µn_2gib_1600);
-}
-
-/*
- * called from C runtime startup code (arch/arm/lib/crt0.S:_main)
- * - we have a stack and a place to store GD, both in SRAM
- * - no variable global data is available
- */
-void board_init_f(ulong dummy)
-{
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
-
- /* iomux and setup of i2c */
- board_early_init_f();
-
- /* setup GP timer */
- timer_init();
-
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
-
- /* configure MMDC for SDRAM width/size and per-model calibration */
- ot1200_spl_dram_init();
-}
diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig
deleted file mode 100644
index 45b9f2d41c..0000000000
--- a/configs/ot1200_defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_OFFSET=0x100000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_TARGET_OT1200=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q"
-CONFIG_BOOTDELAY=3
-CONFIG_USE_PREBOOT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_MISC_INIT_R=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_DWC_AHSATA=y
-CONFIG_CMD_PCA953X=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_BUS=2
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=25000000
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SMSC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig
deleted file mode 100644
index 9472d29408..0000000000
--- a/configs/ot1200_spl_defconfig
+++ /dev/null
@@ -1,66 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_OFFSET=0x100000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
-CONFIG_TARGET_OT1200=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_TEXT_BASE=0x00908000
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
-CONFIG_BOOTDELAY=3
-CONFIG_USE_PREBOOT=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_MISC_INIT_R=y
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DM=y
-CONFIG_DWC_AHSATA=y
-CONFIG_CMD_PCA953X=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_BUS=2
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=25000000
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SMSC=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_DM_THERMAL=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
deleted file mode 100644
index 3a1ea0fc10..0000000000
--- a/include/configs/ot1200.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
- * Copyright (C) 2014 Bachmann electronic GmbH
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include "mx6_common.h"
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-
-/* UART Configs */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/* SF Configs */
-
-/* IO expander */
-#define CONFIG_PCA953X
-#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
-#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_I2C_SPEED 100000
-
-/* OCOTP Configs */
-#define CONFIG_IMX_OTP
-#define IMX_OTP_BASE OCOTP_BASE_ADDR
-#define IMX_OTP_ADDR_MAX 0x7F
-#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
-#define IMX_OTPWRITE_ENABLED
-
-/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_USDHC_NUM 2
-
-/* USB Configs */
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-
-/*
- * SATA Configs
- */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_SYS_SATA_MAX_DEVICE 1
-#define CONFIG_DWC_AHSATA_PORT_ID 0
-#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
-#define CONFIG_LBA48
-#endif
-
-/* SPL */
-#ifdef CONFIG_SPL
-#include "imx6_spl.h"
-#endif
-
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE MII100
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 0x5
-
-#ifndef CONFIG_SPL
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_BUS 1
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
-#endif
-
-/* Thermal support */
-#define CONFIG_IMX_THERMAL
-
-/* Physical Memory Map */
-#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* Environment organization */
-/* M25P16 has an erase size of 64 KiB */
-
-#define CONFIG_BOOTP_SERVERIP
-#define CONFIG_BOOTP_BOOTFILE
-
-#endif /* __CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 13/16] arm: Remove dms-ba16 board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (11 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 12/16] arm: Remove ot1200 board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 13:01 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 14/16] arm: Remove configs/mx35pdk_defconfig board Jagan Teki
` (3 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Patch-cc: Akshay Bhat <akshaybhat@timesys.com>
Patch-cc: Ken Lin <Ken.Lin@advantech.com.tw>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx6/Kconfig | 7 -
board/advantech/dms-ba16/Kconfig | 31 --
board/advantech/dms-ba16/MAINTAINERS | 8 -
board/advantech/dms-ba16/Makefile | 6 -
board/advantech/dms-ba16/clocks.cfg | 25 -
board/advantech/dms-ba16/ddr-setup.cfg | 39 --
board/advantech/dms-ba16/dms-ba16.c | 629 -----------------------
board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 -
board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 -
board/advantech/dms-ba16/micron-1g.cfg | 63 ---
board/advantech/dms-ba16/samsung-2g.cfg | 63 ---
configs/dms-ba16-1g_defconfig | 64 ---
configs/dms-ba16_defconfig | 63 ---
include/configs/advantech_dms-ba16.h | 233 ---------
14 files changed, 1279 deletions(-)
delete mode 100644 board/advantech/dms-ba16/Kconfig
delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
delete mode 100644 board/advantech/dms-ba16/Makefile
delete mode 100644 board/advantech/dms-ba16/clocks.cfg
delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
delete mode 100644 configs/dms-ba16-1g_defconfig
delete mode 100644 configs/dms-ba16_defconfig
delete mode 100644 include/configs/advantech_dms-ba16.h
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index de5753333b..ba274cc688 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -108,12 +108,6 @@ choice
prompt "MX6 board select"
optional
-config TARGET_ADVANTECH_DMS_BA16
- bool "Advantech dms-ba16"
- select BOARD_LATE_INIT
- select MX6Q
- imply CMD_SATA
-
config TARGET_APALIS_IMX6
bool "Toradex Apalis iMX6 board"
select BOARD_LATE_INIT
@@ -641,7 +635,6 @@ config SYS_SOC
default "mx6"
source "board/ge/bx50v3/Kconfig"
-source "board/advantech/dms-ba16/Kconfig"
source "board/aristainetos/Kconfig"
source "board/armadeus/opos6uldev/Kconfig"
source "board/barco/platinum/Kconfig"
diff --git a/board/advantech/dms-ba16/Kconfig b/board/advantech/dms-ba16/Kconfig
deleted file mode 100644
index 040eb866b5..0000000000
--- a/board/advantech/dms-ba16/Kconfig
+++ /dev/null
@@ -1,31 +0,0 @@
-if TARGET_ADVANTECH_DMS_BA16
-
-choice
- prompt "DDR Size"
- default SYS_DDR_2G
-
-config SYS_DDR_1G
- bool "1GiB"
-
-config SYS_DDR_2G
- bool "2GiB"
-
-endchoice
-
-config IMX_CONFIG
- default "board/advantech/dms-ba16/dms-ba16_2g.cfg" if SYS_DDR_2G
- default "board/advantech/dms-ba16/dms-ba16_1g.cfg" if SYS_DDR_1G
-
-config SYS_BOARD
- default "dms-ba16"
-
-config SYS_VENDOR
- default "advantech"
-
-config SYS_SOC
- default "mx6"
-
-config SYS_CONFIG_NAME
- default "advantech_dms-ba16"
-
-endif
diff --git a/board/advantech/dms-ba16/MAINTAINERS b/board/advantech/dms-ba16/MAINTAINERS
deleted file mode 100644
index e8ea3dd7b3..0000000000
--- a/board/advantech/dms-ba16/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-ADVANTECH_DMS-BA16 BOARD
-M: Akshay Bhat <akshaybhat@timesys.com>
-M: Ken Lin <Ken.Lin@advantech.com.tw>
-S: Maintained
-F: board/advantech/dms-ba16/
-F: include/configs/advantech_dms-ba16.h
-F: configs/dms-ba16_defconfig
-F: configs/dms-ba16-1g_defconfig
diff --git a/board/advantech/dms-ba16/Makefile b/board/advantech/dms-ba16/Makefile
deleted file mode 100644
index b87fc29f06..0000000000
--- a/board/advantech/dms-ba16/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright 2016 Timesys Corporation
-# Copyright 2016 Advantech Corporation
-
-obj-y := dms-ba16.o
diff --git a/board/advantech/dms-ba16/clocks.cfg b/board/advantech/dms-ba16/clocks.cfg
deleted file mode 100644
index abc769c4e5..0000000000
--- a/board/advantech/dms-ba16/clocks.cfg
+++ /dev/null
@@ -1,25 +0,0 @@
-/* set the default clock gate to save power */
-DATA 4, CCM_CCGR0, 0x00C03F3F
-DATA 4, CCM_CCGR1, 0x0030FC03
-DATA 4, CCM_CCGR2, 0x0FFFC000
-DATA 4, CCM_CCGR3, 0x3FF00000
-DATA 4, CCM_CCGR4, 0x00FFF300
-DATA 4, CCM_CCGR5, 0x0F0000C3
-DATA 4, CCM_CCGR6, 0x000003FF
-
-/* enable AXI cache for VDOA/VPU/IPU */
-DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
-DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
-
-/*
- * Setup CCM_CCOSR register as follows:
- *
- * cko1_en 1 --> CKO1 enabled
- * cko1_div 111 --> divide by 8
- * cko1_sel 1011 --> ahb_clk_root
- *
- * This sets CKO1 at ahb_clk_root/8 132/8 16.5 MHz
- */
-DATA 4, CCM_CCOSR, 0x000000fb
diff --git a/board/advantech/dms-ba16/ddr-setup.cfg b/board/advantech/dms-ba16/ddr-setup.cfg
deleted file mode 100644
index 4c43e648f7..0000000000
--- a/board/advantech/dms-ba16/ddr-setup.cfg
+++ /dev/null
@@ -1,39 +0,0 @@
-/* DDR IO */
-DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000c0000
-DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
-DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000030
-DATA 4, MX6_IOM_DRAM_CAS, 0x00000030
-DATA 4, MX6_IOM_DRAM_RAS, 0x00000030
-DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
-DATA 4, MX6_IOM_DRAM_RESET, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
-DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDODT1, 0x00000030
-DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
-DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
-DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030
-DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030
-DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
-DATA 4, MX6_IOM_GRP_B0DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B1DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B2DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B3DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B4DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B5DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B6DS, 0x00000030
-DATA 4, MX6_IOM_GRP_B7DS, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM0, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM1, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM2, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM3, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM4, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM5, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM6, 0x00000030
-DATA 4, MX6_IOM_DRAM_DQM7, 0x00000030
diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
deleted file mode 100644
index 28e505e6c5..0000000000
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ /dev/null
@@ -1,629 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Timesys Corporation
- * Copyright 2016 Advantech Corporation
- * Copyright 2012 Freescale Semiconductor, Inc.
- */
-
-#include <init.h>
-#include <net.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux.h>
-#include <asm/arch/mx6-pins.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/gpio.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/video.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-#include <i2c.h>
-#include <input.h>
-#include <pwm.h>
-DECLARE_GLOBAL_DATA_PTR;
-
-#define NC_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_HYS)
-
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
- PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST)
-
-#define ENET_CLK_PAD_CTRL (PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_120ohm | PAD_CTL_SRE_FAST)
-
-#define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
- PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_FAST)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
-
- return 0;
-}
-
-static iomux_v3_cfg_t const uart3_pads[] = {
- MX6_PAD_EIM_D31__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const uart4_pads[] = {
- MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
- /* AR8033 PHY Reset */
- MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-
- /* Reset AR8033 PHY */
- gpio_direction_output(IMX_GPIO_NR(1, 28), 0);
- mdelay(10);
- gpio_set_value(IMX_GPIO_NR(1, 28), 1);
- mdelay(1);
-}
-
-static iomux_v3_cfg_t const usdhc2_pads[] = {
- MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
- MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
- MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const ecspi1_pads[] = {
- MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | I2C_PAD,
- .gp = IMX_GPIO_NR(5, 27)
- },
- .sda = {
- .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | I2C_PAD,
- .gp = IMX_GPIO_NR(5, 26)
- }
-};
-
-static struct i2c_pads_info i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
- .gp = IMX_GPIO_NR(4, 13)
- }
-};
-
-static struct i2c_pads_info i2c_pad_info3 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | I2C_PAD,
- .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | I2C_PAD,
- .gp = IMX_GPIO_NR(1, 3)
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | I2C_PAD,
- .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | I2C_PAD,
- .gp = IMX_GPIO_NR(1, 6)
- }
-};
-
-#ifdef CONFIG_MXC_SPI
-int board_spi_cs_gpio(unsigned bus, unsigned cs)
-{
- return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1;
-}
-
-static void setup_spi(void)
-{
- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-}
-#endif
-
-static iomux_v3_cfg_t const pcie_pads[] = {
- MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void setup_pcie(void)
-{
- imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads));
-}
-
-static void setup_iomux_uart(void)
-{
- imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
- imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
-}
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-struct fsl_esdhc_cfg usdhc_cfg[3] = {
- {USDHC2_BASE_ADDR},
- {USDHC3_BASE_ADDR},
- {USDHC4_BASE_ADDR},
-};
-
-#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
-#define USDHC4_CD_GPIO IMX_GPIO_NR(6, 11)
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
- int ret = 0;
-
- switch (cfg->esdhc_base) {
- case USDHC2_BASE_ADDR:
- ret = !gpio_get_value(USDHC2_CD_GPIO);
- break;
- case USDHC3_BASE_ADDR:
- ret = 1; /* eMMC is always present */
- break;
- case USDHC4_BASE_ADDR:
- ret = !gpio_get_value(USDHC4_CD_GPIO);
- break;
- }
-
- return ret;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- int ret;
- int i;
-
- for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
- switch (i) {
- case 0:
- imx_iomux_v3_setup_multiple_pads(
- usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
- gpio_direction_input(USDHC2_CD_GPIO);
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
- break;
- case 1:
- imx_iomux_v3_setup_multiple_pads(
- usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
- usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- break;
- case 2:
- imx_iomux_v3_setup_multiple_pads(
- usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
- gpio_direction_input(USDHC4_CD_GPIO);
- usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
- break;
- default:
- printf("Warning: you configured more USDHC controllers\n"
- "(%d) then supported by the board (%d)\n",
- i + 1, CONFIG_SYS_FSL_USDHC_NUM);
- return -EINVAL;
- }
-
- ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
- if (ret)
- return ret;
- }
-
- return 0;
-}
-#endif
-
-static int mx6_rgmii_rework(struct phy_device *phydev)
-{
- /* set device address 0x7 */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
- /* offset 0x8016: CLK_25M Clock Select */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
- /* enable register write, no post increment, address 0x7 */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
- /* set to 125 MHz from local PLL source */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x18);
- /* set debug port address: SerDes Test and System Mode Control */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
- /* enable rgmii tx clock delay */
- /* set the reserved bits to avoid board specific voltage peak issue*/
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
-
- return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
- mx6_rgmii_rework(phydev);
-
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
-
-#if defined(CONFIG_VIDEO_IPUV3)
-static iomux_v3_cfg_t const backlight_pads[] = {
- /* Power for LVDS Display */
- MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#define LVDS_POWER_GP IMX_GPIO_NR(3, 22)
- /* Backlight enable for LVDS display */
- MX6_PAD_GPIO_0__GPIO1_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 0)
- /* backlight PWM brightness control */
- MX6_PAD_SD1_DAT3__PWM1_OUT | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static void do_enable_hdmi(struct display_info_t const *dev)
-{
- imx_enable_hdmi_phy();
-}
-
-int board_cfb_skip(void)
-{
- gpio_direction_output(LVDS_POWER_GP, 1);
-
- return 0;
-}
-
-static int detect_baseboard(struct display_info_t const *dev)
-{
- return 0 == dev->addr;
-}
-
-struct display_info_t const displays[] = {{
- .bus = -1,
- .addr = 0,
- .pixfmt = IPU_PIX_FMT_RGB24,
- .detect = detect_baseboard,
- .enable = NULL,
- .mode = {
- .name = "SHARP-LQ156M1LG21",
- .refresh = 60,
- .xres = 1920,
- .yres = 1080,
- .pixclock = 7851,
- .left_margin = 100,
- .right_margin = 40,
- .upper_margin = 30,
- .lower_margin = 3,
- .hsync_len = 10,
- .vsync_len = 2,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
-} }, {
- .bus = -1,
- .addr = 3,
- .pixfmt = IPU_PIX_FMT_RGB24,
- .detect = detect_hdmi,
- .enable = do_enable_hdmi,
- .mode = {
- .name = "HDMI",
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 220,
- .right_margin = 40,
- .upper_margin = 21,
- .lower_margin = 7,
- .hsync_len = 60,
- .vsync_len = 10,
- .sync = FB_SYNC_EXT,
- .vmode = FB_VMODE_NONINTERLACED
-} } };
-size_t display_count = ARRAY_SIZE(displays);
-
-static void setup_display(void)
-{
- struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
- clrbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
-
- imx_setup_hdmi();
-
- /* Set LDB_DI0 as clock source for IPU_DI0 */
- clrsetbits_le32(&mxc_ccm->chsccdr,
- MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK,
- (CHSCCDR_CLK_SEL_LDB_DI0 <<
- MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET));
-
- /* Turn on IPU LDB DI0 clocks */
- setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
-
- enable_ipu_clock();
-
- writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
- IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH |
- IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
- IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
- IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT |
- IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
- IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT |
- IOMUXC_GPR2_SPLIT_MODE_EN_MASK |
- IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 |
- IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0,
- &iomux->gpr[2]);
-
- clrsetbits_le32(&iomux->gpr[3],
- IOMUXC_GPR3_LVDS0_MUX_CTL_MASK |
- IOMUXC_GPR3_LVDS1_MUX_CTL_MASK |
- IOMUXC_GPR3_HDMI_MUX_CTL_MASK,
- (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
- IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET));
-
- /* backlights off until needed */
- imx_iomux_v3_setup_multiple_pads(backlight_pads,
- ARRAY_SIZE(backlight_pads));
-
- gpio_direction_input(LVDS_POWER_GP);
- gpio_direction_input(LVDS_BACKLIGHT_GP);
-}
-#endif /* CONFIG_VIDEO_IPUV3 */
-
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
-{
- return 1;
-}
-
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
- setup_pcie();
-
- return cpu_eth_init(bis);
-}
-
-static iomux_v3_cfg_t const misc_pads[] = {
- MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NC_PAD_CTRL),
- MX6_PAD_EIM_CS0__GPIO2_IO23 | MUX_PAD_CTRL(NC_PAD_CTRL),
- MX6_PAD_EIM_CS1__GPIO2_IO24 | MUX_PAD_CTRL(NC_PAD_CTRL),
- MX6_PAD_EIM_OE__GPIO2_IO25 | MUX_PAD_CTRL(NC_PAD_CTRL),
- MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NC_PAD_CTRL),
- MX6_PAD_GPIO_1__GPIO1_IO01 | MUX_PAD_CTRL(NC_PAD_CTRL),
-};
-#define SUS_S3_OUT IMX_GPIO_NR(4, 11)
-#define WIFI_EN IMX_GPIO_NR(6, 14)
-
-int setup_ba16_sata(void)
-{
- struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
- int ret;
-
- ret = enable_sata_clock();
- if (ret)
- return ret;
-
- clrsetbits_le32(&iomuxc_regs->gpr[13],
- IOMUXC_GPR13_SATA_MASK,
- IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
- |IOMUXC_GPR13_SATA_PHY_7_SATA2M
- |IOMUXC_GPR13_SATA_SPEED_3G
- |(1<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
- |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
- |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16
- |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB
- |IOMUXC_GPR13_SATA_PHY_2_TX_1P133V
- |IOMUXC_GPR13_SATA_PHY_1_SLOW);
-
- return 0;
-}
-
-int board_early_init_f(void)
-{
- imx_iomux_v3_setup_multiple_pads(misc_pads,
- ARRAY_SIZE(misc_pads));
-
- setup_iomux_uart();
-
-#if defined(CONFIG_VIDEO_IPUV3)
- /* Set LDB clock to PLL2 PFD0 */
- select_ldb_di_clock_source(MXC_PLL2_PFD0_CLK);
-#endif
- return 0;
-}
-
-int board_init(void)
-{
- gpio_direction_output(SUS_S3_OUT, 1);
- gpio_direction_output(WIFI_EN, 1);
-#if defined(CONFIG_VIDEO_IPUV3)
- setup_display();
-#endif
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
-#ifdef CONFIG_MXC_SPI
- setup_spi();
-#endif
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
- setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_BMODE
-static const struct boot_mode board_boot_modes[] = {
- /* 4 bit bus width */
- {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
- {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
- {NULL, 0},
-};
-#endif
-
-void pmic_init(void)
-{
-
-#define DA9063_ADDR 0x58
-#define BCORE2_CONF 0x9D
-#define BCORE1_CONF 0x9E
-#define BPRO_CONF 0x9F
-#define BIO_CONF 0xA0
-#define BMEM_CONF 0xA1
-#define BPERI_CONF 0xA2
-#define MODE_BIT_H 7
-#define MODE_BIT_L 6
-
- uchar val;
- i2c_set_bus_num(2);
-
- i2c_read(DA9063_ADDR, BCORE2_CONF, 1, &val, 1);
- val |= (1 << MODE_BIT_H);
- val &= ~(1 << MODE_BIT_L);
- i2c_write(DA9063_ADDR, BCORE2_CONF , 1, &val, 1);
-
- i2c_read(DA9063_ADDR, BCORE1_CONF, 1, &val, 1);
- val |= (1 << MODE_BIT_H);
- val &= ~(1 << MODE_BIT_L);
- i2c_write(DA9063_ADDR, BCORE1_CONF , 1, &val, 1);
-
- i2c_read(DA9063_ADDR, BPRO_CONF, 1, &val, 1);
- val |= (1 << MODE_BIT_H);
- val &= ~(1 << MODE_BIT_L);
- i2c_write(DA9063_ADDR, BPRO_CONF , 1, &val, 1);
-
- i2c_read(DA9063_ADDR, BIO_CONF, 1, &val, 1);
- val |= (1 << MODE_BIT_H);
- val &= ~(1 << MODE_BIT_L);
- i2c_write(DA9063_ADDR, BIO_CONF , 1, &val, 1);
-
- i2c_read(DA9063_ADDR, BMEM_CONF, 1, &val, 1);
- val |= (1 << MODE_BIT_H);
- val &= ~(1 << MODE_BIT_L);
- i2c_write(DA9063_ADDR, BMEM_CONF , 1, &val, 1);
-
- i2c_read(DA9063_ADDR, BPERI_CONF, 1, &val, 1);
- val |= (1 << MODE_BIT_H);
- val &= ~(1 << MODE_BIT_L);
- i2c_write(DA9063_ADDR, BPERI_CONF , 1, &val, 1);
-
-}
-
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_BMODE
- add_board_boot_modes(board_boot_modes);
-#endif
-
-#if defined(CONFIG_VIDEO_IPUV3)
- /*
- * We need@least 200ms between power on and backlight on
- * as per specifications from CHI MEI
- */
- mdelay(250);
-
- /* enable backlight PWM 1 */
- pwm_init(0, 0, 0);
-
- /* duty cycle 5000000ns, period: 5000000ns */
- pwm_config(0, 5000000, 5000000);
-
- /* Backlight Power */
- gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
-
- pwm_enable(0);
-#endif
-
-#ifdef CONFIG_SATA
- setup_ba16_sata();
-#endif
-
- /* board specific pmic init */
- pmic_init();
-
- return 0;
-}
-
-int checkboard(void)
-{
- printf("BOARD: %s\n", CONFIG_BOARD_NAME);
- return 0;
-}
diff --git a/board/advantech/dms-ba16/dms-ba16_1g.cfg b/board/advantech/dms-ba16/dms-ba16_1g.cfg
deleted file mode 100644
index 1c737baaf2..0000000000
--- a/board/advantech/dms-ba16/dms-ba16_1g.cfg
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- *
- * Copyright 2015 Timesys Corporation.
- * Copyright 2015 General Electric Company
- *
- * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-IMAGE_VERSION 2
-BOOT_FROM sd
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "micron-1g.cfg"
-#include "clocks.cfg"
diff --git a/board/advantech/dms-ba16/dms-ba16_2g.cfg b/board/advantech/dms-ba16/dms-ba16_2g.cfg
deleted file mode 100644
index 371a84eb7e..0000000000
--- a/board/advantech/dms-ba16/dms-ba16_2g.cfg
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- *
- * Copyright 2015 Timesys Corporation.
- * Copyright 2015 General Electric Company
- *
- * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
- * and create imximage boot image
- *
- * The syntax is taken as close as possible with the kwbimage
- */
-
-IMAGE_VERSION 2
-BOOT_FROM sd
-
-#define __ASSEMBLY__
-#include <config.h>
-#include "asm/arch/mx6-ddr.h"
-#include "asm/arch/iomux.h"
-#include "asm/arch/crm_regs.h"
-
-#include "ddr-setup.cfg"
-#include "samsung-2g.cfg"
-#include "clocks.cfg"
diff --git a/board/advantech/dms-ba16/micron-1g.cfg b/board/advantech/dms-ba16/micron-1g.cfg
deleted file mode 100644
index 8cfefe28e2..0000000000
--- a/board/advantech/dms-ba16/micron-1g.cfg
+++ /dev/null
@@ -1,63 +0,0 @@
-/* Calibrations */
-/* ZQ */
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
-/* write leveling */
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F001F
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
-/* Read DQS Gating calibration */
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43480350
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x033C0340
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43480350
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03340314
-/* Read calibration */
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x382E2C32
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x38363044
-/* Write calibration */
-DATA 4 MX6_MMDC_P0_MPWRDLCTL, 0x3A38403A
-DATA 4 MX6_MMDC_P1_MPWRDLCTL, 0x4432483E
-/* read data bit delay */
-DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
-
-/* Complete calibration by forced measurment */
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-
-/* MMDC init */
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
-DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A79A5
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538E64
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01ff00db
-DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2
-DATA 4, MX6_MMDC_P0_MDOR, 0x005a1023
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
-DATA 4, MX6_MMDC_P0_MDCTL, 0x831a0000
-
-/* Initialize memory */
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x0408803a
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803b
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00048039
-DATA 4, MX6_MMDC_P0_MDSCR, 0x09408030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x09408038
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00033337
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00033337
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
diff --git a/board/advantech/dms-ba16/samsung-2g.cfg b/board/advantech/dms-ba16/samsung-2g.cfg
deleted file mode 100644
index 4166cc9c57..0000000000
--- a/board/advantech/dms-ba16/samsung-2g.cfg
+++ /dev/null
@@ -1,63 +0,0 @@
-/* Calibrations */
-/* ZQ */
-DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
-/* write leveling */
-DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F001F
-DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F
-DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
-/* Read DQS Gating calibration */
-DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x45380544
-DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x05280530
-DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4530053C
-DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x0530050C
-/* Read calibration */
-DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x36303032
-DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x38363042
-/* Write calibration */
-DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A3A423E
-DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4A38483E
-/* read data bit delay */
-DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
-DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
-DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
-
-/* Complete calibration by forced measurment */
-DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
-DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
-
-/* MMDC init */
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
-DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
-DATA 4, MX6_MMDC_P0_MDCFG0, 0x8A8F79A4
-DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538E64
-DATA 4, MX6_MMDC_P0_MDCFG2, 0x01ff00db
-DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
-DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2
-DATA 4, MX6_MMDC_P0_MDOR, 0x008F1023
-DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
-DATA 4, MX6_MMDC_P0_MDCTL, 0x841a0000
-
-/* Initialize memory */
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
-DATA 4, MX6_MMDC_P0_MDSCR, 0x0408803a
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
-DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803b
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00408031
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00408039
-DATA 4, MX6_MMDC_P0_MDSCR, 0x09408030
-DATA 4, MX6_MMDC_P0_MDSCR, 0x09408038
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
-DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048
-DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
-DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00011117
-DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00011117
-DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
-DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
-DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
deleted file mode 100644
index 0739527037..0000000000
--- a/configs/dms-ba16-1g_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_TARGET_ADVANTECH_DMS_BA16=y
-CONFIG_SYS_DDR_1G=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_BOOTDELAY=1
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DWC_AHSATA=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_MII=y
-CONFIG_PWM_IMX=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Advantech"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
deleted file mode 100644
index 03a2c59bad..0000000000
--- a/configs/dms-ba16_defconfig
+++ /dev/null
@@ -1,63 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_TARGET_ADVANTECH_DMS_BA16=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_BOOTDELAY=1
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="imx6q-dms-ba16.dtb"
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_DWC_AHSATA=y
-CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_USDHC=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_MODE=0
-CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_MII=y
-CONFIG_PWM_IMX=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Advantech"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0525
-CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_VIDEO_IPUV3=y
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h
deleted file mode 100644
index d44028d510..0000000000
--- a/include/configs/advantech_dms-ba16.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2016 Timesys Corporation
- * Copyright (C) 2016 Advantech Corporation
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
- */
-
-#ifndef __ADVANTECH_DMSBA16_CONFIG_H
-#define __ADVANTECH_DMSBA16_CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-#include <asm/mach-imx/gpio.h>
-
-#define CONFIG_BOARD_NAME "Advantech DMS-BA16"
-
-#define CONFIG_MXC_UART_BASE UART4_BASE
-#define CONSOLE_DEV "ttymxc3"
-#define CONFIG_EXTRA_BOOTARGS "panic=10"
-
-#define CONFIG_BOOT_DIR ""
-#define CONFIG_LOADCMD "fatload"
-#define CONFIG_RFSPART "2"
-
-#include "mx6_common.h"
-#include <linux/sizes.h>
-
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-
-#define CONFIG_MXC_UART
-
-/* SATA Configs */
-#define CONFIG_SYS_SATA_MAX_DEVICE 1
-#define CONFIG_DWC_AHSATA_PORT_ID 0
-#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
-#define CONFIG_LBA48
-
-/* MMC Configs */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-
-/* USB Configs */
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS 0
-
-#define CONFIG_USBD_HS
-
-/* Networking Configs */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
-#define CONFIG_ETHPRIME "FEC"
-#define CONFIG_FEC_MXC_PHYADDR 4
-
-/* Serial Flash */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_LOADADDR 0x12000000
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "script=boot.scr\0" \
- "image=" CONFIG_BOOT_DIR "/uImage\0" \
- "uboot=u-boot.imx\0" \
- "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
- "fdt_addr=0x18000000\0" \
- "boot_fdt=yes\0" \
- "ip_dyn=yes\0" \
- "console=" CONSOLE_DEV "\0" \
- "fdt_high=0xffffffff\0" \
- "initrd_high=0xffffffff\0" \
- "sddev=0\0" \
- "emmcdev=1\0" \
- "partnum=1\0" \
- "loadcmd=" CONFIG_LOADCMD "\0" \
- "rfspart=" CONFIG_RFSPART "\0" \
- "update_sd_firmware=" \
- "if test ${ip_dyn} = yes; then " \
- "setenv get_cmd dhcp; " \
- "else " \
- "setenv get_cmd tftp; " \
- "fi; " \
- "if mmc dev ${mmcdev}; then " \
- "if ${get_cmd} ${update_sd_firmware_filename}; then " \
- "setexpr fw_sz ${filesize} / 0x200; " \
- "setexpr fw_sz ${fw_sz} + 1; " \
- "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
- "fi; " \
- "fi\0" \
- "update_sf_uboot=" \
- "if tftp $loadaddr $uboot; then " \
- "sf probe; " \
- "sf erase 0 0xC0000; " \
- "sf write $loadaddr 0x400 $filesize; " \
- "echo 'U-Boot upgraded. Please reset'; " \
- "fi\0" \
- "setargs=setenv bootargs console=${console},${baudrate} " \
- "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
- "loadbootscript=" \
- "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
- "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
- " source\0" \
- "loadimage=" \
- "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
- "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
- "tryboot=" \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loadimage; then " \
- "run doboot; " \
- "fi; " \
- "fi;\0" \
- "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
- "run setargs; " \
- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
- "if run loadfdt; then " \
- "bootm ${loadaddr} - ${fdt_addr}; " \
- "else " \
- "if test ${boot_fdt} = try; then " \
- "bootm; " \
- "else " \
- "echo WARN: Cannot load the DT; " \
- "fi; " \
- "fi; " \
- "else " \
- "bootm; " \
- "fi;\0" \
- "netargs=setenv bootargs console=${console},${baudrate} " \
- "root=/dev/nfs " \
- "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
- "netboot=echo Booting from net ...; " \
- "run netargs; " \
- "if test ${ip_dyn} = yes; then " \
- "setenv get_cmd dhcp; " \
- "else " \
- "setenv get_cmd tftp; " \
- "fi; " \
- "${get_cmd} ${image}; " \
- "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
- "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
- "bootm ${loadaddr} - ${fdt_addr}; " \
- "else " \
- "if test ${boot_fdt} = try; then " \
- "bootm; " \
- "else " \
- "echo WARN: Cannot load the DT; " \
- "fi; " \
- "fi; " \
- "else " \
- "bootm; " \
- "fi;\0" \
-
-#define CONFIG_BOOTCOMMAND \
- "usb start; " \
- "setenv dev usb; " \
- "setenv devnum 0; " \
- "setenv rootdev sda${rfspart}; " \
- "run tryboot; " \
- \
- "setenv dev mmc; " \
- "setenv rootdev mmcblk0p${rfspart}; " \
- \
- "setenv devnum ${sddev}; " \
- "if mmc dev ${devnum}; then " \
- "run tryboot; " \
- "fi; " \
- \
- "setenv devnum ${emmcdev}; " \
- "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
- "if mmc dev ${devnum}; then " \
- "run tryboot; " \
- "fi; " \
- \
- "bmode usb; " \
-
-#define CONFIG_ARP_TIMEOUT 200UL
-
-/* Miscellaneous configurable options */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/* Physical Memory Map */
-#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
- (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* FLASH and environment organization */
-
-#define CONFIG_SYS_FSL_USDHC_NUM 3
-
-/* Framebuffer */
-#ifdef CONFIG_VIDEO
-#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_BMP_16BPP
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IMX_HDMI
-#define CONFIG_IMX_VIDEO_SKIP
-#endif
-
-#define CONFIG_IMX6_PWM_PER_CLK 66000000
-
-#ifdef CONFIG_CMD_PCI
-#define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_PCIE_IMX
-#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
-#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
-#endif
-
-/* I2C Configs */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_MXC_I2C1
-#define CONFIG_SYS_I2C_MXC_I2C2
-#define CONFIG_SYS_I2C_MXC_I2C3
-
-#endif /* __ADVANTECH_DMSBA16_CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 14/16] arm: Remove configs/mx35pdk_defconfig board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (12 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 13/16] arm: Remove dms-ba16 board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 13:02 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 15/16] arm: Remove flea3_defconfig board Jagan Teki
` (2 subsequent siblings)
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.
Remove it.
Patch-cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/Kconfig | 6 -
board/freescale/mx35pdk/Kconfig | 15 --
board/freescale/mx35pdk/MAINTAINERS | 6 -
board/freescale/mx35pdk/Makefile | 8 -
board/freescale/mx35pdk/README | 114 ---------
board/freescale/mx35pdk/lowlevel_init.S | 239 -------------------
board/freescale/mx35pdk/mx35pdk.c | 293 ------------------------
board/freescale/mx35pdk/mx35pdk.h | 41 ----
configs/mx35pdk_defconfig | 52 -----
include/configs/mx35pdk.h | 210 -----------------
10 files changed, 984 deletions(-)
delete mode 100644 board/freescale/mx35pdk/Kconfig
delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
delete mode 100644 board/freescale/mx35pdk/Makefile
delete mode 100644 board/freescale/mx35pdk/README
delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
delete mode 100644 configs/mx35pdk_defconfig
delete mode 100644 include/configs/mx35pdk.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index edc9e38c6c..4895019dd8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -631,11 +631,6 @@ config TARGET_FLEA3
bool "Support flea3"
select CPU_ARM1136
-config TARGET_MX35PDK
- bool "Support mx35pdk"
- select BOARD_LATE_INIT
- select CPU_ARM1136
-
config ARCH_BCM283X
bool "Broadcom BCM283X family"
select DM
@@ -1897,7 +1892,6 @@ source "board/freescale/ls1012aqds/Kconfig"
source "board/freescale/ls1012ardb/Kconfig"
source "board/freescale/ls1012afrdm/Kconfig"
source "board/freescale/lx2160a/Kconfig"
-source "board/freescale/mx35pdk/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/grinn/chiliboard/Kconfig"
source "board/gumstix/pepper/Kconfig"
diff --git a/board/freescale/mx35pdk/Kconfig b/board/freescale/mx35pdk/Kconfig
deleted file mode 100644
index 021d19e551..0000000000
--- a/board/freescale/mx35pdk/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_MX35PDK
-
-config SYS_BOARD
- default "mx35pdk"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_SOC
- default "mx35"
-
-config SYS_CONFIG_NAME
- default "mx35pdk"
-
-endif
diff --git a/board/freescale/mx35pdk/MAINTAINERS b/board/freescale/mx35pdk/MAINTAINERS
deleted file mode 100644
index 540e943691..0000000000
--- a/board/freescale/mx35pdk/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MX35PDK BOARD
-M: Stefano Babic <sbabic@denx.de>
-S: Maintained
-F: board/freescale/mx35pdk/
-F: include/configs/mx35pdk.h
-F: configs/mx35pdk_defconfig
diff --git a/board/freescale/mx35pdk/Makefile b/board/freescale/mx35pdk/Makefile
deleted file mode 100644
index 6a60fad0cc..0000000000
--- a/board/freescale/mx35pdk/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
-
-obj-y := mx35pdk.o
-obj-y += lowlevel_init.o
diff --git a/board/freescale/mx35pdk/README b/board/freescale/mx35pdk/README
deleted file mode 100644
index 6f6841f099..0000000000
--- a/board/freescale/mx35pdk/README
+++ /dev/null
@@ -1,114 +0,0 @@
-Overview
---------------
-
-mx35pdk (known als as mx35_3stack) is a development board by Freescale.
-It consists of three pluggable board:
- - CPU module, with CPU, RAM, flash
- - Personality board, with most interfaces (USB, Network,..)
- - Debug board with JTAG header.
-
-The board is usually delivered with redboot. This howto explains how to boot
-a linux kernel and how to replace the original bootloader with U-Boot.
-
-The board is delivered with Redboot on the NAND flash. It is possible to
-switch the boot device with the switches SW1-SW2 on the Personality board,
-and with SW5-SW10 on the Debug board.
-
-Delivered Redboot script to start the kernel
----------------------------------------------------
-
-In redboot the following script is stored:
-
-fis load kernel
-exec -c "noinitrd console=ttymxc0,115200 root=/dev/mtdblock8 rw rootfstype=jffs2 ip=dhcp fec_mac=00:04:9F:00:E7:76"
-
-Kernel is taken from flash. The image is in zImage format.
-
-Booting from NET, rootfs on NFS:
------------------------------------
-
-To change the script in redboot:
-
-load -r -b 0x100000 <path_to_zImage>
-exec -c "noinitrd console=ttymxc0,115200 root=/dev/nfsroot rootfstype=nfsroot nfsroot=192.168.1.1:/opt/eldk-4.2-arm/armVFP rw ip=dhcp"
-
-If the ip address is not set, you can set it with :
-
-ip_address -l <board_ip/netmask> -h <server_ip>
-
-Linux partitions:
----------------------------
-
-As default, the board is shipped with these partition tables for NAND
-and for NOR:
-
-Creating 5 MTD partitions on "NAND 2GiB 3,3V 8-bit":
-0x00000000-0x00100000 : "nand.bootloader"
-0x00100000-0x00600000 : "nand.kernel"
-0x00600000-0x06600000 : "nand.rootfs"
-0x06600000-0x06e00000 : "nand.configure"
-0x06e00000-0x80000000 : "nand.userfs"
-
-Creating 6 MTD partitions on "mxc_nor_flash.0":
-0x00000000-0x00080000 : "Bootloader"
-0x00080000-0x00480000 : "nor.Kernel"
-0x00480000-0x02280000 : "nor.userfs"
-0x02280000-0x03e80000 : "nor.rootfs"
-0x01fe0000-0x01fe3000 : "FIS directory"
-0x01fff000-0x04000000 : "Redboot config"
-
-NAND partitions can be recognized enabling in kernel CONFIG_MTD_REDBOOT_PARTS.
-For this board, CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK should be set to 2.
-
-However, the setup in redboot is not correct and does not use the whole flash.
-
-Better solution is to use the kernel parameter mtdparts.
-Here the resulting script to be defined in RedBoot with fconfig:
-
-load -r -b 0x100000 sbabic/mx35pdk/zImage.2.6.37
-exec -c "noinitrd console=ttymxc0,115200 root=/dev/nfsroot rootfstype=nfsroot nfsroot=192.168.1.1:/opt/eldk-4.2-arm/arm rw ip=dhcp mtdparts=mxc_nand:1m(boot),5m(linux),96m(root),8m(cfg),1938m(user);physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
-
-Flashing U-Boot
---------------------------------
-
-U-Boot should be stored on the NOR flash.
-
-The boot storage can be select using the switches on the personality board
-(SW1-SW2) and on the DEBUG board (SW4-SW10).
-
-If something goes wrong flashing the bootloader, it is always possible to
-recover the board booting from the other device.
-
-Saving U-Boot in the NOR flash
----------------------------------
-
-Check the partition for boot in the NOR flash. Setting the mtdparts as reported,
-the boot partition should be /dev/mtd0.
-
-Creating 6 MTD partitions on "mxc_nor_flash.0":
-0x00000000-0x00080000 : "Bootloader"
-0x00080000-0x00480000 : "nor.Kernel"
-0x00480000-0x02280000 : "nor.userfs"
-0x02280000-0x03e80000 : "nor.rootfs"
-0x01fe0000-0x01fe3000 : "FIS directory"
-0x01fff000-0x04000000 : "Redboot config"
-
-To erase the whole partition:
-$ flash_eraseall /dev/mtd0
-
-Writing U-Boot:
-dd if=u-boot.bin of=/dev/mtd0
-
-To boot from NOR, you have to select the switches as follows:
-
-Personality board
- SW2 all off
- SW1 all off
-
-Debug Board:
- SW5 0
- SW6 0
- SW7 0
- SW8 1
- SW9 1
- SW10 0
diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S
deleted file mode 100644
index 5dae5597fb..0000000000
--- a/board/freescale/mx35pdk/lowlevel_init.S
+++ /dev/null
@@ -1,239 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- */
-
-#include <config.h>
-#include <asm/arch/imx-regs.h>
-#include <generated/asm-offsets.h>
-#include "mx35pdk.h"
-#include <asm/arch/lowlevel_macro.S>
-
-/*
- * return soc version
- * 0x10: TO1
- * 0x20: TO2
- * 0x30: TO3
- */
-.macro check_soc_version ret, tmp
- ldr \tmp, =IIM_BASE_ADDR
- ldr \ret, [\tmp, #IIM_SREV]
- cmp \ret, #0x00
- moveq \tmp, #ROMPATCH_REV
- ldreq \ret, [\tmp]
- moveq \ret, \ret, lsl #4
- addne \ret, \ret, #0x10
-.endm
-
-/* CPLD on CS5 setup */
-.macro init_debug_board
- ldr r0, =DBG_BASE_ADDR
- ldr r1, =DBG_CSCR_U_CONFIG
- str r1, [r0, #0x00]
- ldr r1, =DBG_CSCR_L_CONFIG
- str r1, [r0, #0x04]
- ldr r1, =DBG_CSCR_A_CONFIG
- str r1, [r0, #0x08]
-.endm
-
-/* clock setup */
-.macro init_clock
- ldr r0, =CCM_BASE_ADDR
-
- /* default CLKO to 1/32 of the ARM core*/
- ldr r1, [r0, #CLKCTL_COSR]
- bic r1, r1, #0x00000FF00
- bic r1, r1, #0x0000000FF
- mov r2, #0x00006C00
- add r2, r2, #0x67
- orr r1, r1, r2
- str r1, [r0, #CLKCTL_COSR]
-
- ldr r2, =CCM_CCMR_CONFIG
- str r2, [r0, #CLKCTL_CCMR]
-
- check_soc_version r1, r2
- cmp r1, #CHIP_REV_2_0
- ldrhs r3, =CCM_MPLL_532_HZ
- bhs 1f
- ldr r2, [r0, #CLKCTL_PDR0]
- tst r2, #CLKMODE_CONSUMER
- ldrne r3, =CCM_MPLL_532_HZ /* consumer path*/
- ldreq r3, =CCM_MPLL_399_HZ /* auto path*/
-1:
- str r3, [r0, #CLKCTL_MPCTL]
-
- ldr r1, =CCM_PPLL_300_HZ
- str r1, [r0, #CLKCTL_PPCTL]
-
- ldr r1, =CCM_PDR0_CONFIG
- bic r1, r1, #0x800000
- str r1, [r0, #CLKCTL_PDR0]
-
- ldr r1, [r0, #CLKCTL_CGR0]
- orr r1, r1, #0x0C300000
- str r1, [r0, #CLKCTL_CGR0]
-
- ldr r1, [r0, #CLKCTL_CGR1]
- orr r1, r1, #0x00000C00
- orr r1, r1, #0x00000003
- str r1, [r0, #CLKCTL_CGR1]
-
- ldr r1, [r0, #CLKCTL_CGR2]
- orr r1, r1, #0x00C00000
- str r1, [r0, #CLKCTL_CGR2]
-.endm
-
-.macro setup_sdram
- ldr r0, =ESDCTL_BASE_ADDR
- mov r3, #0x2000
- str r3, [r0, #0x0]
- str r3, [r0, #0x8]
-
- /*ip(r12) has used to save lr register in upper calling*/
- mov fp, lr
-
- mov r5, #0x00
- mov r2, #0x00
- mov r1, #CSD0_BASE_ADDR
- bl setup_sdram_bank
-
- mov r5, #0x00
- mov r2, #0x00
- mov r1, #CSD1_BASE_ADDR
- bl setup_sdram_bank
-
- mov lr, fp
-
-1:
- ldr r3, =ESDCTL_DELAY_LINE5
- str r3, [r0, #0x30]
-.endm
-
-.globl lowlevel_init
-lowlevel_init:
- mov r10, lr
-
- core_init
-
- init_aips
-
- init_max
-
- init_m3if
-
- init_clock
- init_debug_board
-
- cmp pc, #PHYS_SDRAM_1
- blo init_sdram_start
- cmp pc, #(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
- blo skip_sdram_setup
-
-init_sdram_start:
- /*init_sdram*/
- setup_sdram
-
-skip_sdram_setup:
- mov lr, r10
- mov pc, lr
-
-
-/*
- * r0: ESDCTL control base, r1: sdram slot base
- * r2: DDR type(0:DDR2, 1:MDDR) r3, r4:working base
- */
-setup_sdram_bank:
- mov r3, #0xE
- tst r2, #0x1
- orreq r3, r3, #0x300 /*DDR2*/
- str r3, [r0, #0x10]
- bic r3, r3, #0x00A
- str r3, [r0, #0x10]
- beq 2f
-
- mov r3, #0x20000
-1: subs r3, r3, #1
- bne 1b
-
-2: tst r2, #0x1
- ldreq r3, =ESDCTL_DDR2_CONFIG
- ldrne r3, =ESDCTL_MDDR_CONFIG
- cmp r1, #CSD1_BASE_ADDR
- strlo r3, [r0, #0x4]
- strhs r3, [r0, #0xC]
-
- ldr r3, =ESDCTL_0x92220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- ldr r4, =ESDCTL_PRECHARGE
- strb r3, [r1, r4]
-
- tst r2, #0x1
- bne skip_set_mode
-
- cmp r1, #CSD1_BASE_ADDR
- ldr r3, =ESDCTL_0xB2220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- ldr r4, =ESDCTL_DDR2_EMR2
- strb r3, [r1, r4]
- ldr r4, =ESDCTL_DDR2_EMR3
- strb r3, [r1, r4]
- ldr r4, =ESDCTL_DDR2_EN_DLL
- strb r3, [r1, r4]
- ldr r4, =ESDCTL_DDR2_RESET_DLL
- strb r3, [r1, r4]
-
- ldr r3, =ESDCTL_0x92220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- ldr r4, =ESDCTL_PRECHARGE
- strb r3, [r1, r4]
-
-skip_set_mode:
- cmp r1, #CSD1_BASE_ADDR
- ldr r3, =ESDCTL_0xA2220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- strb r3, [r1]
- strb r3, [r1]
-
- ldr r3, =ESDCTL_0xB2220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- tst r2, #0x1
- ldreq r4, =ESDCTL_DDR2_MR
- ldrne r4, =ESDCTL_MDDR_MR
- mov r3, #0xDA
- strb r3, [r1, r4]
- ldreq r4, =ESDCTL_DDR2_OCD_DEFAULT
- streqb r3, [r1, r4]
- ldreq r4, =ESDCTL_DDR2_EN_DLL
- ldrne r4, =ESDCTL_MDDR_EMR
- strb r3, [r1, r4]
-
- cmp r1, #CSD1_BASE_ADDR
- ldr r3, =ESDCTL_0x82228080
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
-
- tst r2, #0x1
- moveq r4, #0x20000
- movne r4, #0x200
-1: subs r4, r4, #1
- bne 1b
-
- str r3, [r1, #0x100]
- ldr r4, [r1, #0x100]
- cmp r3, r4
- movne r3, #1
- moveq r3, #0
-
- mov pc, lr
diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c
deleted file mode 100644
index 63fea37d5d..0000000000
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ /dev/null
@@ -1,293 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/io.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/iomux-mx35.h>
-#include <i2c.h>
-#include <power/pmic.h>
-#include <fsl_pmic.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <mc9sdz60.h>
-#include <mc13892.h>
-#include <linux/types.h>
-#include <asm/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include <netdev.h>
-#include <asm/mach-types.h>
-
-#ifndef CONFIG_BOARD_LATE_INIT
-#error "CONFIG_BOARD_LATE_INIT must be set for this board"
-#endif
-
-#ifndef CONFIG_BOARD_EARLY_INIT_F
-#error "CONFIG_BOARD_EARLY_INIT_F must be set for this board"
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int dram_init(void)
-{
- u32 size1, size2;
-
- size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
- size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
-
- gd->ram_size = size1 + size2;
-
- return 0;
-}
-
-int dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-
- return 0;
-}
-
-#define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_ODE)
-
-static void setup_iomux_i2c(void)
-{
- static const iomux_v3_cfg_t i2c1_pads[] = {
- NEW_PAD_CTRL(MX35_PAD_I2C1_CLK__I2C1_SCL, I2C_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_I2C1_DAT__I2C1_SDA, I2C_PAD_CTRL),
- };
-
- /* setup pins for I2C1 */
- imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
-}
-
-
-static void setup_iomux_spi(void)
-{
- static const iomux_v3_cfg_t spi_pads[] = {
- MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
- MX35_PAD_CSPI1_MISO__CSPI1_MISO,
- MX35_PAD_CSPI1_SS0__CSPI1_SS0,
- MX35_PAD_CSPI1_SS1__CSPI1_SS1,
- MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
- };
-
- imx_iomux_v3_setup_multiple_pads(spi_pads, ARRAY_SIZE(spi_pads));
-}
-
-#define USBOTG_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | \
- PAD_CTL_DSE_LOW | PAD_CTL_SRE_SLOW)
-#define USBOTG_OUT_PAD_CTRL (PAD_CTL_DSE_LOW | PAD_CTL_SRE_SLOW)
-
-static void setup_iomux_usbotg(void)
-{
- static const iomux_v3_cfg_t usbotg_pads[] = {
- NEW_PAD_CTRL(MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
- USBOTG_OUT_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
- USBOTG_IN_PAD_CTRL),
- };
-
- /* Set up pins for USBOTG. */
- imx_iomux_v3_setup_multiple_pads(usbotg_pads, ARRAY_SIZE(usbotg_pads));
-}
-
-#define FEC_PAD_CTRL (PAD_CTL_DSE_LOW | PAD_CTL_SRE_SLOW)
-
-static void setup_iomux_fec(void)
-{
- static const iomux_v3_cfg_t fec_pads[] = {
- NEW_PAD_CTRL(MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_RX_DV__FEC_RX_DV, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_COL__FEC_COL, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_RDATA0__FEC_RDATA_0, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_TDATA0__FEC_TDATA_0, FEC_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_FEC_TX_EN__FEC_TX_EN, FEC_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_FEC_MDC__FEC_MDC, FEC_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_FEC_MDIO__FEC_MDIO, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_22K_UP),
- NEW_PAD_CTRL(MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, FEC_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_CRS__FEC_CRS, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_RDATA1__FEC_RDATA_1, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_TDATA1__FEC_TDATA_1, FEC_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_FEC_RDATA2__FEC_RDATA_2, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_TDATA2__FEC_TDATA_2, FEC_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_FEC_RDATA3__FEC_RDATA_3, FEC_PAD_CTRL |
- PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN),
- NEW_PAD_CTRL(MX35_PAD_FEC_TDATA3__FEC_TDATA_3, FEC_PAD_CTRL),
- };
-
- /* setup pins for FEC */
- imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
-}
-
-int board_early_init_f(void)
-{
- struct ccm_regs *ccm =
- (struct ccm_regs *)IMX_CCM_BASE;
-
- /* enable clocks */
- writel(readl(&ccm->cgr0) |
- MXC_CCM_CGR0_EMI_MASK |
- MXC_CCM_CGR0_EDIO_MASK |
- MXC_CCM_CGR0_EPIT1_MASK,
- &ccm->cgr0);
-
- writel(readl(&ccm->cgr1) |
- MXC_CCM_CGR1_FEC_MASK |
- MXC_CCM_CGR1_GPIO1_MASK |
- MXC_CCM_CGR1_GPIO2_MASK |
- MXC_CCM_CGR1_GPIO3_MASK |
- MXC_CCM_CGR1_I2C1_MASK |
- MXC_CCM_CGR1_I2C2_MASK |
- MXC_CCM_CGR1_IPU_MASK,
- &ccm->cgr1);
-
- /* Setup NAND */
- __raw_writel(readl(&ccm->rcsr) | MXC_CCM_RCSR_NFC_FMS, &ccm->rcsr);
-
- setup_iomux_i2c();
- setup_iomux_usbotg();
- setup_iomux_fec();
- setup_iomux_spi();
-
- return 0;
-}
-
-int board_init(void)
-{
- gd->bd->bi_arch_number = MACH_TYPE_MX35_3DS; /* board id for linux */
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- return 0;
-}
-
-static inline int pmic_detect(void)
-{
- unsigned int id;
- struct pmic *p = pmic_get("FSL_PMIC");
- if (!p)
- return -ENODEV;
-
- pmic_reg_read(p, REG_IDENTIFICATION, &id);
-
- id = (id >> 6) & 0x7;
- if (id == 0x7)
- return 1;
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- int rev;
-
- rev = pmic_detect();
-
- return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
-}
-
-int board_late_init(void)
-{
- u8 val;
- u32 pmic_val;
- struct pmic *p;
- int ret;
-
- ret = pmic_init(I2C_0);
- if (ret)
- return ret;
-
- if (pmic_detect()) {
- p = pmic_get("FSL_PMIC");
- imx_iomux_v3_setup_pad(MX35_PAD_WDOG_RST__WDOG_WDOG_B);
-
- pmic_reg_read(p, REG_SETTING_0, &pmic_val);
- pmic_reg_write(p, REG_SETTING_0,
- pmic_val | VO_1_30V | VO_1_50V);
- pmic_reg_read(p, REG_MODE_0, &pmic_val);
- pmic_reg_write(p, REG_MODE_0, pmic_val | VGEN3EN);
-
- imx_iomux_v3_setup_pad(MX35_PAD_COMPARE__GPIO1_5);
-
- gpio_direction_output(IMX_GPIO_NR(1, 5), 1);
- }
-
- val = mc9sdz60_reg_read(MC9SDZ60_REG_GPIO_1) | 0x04;
- mc9sdz60_reg_write(MC9SDZ60_REG_GPIO_1, val);
- mdelay(200);
-
- val = mc9sdz60_reg_read(MC9SDZ60_REG_RESET_1) & 0x7F;
- mc9sdz60_reg_write(MC9SDZ60_REG_RESET_1, val);
- mdelay(200);
-
- val |= 0x80;
- mc9sdz60_reg_write(MC9SDZ60_REG_RESET_1, val);
-
- /* Print board revision */
- printf("Board: MX35 PDK %d.0\n", ((get_board_rev() >> 8) + 1) & 0x0F);
-
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
-#if defined(CONFIG_SMC911X)
- int rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (rc)
- return rc;
-#endif
- return cpu_eth_init(bis);
-}
-
-#if defined(CONFIG_FSL_ESDHC_IMX)
-
-struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
-
-int board_mmc_init(bd_t *bis)
-{
- static const iomux_v3_cfg_t sdhc1_pads[] = {
- MX35_PAD_SD1_CMD__ESDHC1_CMD,
- MX35_PAD_SD1_CLK__ESDHC1_CLK,
- MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
- MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
- MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
- MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
- };
-
- /* configure pins for SDHC1 only */
- imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
-
- esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
- return fsl_esdhc_initialize(bis, &esdhc_cfg);
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
- return !(mc9sdz60_reg_read(MC9SDZ60_REG_DES_FLAG) & 0x4);
-}
-#endif
diff --git a/board/freescale/mx35pdk/mx35pdk.h b/board/freescale/mx35pdk/mx35pdk.h
deleted file mode 100644
index 0af4b88bfb..0000000000
--- a/board/freescale/mx35pdk/mx35pdk.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- *
- * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
- *
- * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
- */
-
-#ifndef __BOARD_MX35_3STACK_H
-#define __BOARD_MX35_3STACK_H
-
-#define DBG_BASE_ADDR WEIM_CTRL_CS5
-#define DBG_CSCR_U_CONFIG 0x0000D843
-#define DBG_CSCR_L_CONFIG 0x22252521
-#define DBG_CSCR_A_CONFIG 0x22220A00
-
-#define CCM_CCMR_CONFIG 0x003F4208
-#define CCM_PDR0_CONFIG 0x00801000
-
-/* MEMORY SETTING */
-#define ESDCTL_0x92220000 0x92220000
-#define ESDCTL_0xA2220000 0xA2220000
-#define ESDCTL_0xB2220000 0xB2220000
-#define ESDCTL_0x82228080 0x82228080
-
-#define ESDCTL_PRECHARGE 0x00000400
-
-#define ESDCTL_MDDR_CONFIG 0x007FFC3F
-#define ESDCTL_MDDR_MR 0x00000033
-#define ESDCTL_MDDR_EMR 0x02000000
-
-#define ESDCTL_DDR2_CONFIG 0x007FFC3F
-#define ESDCTL_DDR2_EMR2 0x04000000
-#define ESDCTL_DDR2_EMR3 0x06000000
-#define ESDCTL_DDR2_EN_DLL 0x02000400
-#define ESDCTL_DDR2_RESET_DLL 0x00000333
-#define ESDCTL_DDR2_MR 0x00000233
-#define ESDCTL_DDR2_OCD_DEFAULT 0x02000780
-
-#define ESDCTL_DELAY_LINE5 0x00F49F00
-#endif /* __BOARD_MX35_3STACK_H */
diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
deleted file mode 100644
index 628e819839..0000000000
--- a/configs/mx35pdk_defconfig
+++ /dev/null
@@ -1,52 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_MX35PDK=y
-CONFIG_SYS_TEXT_BASE=0xA0000000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_DATE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:1m(boot),5m(linux),96m(root),8m(cfg),1938m(user);physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_ADDR=0xA0080000
-CONFIG_ENV_ADDR_REDUND=0xA00A0000
-CONFIG_MXC_GPIO=y
-CONFIG_FSL_ESDHC_IMX=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_FLASH_CFI_MTD=y
-CONFIG_SYS_FLASH_PROTECTION=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_MXC=y
-CONFIG_MII=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0xB6000000
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
deleted file mode 100644
index 8f1213fd8a..0000000000
--- a/include/configs/mx35pdk.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * Configuration for the MX35pdk Freescale board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-
- /* High Level Configuration Options */
-#define CONFIG_MX35
-
-#define CONFIG_SYS_FSL_CLK
-
-/* Set TEXT at the beginning of the NOR flash */
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-
-/*
- * PMIC Configs
- */
-#define CONFIG_POWER
-#define CONFIG_POWER_I2C
-#define CONFIG_POWER_FSL
-#define CONFIG_POWER_FSL_MC13892
-#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
-#define CONFIG_RTC_MC13XXX
-
-/*
- * MFD MC9SDZ60
- */
-#define CONFIG_FSL_MC9SDZ60
-#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
-
-/*
- * UART (console)
- */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Command definition
- */
-
-#define CONFIG_NET_RETRY_COUNT 100
-
-
-#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
-
-/*
- * Ethernet on the debug board (SMC911)
- */
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETHPRIME
-
-/*
- * Ethernet on SOC (FEC)
- */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1F
-
-#define CONFIG_ARP_TIMEOUT 200UL
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1 CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
-#define PHYS_SDRAM_2 CSD1_BASE_ADDR
-#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
-#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_GBL_DATA_OFFSET)
-
-/*
- * MTD Command for mtdparts
- */
-
-/*
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
-/* Monitor at beginning of flash */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-
-/* Address and size of Redundant Environment Sector */
-
-/*
- * CFI FLASH driver setup
- */
-
-/* A non-standard buffered write algorithm */
-#define CONFIG_FLASH_SPANSION_S29WS_N
-
-/*
- * NAND FLASH driver setup
- */
-#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_LARGEPAGE
-
-/* EHCI driver */
-#define CONFIG_EHCI_IS_TDI
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_EHCI_MXC
-#define CONFIG_MXC_USB_PORT 0
-#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
- MXC_EHCI_POWER_PINS_ENABLED | \
- MXC_EHCI_OC_PIN_ACTIVE_LOW)
-#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
-
-/* mmc driver */
-#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_SYS_FSL_ESDHC_NUM 1
-
-/*
- * Default environment and default scripts
- * to update uboot and load kernel
- */
-
-#define CONFIG_HOSTNAME "mx35pdk"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth1\0" \
- "ethprime=smc911x\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip_sta=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off panic=1\0" \
- "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
- "addip=if test -n ${ipdyn};then run addip_dyn;" \
- "else run addip_sta;fi\0" \
- "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
- "addtty=setenv bootargs ${bootargs}" \
- " console=ttymxc0,${baudrate}\0" \
- "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
- "loadaddr=80800000\0" \
- "kernel_addr_r=80800000\0" \
- "hostname=" CONFIG_HOSTNAME "\0" \
- "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
- "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
- "flash_self=run ramargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr}\0" \
- "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
- "run nfsargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr_r}\0" \
- "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
- "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
- "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
- "load=tftp ${loadaddr} ${u-boot}\0" \
- "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
- "update=protect off ${uboot_addr} +80000;" \
- "erase ${uboot_addr} +80000;" \
- "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
- "upd=if run load;then echo Updating u-boot;if run update;" \
- "then echo U-Boot updated;" \
- "else echo Error updating u-boot !;" \
- "echo Board without bootloader !!;" \
- "fi;" \
- "else echo U-Boot not downloaded..exiting;fi\0" \
- "bootcmd=run net_nfs\0"
-
-#endif /* __CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 15/16] arm: Remove flea3_defconfig board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (13 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 14/16] arm: Remove configs/mx35pdk_defconfig board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 13:03 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 16/16] arm: Remove mx31pdk_defconfig board Jagan Teki
2020-06-13 15:41 ` [PATCH 00/16] spi: dm-conversion (part3) Tom Rini
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.
Remove it.
Patch-cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/Kconfig | 5 -
board/CarMediaLab/flea3/Kconfig | 15 --
board/CarMediaLab/flea3/MAINTAINERS | 6 -
board/CarMediaLab/flea3/Makefile | 8 -
board/CarMediaLab/flea3/flea3.c | 224 ------------------------
board/CarMediaLab/flea3/lowlevel_init.S | 24 ---
configs/flea3_defconfig | 48 -----
include/configs/flea3.h | 182 -------------------
8 files changed, 512 deletions(-)
delete mode 100644 board/CarMediaLab/flea3/Kconfig
delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
delete mode 100644 board/CarMediaLab/flea3/Makefile
delete mode 100644 board/CarMediaLab/flea3/flea3.c
delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
delete mode 100644 configs/flea3_defconfig
delete mode 100644 include/configs/flea3.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4895019dd8..258f0f1329 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -627,10 +627,6 @@ config TARGET_X600
select PL011_SERIAL
select SUPPORT_SPL
-config TARGET_FLEA3
- bool "Support flea3"
- select CPU_ARM1136
-
config ARCH_BCM283X
bool "Broadcom BCM283X family"
select DM
@@ -1855,7 +1851,6 @@ source "arch/arm/mach-imx/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
-source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/gplugd/Kconfig"
source "board/armadeus/apf27/Kconfig"
diff --git a/board/CarMediaLab/flea3/Kconfig b/board/CarMediaLab/flea3/Kconfig
deleted file mode 100644
index 7113f2b51f..0000000000
--- a/board/CarMediaLab/flea3/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_FLEA3
-
-config SYS_BOARD
- default "flea3"
-
-config SYS_VENDOR
- default "CarMediaLab"
-
-config SYS_SOC
- default "mx35"
-
-config SYS_CONFIG_NAME
- default "flea3"
-
-endif
diff --git a/board/CarMediaLab/flea3/MAINTAINERS b/board/CarMediaLab/flea3/MAINTAINERS
deleted file mode 100644
index c7b0df7bc4..0000000000
--- a/board/CarMediaLab/flea3/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-FLEA3 BOARD
-M: Stefano Babic <sbabic@denx.de>
-S: Maintained
-F: board/CarMediaLab/flea3/
-F: include/configs/flea3.h
-F: configs/flea3_defconfig
diff --git a/board/CarMediaLab/flea3/Makefile b/board/CarMediaLab/flea3/Makefile
deleted file mode 100644
index edaac8683b..0000000000
--- a/board/CarMediaLab/flea3/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
-#
-# (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
-
-obj-y := flea3.o
-obj-y += lowlevel_init.o
diff --git a/board/CarMediaLab/flea3/flea3.c b/board/CarMediaLab/flea3/flea3.c
deleted file mode 100644
index 61d965f5f6..0000000000
--- a/board/CarMediaLab/flea3/flea3.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Copyright (C) 2011, Stefano Babic <sbabic@denx.de>
- */
-
-#include <common.h>
-#include <init.h>
-#include <asm/io.h>
-#include <env.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/crm_regs.h>
-#include <asm/arch/iomux-mx35.h>
-#include <i2c.h>
-#include <linux/types.h>
-#include <asm/gpio.h>
-#include <asm/arch/sys_proto.h>
-#include <netdev.h>
-#include <fdt_support.h>
-#include <mtd_node.h>
-#include <jffs2/load_kernel.h>
-
-#ifndef CONFIG_BOARD_EARLY_INIT_F
-#error "CONFIG_BOARD_EARLY_INIT_F must be set for this board"
-#endif
-
-#define CCM_CCMR_CONFIG 0x003F4208
-
-#define ESDCTL_DDR2_CONFIG 0x007FFC3F
-
-static inline void dram_wait(unsigned int count)
-{
- volatile unsigned int wait = count;
-
- while (wait--)
- ;
-}
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1,
- PHYS_SDRAM_1_SIZE);
-
- return 0;
-}
-
-static void board_setup_sdram(void)
-{
- struct esdc_regs *esdc = (struct esdc_regs *)ESDCTL_BASE_ADDR;
-
- /* Initialize with default values both CSD0/1 */
- writel(0x2000, &esdc->esdctl0);
- writel(0x2000, &esdc->esdctl1);
-
-
- mx3_setup_sdram_bank(CSD0_BASE_ADDR, ESDCTL_DDR2_CONFIG,
- 13, 10, 2, 0x8080);
-}
-
-static void setup_iomux_uart3(void)
-{
- static const iomux_v3_cfg_t uart3_pads[] = {
- MX35_PAD_RTS2__UART3_RXD_MUX,
- MX35_PAD_CTS2__UART3_TXD_MUX,
- };
-
- imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads));
-}
-
-#define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN | PAD_CTL_ODE)
-
-static void setup_iomux_i2c(void)
-{
- static const iomux_v3_cfg_t i2c_pads[] = {
- NEW_PAD_CTRL(MX35_PAD_I2C1_CLK__I2C1_SCL, I2C_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_I2C1_DAT__I2C1_SDA, I2C_PAD_CTRL),
-
- NEW_PAD_CTRL(MX35_PAD_TX3_RX2__I2C3_SCL, I2C_PAD_CTRL),
- NEW_PAD_CTRL(MX35_PAD_TX2_RX3__I2C3_SDA, I2C_PAD_CTRL),
- };
-
- imx_iomux_v3_setup_multiple_pads(i2c_pads, ARRAY_SIZE(i2c_pads));
-}
-
-
-static void setup_iomux_spi(void)
-{
- static const iomux_v3_cfg_t spi_pads[] = {
- MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
- MX35_PAD_CSPI1_MISO__CSPI1_MISO,
- MX35_PAD_CSPI1_SS0__CSPI1_SS0,
- MX35_PAD_CSPI1_SS1__CSPI1_SS1,
- MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
- };
-
- imx_iomux_v3_setup_multiple_pads(spi_pads, ARRAY_SIZE(spi_pads));
-}
-
-static void setup_iomux_fec(void)
-{
- static const iomux_v3_cfg_t fec_pads[] = {
- MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
- MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
- MX35_PAD_FEC_RX_DV__FEC_RX_DV,
- MX35_PAD_FEC_COL__FEC_COL,
- MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
- MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
- MX35_PAD_FEC_TX_EN__FEC_TX_EN,
- MX35_PAD_FEC_MDC__FEC_MDC,
- MX35_PAD_FEC_MDIO__FEC_MDIO,
- MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
- MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
- MX35_PAD_FEC_CRS__FEC_CRS,
- MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
- MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
- MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
- MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
- MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
- MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
- /* GPIO used to power off ethernet */
- MX35_PAD_STXFS4__GPIO2_31,
- };
-
- /* setup pins for FEC */
- imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
-}
-
-int board_early_init_f(void)
-{
- struct ccm_regs *ccm =
- (struct ccm_regs *)IMX_CCM_BASE;
-
- /* setup GPIO3_1 to set HighVCore signal */
- imx_iomux_v3_setup_pad(MX35_PAD_ATA_DA1__GPIO3_1);
- gpio_direction_output(65, 1);
-
- /* initialize PLL and clock configuration */
- writel(CCM_CCMR_CONFIG, &ccm->ccmr);
-
- writel(CCM_MPLL_532_HZ, &ccm->mpctl);
- writel(CCM_PPLL_300_HZ, &ccm->ppctl);
-
- /* Set the core to run at 532 Mhz */
- writel(0x00001000, &ccm->pdr0);
-
- /* Set-up RAM */
- board_setup_sdram();
-
- /* enable clocks */
- writel(readl(&ccm->cgr0) |
- MXC_CCM_CGR0_EMI_MASK |
- MXC_CCM_CGR0_EDIO_MASK |
- MXC_CCM_CGR0_EPIT1_MASK,
- &ccm->cgr0);
-
- writel(readl(&ccm->cgr1) |
- MXC_CCM_CGR1_FEC_MASK |
- MXC_CCM_CGR1_GPIO1_MASK |
- MXC_CCM_CGR1_GPIO2_MASK |
- MXC_CCM_CGR1_GPIO3_MASK |
- MXC_CCM_CGR1_I2C1_MASK |
- MXC_CCM_CGR1_I2C2_MASK |
- MXC_CCM_CGR1_I2C3_MASK,
- &ccm->cgr1);
-
- /* Set-up NAND */
- __raw_writel(readl(&ccm->rcsr) | MXC_CCM_RCSR_NFC_FMS, &ccm->rcsr);
-
- /* Set pinmux for the required peripherals */
- setup_iomux_uart3();
- setup_iomux_i2c();
- setup_iomux_fec();
- setup_iomux_spi();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- /* Enable power for ethernet */
- gpio_direction_output(63, 0);
-
- udelay(2000);
-
- return 0;
-}
-
-u32 get_board_rev(void)
-{
- int rev = 0;
-
- return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
-}
-
-/*
- * called prior to booting kernel or by 'fdt boardsetup' command
- *
- */
-int ft_board_setup(void *blob, bd_t *bd)
-{
- static const struct node_info nodes[] = {
- { "physmap-flash.0", MTD_DEV_TYPE_NOR, }, /* NOR flash */
- { "mxc_nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
- };
-
- if (env_get("fdt_noauto")) {
- puts(" Skiping ft_board_setup (fdt_noauto defined)\n");
- return 0;
- }
-
- fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
-
- return 0;
-}
diff --git a/board/CarMediaLab/flea3/lowlevel_init.S b/board/CarMediaLab/flea3/lowlevel_init.S
deleted file mode 100644
index 8186b3922b..0000000000
--- a/board/CarMediaLab/flea3/lowlevel_init.S
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Copyright (C) 2011, Stefano Babic <sbabic@denx.de>
- */
-
-#include <config.h>
-#include <asm/arch/lowlevel_macro.S>
-
-.globl lowlevel_init
-lowlevel_init:
-
- core_init
-
- init_aips
-
- init_max
-
- init_m3if
-
- mov pc, lr
diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
deleted file mode 100644
index 56512f53c6..0000000000
--- a/configs/flea3_defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SYS_DCACHE_OFF=y
-CONFIG_TARGET_FLEA3=y
-CONFIG_SYS_TEXT_BASE=0xA0000000
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_FIT=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTDELAY=3
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="flea3 U-Boot > "
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),64k(env1),64k(env2),3776k(kernel1),3776k(kernel2)"
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_ADDR=0xA0080000
-CONFIG_ENV_ADDR_REDUND=0xA0090000
-CONFIG_MXC_GPIO=y
-# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_FLASH_CFI_MTD=y
-CONFIG_SYS_FLASH_PROTECTION=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_MXC=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ8XXX=y
-CONFIG_MII=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
-CONFIG_OF_LIBFDT=y
-CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
deleted file mode 100644
index 02fedb1823..0000000000
--- a/include/configs/flea3.h
+++ /dev/null
@@ -1,182 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
- *
- * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
- *
- * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
- *
- * Configuration for the flea3 board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-
- /* High Level Configuration Options */
-#define CONFIG_MX35
-
-#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
-
-/* Set TEXT at the beginning of the NOR flash */
-
-/* This is required to setup the ESDC controller */
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_REVISION_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
-#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
-#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
-
-/*
- * UART (console)
- */
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART3_BASE
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Command definition
- */
-
-#define CONFIG_NET_RETRY_COUNT 100
-
-
-#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
-
-/*
- * Ethernet on SOC (FEC)
- */
-#define CONFIG_FEC_MXC
-#define IMX_FEC_BASE FEC_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR 0x1
-
-#define CONFIG_ARP_TIMEOUT 200UL
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
-
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-
-/*
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1 CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
-#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_GBL_DATA_OFFSET)
-
-/*
- * MTD Command for mtdparts
- */
-
-/*
- * FLASH and environment organization
- */
-#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
-/* Monitor at beginning of flash */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-
-/* Address and size of Redundant Environment Sector */
-
-/*
- * CFI FLASH driver setup
- */
-
-/* A non-standard buffered write algorithm */
-
-/*
- * NAND FLASH driver setup
- */
-#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_LARGEPAGE
-
-/*
- * Default environment and default scripts
- * to update uboot and load kernel
- */
-
-#define CONFIG_HOSTNAME "flea3"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip_sta=setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off panic=1\0" \
- "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
- "addip=if test -n ${ipdyn};then run addip_dyn;" \
- "else run addip_sta;fi\0" \
- "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
- "addtty=setenv bootargs ${bootargs}" \
- " console=ttymxc2,${baudrate}\0" \
- "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
- "loadaddr=80800000\0" \
- "kernel_addr_r=80800000\0" \
- "hostname=" CONFIG_HOSTNAME "\0" \
- "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
- "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
- "flash_self=run ramargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr}\0" \
- "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
- "run nfsargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr_r}\0" \
- "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
- "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
- "net_self=if run net_self_load;then " \
- "run ramargs addip addtty addmtd addmisc;" \
- "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
- "else echo Images not loades;fi\0" \
- "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
- "load=tftp ${loadaddr} ${u-boot}\0" \
- "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
- "update=protect off ${uboot_addr} +80000;" \
- "erase ${uboot_addr} +80000;" \
- "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
- "upd=if run load;then echo Updating u-boot;if run update;" \
- "then echo U-Boot updated;" \
- "else echo Error updating u-boot !;" \
- "echo Board without bootloader !!;" \
- "fi;" \
- "else echo U-Boot not downloaded..exiting;fi\0" \
- "bootcmd=run net_nfs\0"
-
-#endif /* __CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 16/16] arm: Remove mx31pdk_defconfig board
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (14 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 15/16] arm: Remove flea3_defconfig board Jagan Teki
@ 2020-06-13 13:54 ` Jagan Teki
2020-07-08 13:04 ` Jagan Teki
2020-06-13 15:41 ` [PATCH 00/16] spi: dm-conversion (part3) Tom Rini
16 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-06-13 13:54 UTC (permalink / raw)
To: u-boot
DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.
Remove it.
Patch-cc: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/mach-imx/mx3/Kconfig | 12 --
board/freescale/mx31pdk/Kconfig | 15 ---
board/freescale/mx31pdk/MAINTAINERS | 6 -
board/freescale/mx31pdk/Makefile | 11 --
board/freescale/mx31pdk/lowlevel_init.S | 76 -------------
board/freescale/mx31pdk/mx31pdk.c | 119 --------------------
configs/mx31pdk_defconfig | 40 -------
include/configs/mx31pdk.h | 141 ------------------------
8 files changed, 420 deletions(-)
delete mode 100644 board/freescale/mx31pdk/Kconfig
delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
delete mode 100644 board/freescale/mx31pdk/Makefile
delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
delete mode 100644 configs/mx31pdk_defconfig
delete mode 100644 include/configs/mx31pdk.h
diff --git a/arch/arm/mach-imx/mx3/Kconfig b/arch/arm/mach-imx/mx3/Kconfig
index 5028d5ea56..16bdbe7a2b 100644
--- a/arch/arm/mach-imx/mx3/Kconfig
+++ b/arch/arm/mach-imx/mx3/Kconfig
@@ -3,17 +3,6 @@ if ARCH_MX31
config MX31
bool
default y
-choice
- prompt "MX31 board select"
- optional
-
-config TARGET_MX31PDK
- bool "Support the i.MX31 PDK board from Freescale/NXP"
- select BOARD_EARLY_INIT_F
- select BOARD_LATE_INIT
- select SUPPORT_SPL
-
-endchoice
config MX31_HCLK_FREQ
int "i.MX31 HCLK frequency"
@@ -29,6 +18,5 @@ config MX31_CLK32
Frequency in Hz of the low frequency input clock. Typically
32768 or 32000 Hz.
-source "board/freescale/mx31pdk/Kconfig"
endif
diff --git a/board/freescale/mx31pdk/Kconfig b/board/freescale/mx31pdk/Kconfig
deleted file mode 100644
index 055545c930..0000000000
--- a/board/freescale/mx31pdk/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_MX31PDK
-
-config SYS_BOARD
- default "mx31pdk"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_SOC
- default "mx31"
-
-config SYS_CONFIG_NAME
- default "mx31pdk"
-
-endif
diff --git a/board/freescale/mx31pdk/MAINTAINERS b/board/freescale/mx31pdk/MAINTAINERS
deleted file mode 100644
index ec2a32063b..0000000000
--- a/board/freescale/mx31pdk/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-MX31PDK BOARD
-M: Magnus Lilja <lilja.magnus@gmail.com>
-S: Maintained
-F: board/freescale/mx31pdk/
-F: include/configs/mx31pdk.h
-F: configs/mx31pdk_defconfig
diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile
deleted file mode 100644
index 7edc60f0d2..0000000000
--- a/board/freescale/mx31pdk/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-
-ifdef CONFIG_SPL_BUILD
-obj-y += lowlevel_init.o
-endif
-obj-y += mx31pdk.o
diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S
deleted file mode 100644
index d78459faf6..0000000000
--- a/board/freescale/mx31pdk/lowlevel_init.S
+++ /dev/null
@@ -1,76 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
- */
-
-#include <config.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/macro.h>
-
-.globl lowlevel_init
-lowlevel_init:
- /* Also setup the Peripheral Port Remap register inside the core */
- ldr r0, =ARM_PPMRR /* start from AIPS 2GB region */
- mcr p15, 0, r0, c15, c2, 4
-
- write32 IPU_CONF, IPU_CONF_DI_EN
- write32 CCM_CCMR, CCM_CCMR_SETUP
-
- wait_timer 0x40000
-
- write32 CCM_CCMR, CCM_CCMR_SETUP | CCMR_MPE
- write32 CCM_CCMR, (CCM_CCMR_SETUP | CCMR_MPE) & ~CCMR_MDS
-
- /* Set up clock to 532MHz */
- write32 CCM_PDR0, CCM_PDR0_SETUP_532MHZ
- write32 CCM_MPCTL, CCM_MPCTL_SETUP_532MHZ
-
- write32 CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
-
- /* Set up MX31 DDR pins */
- write32 IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B, 0
- write32 IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0, 0
- write32 IOMUXC_SW_PAD_CTL_BCLK_RW_RAS, 0
- write32 IOMUXC_SW_PAD_CTL_CS2_CS3_CS4, 0x1000
- write32 IOMUXC_SW_PAD_CTL_DQM3_EB0_EB1, 0
- write32 IOMUXC_SW_PAD_CTL_DQM0_DQM1_DQM2, 0
- write32 IOMUXC_SW_PAD_CTL_SD29_SD30_SD31, 0
- write32 IOMUXC_SW_PAD_CTL_SD26_SD27_SD28, 0
- write32 IOMUXC_SW_PAD_CTL_SD23_SD24_SD25, 0
- write32 IOMUXC_SW_PAD_CTL_SD20_SD21_SD22, 0
- write32 IOMUXC_SW_PAD_CTL_SD17_SD18_SD19, 0
- write32 IOMUXC_SW_PAD_CTL_SD14_SD15_SD16, 0
- write32 IOMUXC_SW_PAD_CTL_SD11_SD12_SD13, 0
- write32 IOMUXC_SW_PAD_CTL_SD8_SD9_SD10, 0
- write32 IOMUXC_SW_PAD_CTL_SD5_SD6_SD7, 0
- write32 IOMUXC_SW_PAD_CTL_SD2_SD3_SD4, 0
- write32 IOMUXC_SW_PAD_CTL_SDBA0_SD0_SD1, 0
- write32 IOMUXC_SW_PAD_CTL_A24_A25_SDBA1, 0
- write32 IOMUXC_SW_PAD_CTL_A21_A22_A23, 0
- write32 IOMUXC_SW_PAD_CTL_A18_A19_A20, 0
- write32 IOMUXC_SW_PAD_CTL_A15_A16_A17, 0
- write32 IOMUXC_SW_PAD_CTL_A12_A13_A14, 0
- write32 IOMUXC_SW_PAD_CTL_A10_MA10_A11, 0
- write32 IOMUXC_SW_PAD_CTL_A7_A8_A9, 0
- write32 IOMUXC_SW_PAD_CTL_A4_A5_A6, 0
- write32 IOMUXC_SW_PAD_CTL_A1_A2_A3, 0
- write32 IOMUXC_SW_PAD_CTL_VPG0_VPG1_A0, 0
-
- /* Set up MX31 DDR Memory Controller */
- write32 WEIM_ESDMISC, ESDMISC_MDDR_SETUP
- write32 WEIM_ESDCFG0, ESDCFG0_MDDR_SETUP
-
- /* Perform DDR init sequence */
- write32 WEIM_ESDCTL0, ESDCTL_PRECHARGE
- write32 CSD0_BASE | 0x0f00, 0x12344321
- write32 WEIM_ESDCTL0, ESDCTL_AUTOREFRESH
- write32 CSD0_BASE, 0x12344321
- write32 CSD0_BASE, 0x12344321
- write32 WEIM_ESDCTL0, ESDCTL_LOADMODEREG
- write8 CSD0_BASE | 0x00000033, 0xda
- write8 CSD0_BASE | 0x01000000, 0xff
- write32 WEIM_ESDCTL0, ESDCTL_RW
- write32 CSD0_BASE, 0xDEADBEEF
- write32 WEIM_ESDMISC, ESDMISC_MDDR_RESET_DL
-
- mov pc, lr
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
deleted file mode 100644
index 06fe51db71..0000000000
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ /dev/null
@@ -1,119 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *
- * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
- *
- * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
- */
-
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <netdev.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/sys_proto.h>
-#include <watchdog.h>
-#include <power/pmic.h>
-#include <fsl_pmic.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SPL_BUILD
-void board_init_f(ulong bootflag)
-{
- /*
- * copy ourselves from where we are running to where we were
- * linked at. Use ulong pointers as all addresses involved
- * are 4-byte-aligned.
- */
- ulong *start_ptr, *end_ptr, *link_ptr, *run_ptr, *dst;
- asm volatile ("ldr %0, =_start" : "=r"(start_ptr));
- asm volatile ("ldr %0, =_end" : "=r"(end_ptr));
- asm volatile ("ldr %0, =board_init_f" : "=r"(link_ptr));
- asm volatile ("adr %0, board_init_f" : "=r"(run_ptr));
- for (dst = start_ptr; dst < end_ptr; dst++)
- *dst = *(dst+(run_ptr-link_ptr));
- /*
- * branch to nand_boot's link-time address.
- */
- asm volatile("ldr pc, =nand_boot");
-}
-#endif
-
-int dram_init(void)
-{
- /* dram_init must store complete ramsize in gd->ram_size */
- gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- PHYS_SDRAM_1_SIZE);
- return 0;
-}
-
-int board_early_init_f(void)
-{
- /* CS5: CPLD incl. network controller */
- static const struct mxc_weimcs cs5 = {
- /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
- CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3),
- /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
- CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1),
- /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
- CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0)
- };
-
- mxc_setup_weimcs(5, &cs5);
-
- /* Setup UART1 and SPI2 pins */
- mx31_uart1_hw_init();
- mx31_spi2_hw_init();
-
- return 0;
-}
-
-int board_init(void)
-{
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- return 0;
-}
-
-int board_late_init(void)
-{
- u32 val;
- struct pmic *p;
- int ret;
-
- ret = pmic_init(CONFIG_FSL_PMIC_BUS);
- if (ret)
- return ret;
-
- p = pmic_get("FSL_PMIC");
- if (!p)
- return -ENODEV;
- /* Enable RTC battery */
- pmic_reg_read(p, REG_POWER_CTL0, &val);
- pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
- pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
-#ifdef CONFIG_HW_WATCHDOG
- hw_watchdog_init();
-#endif
- return 0;
-}
-
-int checkboard(void)
-{
- printf("Board: MX31PDK\n");
- return 0;
-}
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_SMC911X
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
-#endif
- return rc;
-}
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
deleted file mode 100644
index c53c23a363..0000000000
--- a/configs/mx31pdk_defconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-CONFIG_ARM=y
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARCH_MX31=y
-CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds"
-CONFIG_SYS_TEXT_BASE=0x87e00000
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0x40000
-CONFIG_TARGET_MX31PDK=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL=y
-CONFIG_ENV_OFFSET_REDUND=0x60000
-CONFIG_SPL_TEXT_BASE=0x87dc0000
-# CONFIG_SPL_FRAMEWORK is not set
-CONFIG_SPL_NAND_SUPPORT=y
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_SPI=y
-CONFIG_DEFAULT_SPI_BUS=1
-CONFIG_DEFAULT_SPI_MODE=4
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_MXC_GPIO=y
-# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_MXC=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0xB6000000
-CONFIG_SMC911X_32_BIT=y
-CONFIG_SPI=y
-CONFIG_MXC_SPI=y
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
deleted file mode 100644
index f910d6199b..0000000000
--- a/include/configs/mx31pdk.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com>
- *
- * (C) Copyright 2004
- * Texas Instruments.
- * Richard Woodruff <r-woodruff2@ti.com>
- * Kshitij Gupta <kshitij@ti.com>
- *
- * Configuration settings for the Freescale i.MX31 PDK board.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#include <asm/arch/imx-regs.h>
-
-/* High Level Configuration Options */
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-
-#define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS
-
-#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_SPL_MAX_SIZE 2048
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (2*CONFIG_ENV_SIZE + 2 * 128 * 1024)
-
-/*
- * Hardware drivers
- */
-
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_BASE
-
-/* PMIC Controller */
-#define CONFIG_POWER
-#define CONFIG_POWER_SPI
-#define CONFIG_POWER_FSL
-#define CONFIG_FSL_PMIC_BUS 1
-#define CONFIG_FSL_PMIC_CS 2
-#define CONFIG_FSL_PMIC_CLK 1000000
-#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
-#define CONFIG_FSL_PMIC_BITLEN 32
-#define CONFIG_RTC_MC13XXX
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
- "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
- "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
- "bootcmd=run bootcmd_net\0" \
- "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \
- "tftpboot 0x81000000 uImage-mx31; bootm\0" \
- "prg_uboot=tftpboot 0x81000000 u-boot-with-spl.bin; " \
- "nand erase 0x0 0x40000; " \
- "nand write 0x81000000 0x0 0x40000\0"
-
-/*
- * Miscellaneous configurable options
- */
-
-/* memtest works on */
-
-/* default load address */
-#define CONFIG_SYS_LOAD_ADDR 0x81000000
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1 CSD0_BASE
-#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE)
-
-/*
- * environment organization
- */
-
-/*
- * NAND driver
- */
-#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_LARGEPAGE
-
-/* NAND configuration for the NAND_SPL */
-
-/* Start copying real U-Boot from the second page */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x3f800
-/* Load U-Boot to this address */
-#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
-
-#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-
-/* Configuration of lowlevel_init.S (clocks and SDRAM) */
-#define CCM_CCMR_SETUP 0x074B0BF5
-#define CCM_PDR0_SETUP_532MHZ (PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | \
- PDR0_PER_PODF(7) | PDR0_HSP_PODF(3) | \
- PDR0_NFC_PODF(5) | PDR0_IPG_PODF(1) | \
- PDR0_MAX_PODF(3) | PDR0_MCU_PODF(0))
-#define CCM_MPCTL_SETUP_532MHZ (PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) | \
- PLL_MFN(12))
-
-#define ESDMISC_MDDR_SETUP 0x00000004
-#define ESDMISC_MDDR_RESET_DL 0x0000000c
-#define ESDCFG0_MDDR_SETUP 0x006ac73a
-
-#define ESDCTL_ROW_COL (ESDCTL_SDE | ESDCTL_ROW(2) | ESDCTL_COL(2))
-#define ESDCTL_SETTINGS (ESDCTL_ROW_COL | ESDCTL_SREFR(3) | \
- ESDCTL_DSIZ(2) | ESDCTL_BL(1))
-#define ESDCTL_PRECHARGE (ESDCTL_ROW_COL | ESDCTL_CMD_PRECHARGE)
-#define ESDCTL_AUTOREFRESH (ESDCTL_ROW_COL | ESDCTL_CMD_AUTOREFRESH)
-#define ESDCTL_LOADMODEREG (ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
-#define ESDCTL_RW ESDCTL_SETTINGS
-
-#endif /* __CONFIG_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
` (15 preceding siblings ...)
2020-06-13 13:54 ` [PATCH 16/16] arm: Remove mx31pdk_defconfig board Jagan Teki
@ 2020-06-13 15:41 ` Tom Rini
2020-07-08 11:40 ` Jagan Teki
16 siblings, 1 reply; 38+ messages in thread
From: Tom Rini @ 2020-06-13 15:41 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 07:24:39PM +0530, Jagan Teki wrote:
> This series updated boards which are using mxc_spi
> driver.
>
> Series has patches for
> 1) DM_SPI/SPI_FLASH enablement for boards which
> already support DM and OF_CONTROL.
> 2) Drop the boards which doesn't support DM or OF_CONTROL.
>
> Now it's call for board maintainers to update their
> board to use device tree and DM options to alive
> on tree before MW.
>
> thanks,
> Jagan.
>
> Jagan Teki (16):
> cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
> cm_fx6: Switch to full DM-aware
> dh_imx6: Switch to full DM-aware
> arm: Remove mx51evk board
> arm: Remove ts4800 board
> arm: Remove tqma6s_wru4_mmc_defconfig
> arm: Remove pfla02 board
> arm: Remove pcm058 board
> arm: Remove riotboard board
> arm: Remove zc5202/zc5601 board
> arm: Remove cgtqmx6eval board
> arm: Remove ot1200 board
> arm: Remove dms-ba16 board
> arm: Remove configs/mx35pdk_defconfig board
> arm: Remove flea3_defconfig board
> arm: Remove mx31pdk_defconfig board
>
> arch/arm/Kconfig | 11 -
> arch/arm/mach-imx/mx3/Kconfig | 12 -
> arch/arm/mach-imx/mx5/Kconfig | 11 -
> arch/arm/mach-imx/mx6/Kconfig | 59 --
> board/CarMediaLab/flea3/Kconfig | 15 -
> board/CarMediaLab/flea3/MAINTAINERS | 6 -
> board/CarMediaLab/flea3/Makefile | 8 -
> board/CarMediaLab/flea3/flea3.c | 224 ----
> board/CarMediaLab/flea3/lowlevel_init.S | 24 -
> board/advantech/dms-ba16/Kconfig | 31 -
> board/advantech/dms-ba16/MAINTAINERS | 8 -
> board/advantech/dms-ba16/Makefile | 6 -
> board/advantech/dms-ba16/clocks.cfg | 25 -
> board/advantech/dms-ba16/ddr-setup.cfg | 39 -
> board/advantech/dms-ba16/dms-ba16.c | 629 -----------
> board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 -
> board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 -
> board/advantech/dms-ba16/micron-1g.cfg | 63 --
> board/advantech/dms-ba16/samsung-2g.cfg | 63 --
> board/bachmann/ot1200/Kconfig | 12 -
> board/bachmann/ot1200/MAINTAINERS | 6 -
> board/bachmann/ot1200/Makefile | 11 -
> board/bachmann/ot1200/README | 20 -
> board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 ---
> board/bachmann/ot1200/ot1200.c | 359 -------
> board/bachmann/ot1200/ot1200_spl.c | 152 ---
> board/congatec/cgtqmx6eval/Kconfig | 12 -
> board/congatec/cgtqmx6eval/MAINTAINERS | 6 -
> board/congatec/cgtqmx6eval/Makefile | 8 -
> board/congatec/cgtqmx6eval/README | 74 --
> board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 --------------------
> board/el/el6x/Kconfig | 25 -
> board/el/el6x/MAINTAINERS | 8 -
> board/el/el6x/Makefile | 5 -
> board/el/el6x/el6x.c | 636 ------------
> board/embest/mx6boards/Kconfig | 12 -
> board/embest/mx6boards/MAINTAINERS | 8 -
> board/embest/mx6boards/Makefile | 7 -
> board/embest/mx6boards/mx6boards.c | 662 ------------
> board/freescale/mx31pdk/Kconfig | 15 -
> board/freescale/mx31pdk/MAINTAINERS | 6 -
> board/freescale/mx31pdk/Makefile | 11 -
> board/freescale/mx31pdk/lowlevel_init.S | 76 --
> board/freescale/mx31pdk/mx31pdk.c | 119 ---
> board/freescale/mx35pdk/Kconfig | 15 -
> board/freescale/mx35pdk/MAINTAINERS | 6 -
> board/freescale/mx35pdk/Makefile | 8 -
> board/freescale/mx35pdk/README | 114 --
> board/freescale/mx35pdk/lowlevel_init.S | 239 -----
> board/freescale/mx35pdk/mx35pdk.c | 293 ------
> board/freescale/mx35pdk/mx35pdk.h | 41 -
> board/freescale/mx51evk/Kconfig | 15 -
> board/freescale/mx51evk/MAINTAINERS | 6 -
> board/freescale/mx51evk/Makefile | 8 -
> board/freescale/mx51evk/imximage.cfg | 108 --
> board/freescale/mx51evk/mx51evk.c | 401 -------
> board/freescale/mx51evk/mx51evk_video.c | 98 --
> board/phytec/pcm058/Kconfig | 12 -
> board/phytec/pcm058/MAINTAINERS | 6 -
> board/phytec/pcm058/Makefile | 7 -
> board/phytec/pcm058/README | 35 -
> board/phytec/pcm058/pcm058.c | 571 ----------
> board/phytec/pfla02/Kconfig | 18 -
> board/phytec/pfla02/MAINTAINERS | 6 -
> board/phytec/pfla02/Makefile | 7 -
> board/phytec/pfla02/README | 24 -
> board/phytec/pfla02/pfla02.c | 713 -------------
> board/technologic/ts4800/Kconfig | 15 -
> board/technologic/ts4800/MAINTAINERS | 6 -
> board/technologic/ts4800/Makefile | 5 -
> board/technologic/ts4800/ts4800.c | 262 -----
> board/technologic/ts4800/ts4800.h | 15 -
> configs/cgtqmx6eval_defconfig | 85 --
> configs/cl-som-imx7_defconfig | 7 +-
> configs/cm_fx6_defconfig | 3 +
> configs/dh_imx6_defconfig | 3 +
> configs/dms-ba16-1g_defconfig | 64 --
> configs/dms-ba16_defconfig | 63 --
> configs/flea3_defconfig | 48 -
> configs/marsboard_defconfig | 44 -
> configs/mx31pdk_defconfig | 40 -
> configs/mx35pdk_defconfig | 52 -
> configs/mx51evk_defconfig | 42 -
> configs/ot1200_defconfig | 55 -
> configs/ot1200_spl_defconfig | 66 --
> configs/pcm058_defconfig | 70 --
> configs/pfla02_defconfig | 71 --
> configs/riotboard_defconfig | 44 -
> configs/riotboard_spl_defconfig | 55 -
> configs/tqma6s_wru4_mmc_defconfig | 81 --
> configs/ts4800_defconfig | 28 -
> configs/zc5202_defconfig | 56 -
> configs/zc5601_defconfig | 54 -
> include/configs/advantech_dms-ba16.h | 233 -----
> include/configs/cgtqmx6eval.h | 209 ----
> include/configs/cm_fx6.h | 7 -
> include/configs/dh_imx6.h | 6 -
> include/configs/embestmx6boards.h | 140 ---
> include/configs/flea3.h | 182 ----
> include/configs/mx31pdk.h | 141 ---
> include/configs/mx35pdk.h | 210 ----
> include/configs/mx51evk.h | 197 ----
> include/configs/ot1200.h | 99 --
> include/configs/pcm058.h | 77 --
> include/configs/pfla02.h | 131 ---
> include/configs/ts4800.h | 139 ---
> include/configs/zc5202.h | 27 -
> include/configs/zc5601.h | 26 -
> 108 files changed, 11 insertions(+), 10675 deletions(-)
> delete mode 100644 board/CarMediaLab/flea3/Kconfig
> delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
> delete mode 100644 board/CarMediaLab/flea3/Makefile
> delete mode 100644 board/CarMediaLab/flea3/flea3.c
> delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
> delete mode 100644 board/advantech/dms-ba16/Kconfig
> delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
> delete mode 100644 board/advantech/dms-ba16/Makefile
> delete mode 100644 board/advantech/dms-ba16/clocks.cfg
> delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
> delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
> delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
> delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
> delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
> delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
> delete mode 100644 board/bachmann/ot1200/Kconfig
> delete mode 100644 board/bachmann/ot1200/MAINTAINERS
> delete mode 100644 board/bachmann/ot1200/Makefile
> delete mode 100644 board/bachmann/ot1200/README
> delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
> delete mode 100644 board/bachmann/ot1200/ot1200.c
> delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
> delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
> delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
> delete mode 100644 board/congatec/cgtqmx6eval/Makefile
> delete mode 100644 board/congatec/cgtqmx6eval/README
> delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
> delete mode 100644 board/el/el6x/Kconfig
> delete mode 100644 board/el/el6x/MAINTAINERS
> delete mode 100644 board/el/el6x/Makefile
> delete mode 100644 board/el/el6x/el6x.c
> delete mode 100644 board/embest/mx6boards/Kconfig
> delete mode 100644 board/embest/mx6boards/MAINTAINERS
> delete mode 100644 board/embest/mx6boards/Makefile
> delete mode 100644 board/embest/mx6boards/mx6boards.c
> delete mode 100644 board/freescale/mx31pdk/Kconfig
> delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
> delete mode 100644 board/freescale/mx31pdk/Makefile
> delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
> delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
> delete mode 100644 board/freescale/mx35pdk/Kconfig
> delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
> delete mode 100644 board/freescale/mx35pdk/Makefile
> delete mode 100644 board/freescale/mx35pdk/README
> delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
> delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
> delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
> delete mode 100644 board/freescale/mx51evk/Kconfig
> delete mode 100644 board/freescale/mx51evk/MAINTAINERS
> delete mode 100644 board/freescale/mx51evk/Makefile
> delete mode 100644 board/freescale/mx51evk/imximage.cfg
> delete mode 100644 board/freescale/mx51evk/mx51evk.c
> delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
> delete mode 100644 board/phytec/pcm058/Kconfig
> delete mode 100644 board/phytec/pcm058/MAINTAINERS
> delete mode 100644 board/phytec/pcm058/Makefile
> delete mode 100644 board/phytec/pcm058/README
> delete mode 100644 board/phytec/pcm058/pcm058.c
> delete mode 100644 board/phytec/pfla02/Kconfig
> delete mode 100644 board/phytec/pfla02/MAINTAINERS
> delete mode 100644 board/phytec/pfla02/Makefile
> delete mode 100644 board/phytec/pfla02/README
> delete mode 100644 board/phytec/pfla02/pfla02.c
> delete mode 100644 board/technologic/ts4800/Kconfig
> delete mode 100644 board/technologic/ts4800/MAINTAINERS
> delete mode 100644 board/technologic/ts4800/Makefile
> delete mode 100644 board/technologic/ts4800/ts4800.c
> delete mode 100644 board/technologic/ts4800/ts4800.h
> delete mode 100644 configs/cgtqmx6eval_defconfig
> delete mode 100644 configs/dms-ba16-1g_defconfig
> delete mode 100644 configs/dms-ba16_defconfig
> delete mode 100644 configs/flea3_defconfig
> delete mode 100644 configs/marsboard_defconfig
> delete mode 100644 configs/mx31pdk_defconfig
> delete mode 100644 configs/mx35pdk_defconfig
> delete mode 100644 configs/mx51evk_defconfig
> delete mode 100644 configs/ot1200_defconfig
> delete mode 100644 configs/ot1200_spl_defconfig
> delete mode 100644 configs/pcm058_defconfig
> delete mode 100644 configs/pfla02_defconfig
> delete mode 100644 configs/riotboard_defconfig
> delete mode 100644 configs/riotboard_spl_defconfig
> delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
> delete mode 100644 configs/ts4800_defconfig
> delete mode 100644 configs/zc5202_defconfig
> delete mode 100644 configs/zc5601_defconfig
> delete mode 100644 include/configs/advantech_dms-ba16.h
> delete mode 100644 include/configs/cgtqmx6eval.h
> delete mode 100644 include/configs/embestmx6boards.h
> delete mode 100644 include/configs/flea3.h
> delete mode 100644 include/configs/mx31pdk.h
> delete mode 100644 include/configs/mx35pdk.h
> delete mode 100644 include/configs/mx51evk.h
> delete mode 100644 include/configs/ot1200.h
> delete mode 100644 include/configs/pcm058.h
> delete mode 100644 include/configs/pfla02.h
> delete mode 100644 include/configs/ts4800.h
> delete mode 100644 include/configs/zc5202.h
> delete mode 100644 include/configs/zc5601.h
I'm cc'ing more of the i.MX folks here as when this has come up before
there's been a request to not delete some of these platforms and instead
to convert them. As of yet, no one has stepped up to maintain and
convert them so I'm bringing this to a wider audience. Thanks!
--
Tom
-------------- next part --------------
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^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-06-13 15:41 ` [PATCH 00/16] spi: dm-conversion (part3) Tom Rini
@ 2020-07-08 11:40 ` Jagan Teki
2020-07-08 12:24 ` Fabio Estevam
2020-07-08 12:54 ` Stefano Babic
0 siblings, 2 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 11:40 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 9:11 PM Tom Rini <trini@konsulko.com> wrote:
>
> On Sat, Jun 13, 2020 at 07:24:39PM +0530, Jagan Teki wrote:
>
> > This series updated boards which are using mxc_spi
> > driver.
> >
> > Series has patches for
> > 1) DM_SPI/SPI_FLASH enablement for boards which
> > already support DM and OF_CONTROL.
> > 2) Drop the boards which doesn't support DM or OF_CONTROL.
> >
> > Now it's call for board maintainers to update their
> > board to use device tree and DM options to alive
> > on tree before MW.
> >
> > thanks,
> > Jagan.
> >
> > Jagan Teki (16):
> > cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
> > cm_fx6: Switch to full DM-aware
> > dh_imx6: Switch to full DM-aware
> > arm: Remove mx51evk board
> > arm: Remove ts4800 board
> > arm: Remove tqma6s_wru4_mmc_defconfig
> > arm: Remove pfla02 board
> > arm: Remove pcm058 board
> > arm: Remove riotboard board
> > arm: Remove zc5202/zc5601 board
> > arm: Remove cgtqmx6eval board
> > arm: Remove ot1200 board
> > arm: Remove dms-ba16 board
> > arm: Remove configs/mx35pdk_defconfig board
> > arm: Remove flea3_defconfig board
> > arm: Remove mx31pdk_defconfig board
> >
> > arch/arm/Kconfig | 11 -
> > arch/arm/mach-imx/mx3/Kconfig | 12 -
> > arch/arm/mach-imx/mx5/Kconfig | 11 -
> > arch/arm/mach-imx/mx6/Kconfig | 59 --
> > board/CarMediaLab/flea3/Kconfig | 15 -
> > board/CarMediaLab/flea3/MAINTAINERS | 6 -
> > board/CarMediaLab/flea3/Makefile | 8 -
> > board/CarMediaLab/flea3/flea3.c | 224 ----
> > board/CarMediaLab/flea3/lowlevel_init.S | 24 -
> > board/advantech/dms-ba16/Kconfig | 31 -
> > board/advantech/dms-ba16/MAINTAINERS | 8 -
> > board/advantech/dms-ba16/Makefile | 6 -
> > board/advantech/dms-ba16/clocks.cfg | 25 -
> > board/advantech/dms-ba16/ddr-setup.cfg | 39 -
> > board/advantech/dms-ba16/dms-ba16.c | 629 -----------
> > board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 -
> > board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 -
> > board/advantech/dms-ba16/micron-1g.cfg | 63 --
> > board/advantech/dms-ba16/samsung-2g.cfg | 63 --
> > board/bachmann/ot1200/Kconfig | 12 -
> > board/bachmann/ot1200/MAINTAINERS | 6 -
> > board/bachmann/ot1200/Makefile | 11 -
> > board/bachmann/ot1200/README | 20 -
> > board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 ---
> > board/bachmann/ot1200/ot1200.c | 359 -------
> > board/bachmann/ot1200/ot1200_spl.c | 152 ---
> > board/congatec/cgtqmx6eval/Kconfig | 12 -
> > board/congatec/cgtqmx6eval/MAINTAINERS | 6 -
> > board/congatec/cgtqmx6eval/Makefile | 8 -
> > board/congatec/cgtqmx6eval/README | 74 --
> > board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 --------------------
> > board/el/el6x/Kconfig | 25 -
> > board/el/el6x/MAINTAINERS | 8 -
> > board/el/el6x/Makefile | 5 -
> > board/el/el6x/el6x.c | 636 ------------
> > board/embest/mx6boards/Kconfig | 12 -
> > board/embest/mx6boards/MAINTAINERS | 8 -
> > board/embest/mx6boards/Makefile | 7 -
> > board/embest/mx6boards/mx6boards.c | 662 ------------
> > board/freescale/mx31pdk/Kconfig | 15 -
> > board/freescale/mx31pdk/MAINTAINERS | 6 -
> > board/freescale/mx31pdk/Makefile | 11 -
> > board/freescale/mx31pdk/lowlevel_init.S | 76 --
> > board/freescale/mx31pdk/mx31pdk.c | 119 ---
> > board/freescale/mx35pdk/Kconfig | 15 -
> > board/freescale/mx35pdk/MAINTAINERS | 6 -
> > board/freescale/mx35pdk/Makefile | 8 -
> > board/freescale/mx35pdk/README | 114 --
> > board/freescale/mx35pdk/lowlevel_init.S | 239 -----
> > board/freescale/mx35pdk/mx35pdk.c | 293 ------
> > board/freescale/mx35pdk/mx35pdk.h | 41 -
> > board/freescale/mx51evk/Kconfig | 15 -
> > board/freescale/mx51evk/MAINTAINERS | 6 -
> > board/freescale/mx51evk/Makefile | 8 -
> > board/freescale/mx51evk/imximage.cfg | 108 --
> > board/freescale/mx51evk/mx51evk.c | 401 -------
> > board/freescale/mx51evk/mx51evk_video.c | 98 --
> > board/phytec/pcm058/Kconfig | 12 -
> > board/phytec/pcm058/MAINTAINERS | 6 -
> > board/phytec/pcm058/Makefile | 7 -
> > board/phytec/pcm058/README | 35 -
> > board/phytec/pcm058/pcm058.c | 571 ----------
> > board/phytec/pfla02/Kconfig | 18 -
> > board/phytec/pfla02/MAINTAINERS | 6 -
> > board/phytec/pfla02/Makefile | 7 -
> > board/phytec/pfla02/README | 24 -
> > board/phytec/pfla02/pfla02.c | 713 -------------
> > board/technologic/ts4800/Kconfig | 15 -
> > board/technologic/ts4800/MAINTAINERS | 6 -
> > board/technologic/ts4800/Makefile | 5 -
> > board/technologic/ts4800/ts4800.c | 262 -----
> > board/technologic/ts4800/ts4800.h | 15 -
> > configs/cgtqmx6eval_defconfig | 85 --
> > configs/cl-som-imx7_defconfig | 7 +-
> > configs/cm_fx6_defconfig | 3 +
> > configs/dh_imx6_defconfig | 3 +
> > configs/dms-ba16-1g_defconfig | 64 --
> > configs/dms-ba16_defconfig | 63 --
> > configs/flea3_defconfig | 48 -
> > configs/marsboard_defconfig | 44 -
> > configs/mx31pdk_defconfig | 40 -
> > configs/mx35pdk_defconfig | 52 -
> > configs/mx51evk_defconfig | 42 -
> > configs/ot1200_defconfig | 55 -
> > configs/ot1200_spl_defconfig | 66 --
> > configs/pcm058_defconfig | 70 --
> > configs/pfla02_defconfig | 71 --
> > configs/riotboard_defconfig | 44 -
> > configs/riotboard_spl_defconfig | 55 -
> > configs/tqma6s_wru4_mmc_defconfig | 81 --
> > configs/ts4800_defconfig | 28 -
> > configs/zc5202_defconfig | 56 -
> > configs/zc5601_defconfig | 54 -
> > include/configs/advantech_dms-ba16.h | 233 -----
> > include/configs/cgtqmx6eval.h | 209 ----
> > include/configs/cm_fx6.h | 7 -
> > include/configs/dh_imx6.h | 6 -
> > include/configs/embestmx6boards.h | 140 ---
> > include/configs/flea3.h | 182 ----
> > include/configs/mx31pdk.h | 141 ---
> > include/configs/mx35pdk.h | 210 ----
> > include/configs/mx51evk.h | 197 ----
> > include/configs/ot1200.h | 99 --
> > include/configs/pcm058.h | 77 --
> > include/configs/pfla02.h | 131 ---
> > include/configs/ts4800.h | 139 ---
> > include/configs/zc5202.h | 27 -
> > include/configs/zc5601.h | 26 -
> > 108 files changed, 11 insertions(+), 10675 deletions(-)
> > delete mode 100644 board/CarMediaLab/flea3/Kconfig
> > delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
> > delete mode 100644 board/CarMediaLab/flea3/Makefile
> > delete mode 100644 board/CarMediaLab/flea3/flea3.c
> > delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
> > delete mode 100644 board/advantech/dms-ba16/Kconfig
> > delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
> > delete mode 100644 board/advantech/dms-ba16/Makefile
> > delete mode 100644 board/advantech/dms-ba16/clocks.cfg
> > delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
> > delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
> > delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
> > delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
> > delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
> > delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
> > delete mode 100644 board/bachmann/ot1200/Kconfig
> > delete mode 100644 board/bachmann/ot1200/MAINTAINERS
> > delete mode 100644 board/bachmann/ot1200/Makefile
> > delete mode 100644 board/bachmann/ot1200/README
> > delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
> > delete mode 100644 board/bachmann/ot1200/ot1200.c
> > delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
> > delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
> > delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
> > delete mode 100644 board/congatec/cgtqmx6eval/Makefile
> > delete mode 100644 board/congatec/cgtqmx6eval/README
> > delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
> > delete mode 100644 board/el/el6x/Kconfig
> > delete mode 100644 board/el/el6x/MAINTAINERS
> > delete mode 100644 board/el/el6x/Makefile
> > delete mode 100644 board/el/el6x/el6x.c
> > delete mode 100644 board/embest/mx6boards/Kconfig
> > delete mode 100644 board/embest/mx6boards/MAINTAINERS
> > delete mode 100644 board/embest/mx6boards/Makefile
> > delete mode 100644 board/embest/mx6boards/mx6boards.c
> > delete mode 100644 board/freescale/mx31pdk/Kconfig
> > delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
> > delete mode 100644 board/freescale/mx31pdk/Makefile
> > delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
> > delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
> > delete mode 100644 board/freescale/mx35pdk/Kconfig
> > delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
> > delete mode 100644 board/freescale/mx35pdk/Makefile
> > delete mode 100644 board/freescale/mx35pdk/README
> > delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
> > delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
> > delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
> > delete mode 100644 board/freescale/mx51evk/Kconfig
> > delete mode 100644 board/freescale/mx51evk/MAINTAINERS
> > delete mode 100644 board/freescale/mx51evk/Makefile
> > delete mode 100644 board/freescale/mx51evk/imximage.cfg
> > delete mode 100644 board/freescale/mx51evk/mx51evk.c
> > delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
> > delete mode 100644 board/phytec/pcm058/Kconfig
> > delete mode 100644 board/phytec/pcm058/MAINTAINERS
> > delete mode 100644 board/phytec/pcm058/Makefile
> > delete mode 100644 board/phytec/pcm058/README
> > delete mode 100644 board/phytec/pcm058/pcm058.c
> > delete mode 100644 board/phytec/pfla02/Kconfig
> > delete mode 100644 board/phytec/pfla02/MAINTAINERS
> > delete mode 100644 board/phytec/pfla02/Makefile
> > delete mode 100644 board/phytec/pfla02/README
> > delete mode 100644 board/phytec/pfla02/pfla02.c
> > delete mode 100644 board/technologic/ts4800/Kconfig
> > delete mode 100644 board/technologic/ts4800/MAINTAINERS
> > delete mode 100644 board/technologic/ts4800/Makefile
> > delete mode 100644 board/technologic/ts4800/ts4800.c
> > delete mode 100644 board/technologic/ts4800/ts4800.h
> > delete mode 100644 configs/cgtqmx6eval_defconfig
> > delete mode 100644 configs/dms-ba16-1g_defconfig
> > delete mode 100644 configs/dms-ba16_defconfig
> > delete mode 100644 configs/flea3_defconfig
> > delete mode 100644 configs/marsboard_defconfig
> > delete mode 100644 configs/mx31pdk_defconfig
> > delete mode 100644 configs/mx35pdk_defconfig
> > delete mode 100644 configs/mx51evk_defconfig
> > delete mode 100644 configs/ot1200_defconfig
> > delete mode 100644 configs/ot1200_spl_defconfig
> > delete mode 100644 configs/pcm058_defconfig
> > delete mode 100644 configs/pfla02_defconfig
> > delete mode 100644 configs/riotboard_defconfig
> > delete mode 100644 configs/riotboard_spl_defconfig
> > delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
> > delete mode 100644 configs/ts4800_defconfig
> > delete mode 100644 configs/zc5202_defconfig
> > delete mode 100644 configs/zc5601_defconfig
> > delete mode 100644 include/configs/advantech_dms-ba16.h
> > delete mode 100644 include/configs/cgtqmx6eval.h
> > delete mode 100644 include/configs/embestmx6boards.h
> > delete mode 100644 include/configs/flea3.h
> > delete mode 100644 include/configs/mx31pdk.h
> > delete mode 100644 include/configs/mx35pdk.h
> > delete mode 100644 include/configs/mx51evk.h
> > delete mode 100644 include/configs/ot1200.h
> > delete mode 100644 include/configs/pcm058.h
> > delete mode 100644 include/configs/pfla02.h
> > delete mode 100644 include/configs/ts4800.h
> > delete mode 100644 include/configs/zc5202.h
> > delete mode 100644 include/configs/zc5601.h
>
> I'm cc'ing more of the i.MX folks here as when this has come up before
> there's been a request to not delete some of these platforms and instead
> to convert them. As of yet, no one has stepped up to maintain and
> convert them so I'm bringing this to a wider audience. Thanks!
Look like no objection for these boards to drop?
Jagan.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-07-08 11:40 ` Jagan Teki
@ 2020-07-08 12:24 ` Fabio Estevam
2020-07-08 12:54 ` Stefano Babic
1 sibling, 0 replies; 38+ messages in thread
From: Fabio Estevam @ 2020-07-08 12:24 UTC (permalink / raw)
To: u-boot
Hi Jagan,
On Wed, Jul 8, 2020 at 8:40 AM Jagan Teki <jagan@amarulasolutions.com> wrote:
> > > 108 files changed, 11 insertions(+), 10675 deletions(-)
> > > delete mode 100644 board/CarMediaLab/flea3/Kconfig
> > > delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
> > > delete mode 100644 board/CarMediaLab/flea3/Makefile
> > > delete mode 100644 board/CarMediaLab/flea3/flea3.c
> > > delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
> > > delete mode 100644 board/advantech/dms-ba16/Kconfig
> > > delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
> > > delete mode 100644 board/advantech/dms-ba16/Makefile
> > > delete mode 100644 board/advantech/dms-ba16/clocks.cfg
> > > delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
> > > delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
> > > delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
> > > delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
> > > delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
> > > delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
> > > delete mode 100644 board/bachmann/ot1200/Kconfig
> > > delete mode 100644 board/bachmann/ot1200/MAINTAINERS
> > > delete mode 100644 board/bachmann/ot1200/Makefile
> > > delete mode 100644 board/bachmann/ot1200/README
> > > delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
> > > delete mode 100644 board/bachmann/ot1200/ot1200.c
> > > delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
> > > delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
> > > delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
> > > delete mode 100644 board/congatec/cgtqmx6eval/Makefile
> > > delete mode 100644 board/congatec/cgtqmx6eval/README
> > > delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
> > > delete mode 100644 board/el/el6x/Kconfig
> > > delete mode 100644 board/el/el6x/MAINTAINERS
> > > delete mode 100644 board/el/el6x/Makefile
> > > delete mode 100644 board/el/el6x/el6x.c
> > > delete mode 100644 board/embest/mx6boards/Kconfig
> > > delete mode 100644 board/embest/mx6boards/MAINTAINERS
> > > delete mode 100644 board/embest/mx6boards/Makefile
> > > delete mode 100644 board/embest/mx6boards/mx6boards.c
> > > delete mode 100644 board/freescale/mx31pdk/Kconfig
> > > delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
> > > delete mode 100644 board/freescale/mx31pdk/Makefile
> > > delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
> > > delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
> > > delete mode 100644 board/freescale/mx35pdk/Kconfig
> > > delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
> > > delete mode 100644 board/freescale/mx35pdk/Makefile
> > > delete mode 100644 board/freescale/mx35pdk/README
> > > delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
> > > delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
> > > delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
> > > delete mode 100644 board/freescale/mx51evk/Kconfig
> > > delete mode 100644 board/freescale/mx51evk/MAINTAINERS
> > > delete mode 100644 board/freescale/mx51evk/Makefile
> > > delete mode 100644 board/freescale/mx51evk/imximage.cfg
> > > delete mode 100644 board/freescale/mx51evk/mx51evk.c
> > > delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
> > > delete mode 100644 board/phytec/pcm058/Kconfig
> > > delete mode 100644 board/phytec/pcm058/MAINTAINERS
> > > delete mode 100644 board/phytec/pcm058/Makefile
> > > delete mode 100644 board/phytec/pcm058/README
> > > delete mode 100644 board/phytec/pcm058/pcm058.c
> > > delete mode 100644 board/phytec/pfla02/Kconfig
> > > delete mode 100644 board/phytec/pfla02/MAINTAINERS
> > > delete mode 100644 board/phytec/pfla02/Makefile
> > > delete mode 100644 board/phytec/pfla02/README
> > > delete mode 100644 board/phytec/pfla02/pfla02.c
> > > delete mode 100644 board/technologic/ts4800/Kconfig
> > > delete mode 100644 board/technologic/ts4800/MAINTAINERS
> > > delete mode 100644 board/technologic/ts4800/Makefile
> > > delete mode 100644 board/technologic/ts4800/ts4800.c
> > > delete mode 100644 board/technologic/ts4800/ts4800.h
> > > delete mode 100644 configs/cgtqmx6eval_defconfig
> > > delete mode 100644 configs/dms-ba16-1g_defconfig
> > > delete mode 100644 configs/dms-ba16_defconfig
> > > delete mode 100644 configs/flea3_defconfig
> > > delete mode 100644 configs/marsboard_defconfig
> > > delete mode 100644 configs/mx31pdk_defconfig
> > > delete mode 100644 configs/mx35pdk_defconfig
> > > delete mode 100644 configs/mx51evk_defconfig
> > > delete mode 100644 configs/ot1200_defconfig
> > > delete mode 100644 configs/ot1200_spl_defconfig
> > > delete mode 100644 configs/pcm058_defconfig
> > > delete mode 100644 configs/pfla02_defconfig
> > > delete mode 100644 configs/riotboard_defconfig
> > > delete mode 100644 configs/riotboard_spl_defconfig
> > > delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
> > > delete mode 100644 configs/ts4800_defconfig
> > > delete mode 100644 configs/zc5202_defconfig
> > > delete mode 100644 configs/zc5601_defconfig
> > > delete mode 100644 include/configs/advantech_dms-ba16.h
> > > delete mode 100644 include/configs/cgtqmx6eval.h
> > > delete mode 100644 include/configs/embestmx6boards.h
> > > delete mode 100644 include/configs/flea3.h
> > > delete mode 100644 include/configs/mx31pdk.h
> > > delete mode 100644 include/configs/mx35pdk.h
> > > delete mode 100644 include/configs/mx51evk.h
> > > delete mode 100644 include/configs/ot1200.h
> > > delete mode 100644 include/configs/pcm058.h
> > > delete mode 100644 include/configs/pfla02.h
> > > delete mode 100644 include/configs/ts4800.h
> > > delete mode 100644 include/configs/zc5202.h
> > > delete mode 100644 include/configs/zc5601.h
> >
> > I'm cc'ing more of the i.MX folks here as when this has come up before
> > there's been a request to not delete some of these platforms and instead
> > to convert them. As of yet, no one has stepped up to maintain and
> > convert them so I'm bringing this to a wider audience. Thanks!
>
> Look like no objection for these boards to drop?
I want to convert mx51evk to DM in this cycle, so please do not remove it.
You missed to copy the board maintainers for the boards that are being
removed. Added some of them.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 05/16] arm: Remove ts4800 board
2020-06-13 13:54 ` [PATCH 05/16] arm: Remove ts4800 board Jagan Teki
@ 2020-07-08 12:53 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 12:53 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Remove it.
>
> Patch-cc: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 06/16] arm: Remove tqma6s_wru4_mmc_defconfig
2020-06-13 13:54 ` [PATCH 06/16] arm: Remove tqma6s_wru4_mmc_defconfig Jagan Teki
@ 2020-07-08 12:54 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 12:54 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this defconfig.
>
> Remove it.
>
> Patch-cc: Markus Niebel <Markus.Niebel@tq-group.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board mainatiner
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-07-08 11:40 ` Jagan Teki
2020-07-08 12:24 ` Fabio Estevam
@ 2020-07-08 12:54 ` Stefano Babic
2020-07-08 18:48 ` Magnus Lilja
2020-07-11 16:53 ` Jagan Teki
1 sibling, 2 replies; 38+ messages in thread
From: Stefano Babic @ 2020-07-08 12:54 UTC (permalink / raw)
To: u-boot
On 08.07.20 13:40, Jagan Teki wrote:
> On Sat, Jun 13, 2020 at 9:11 PM Tom Rini <trini@konsulko.com> wrote:
>>
>> On Sat, Jun 13, 2020 at 07:24:39PM +0530, Jagan Teki wrote:
>>
>>> This series updated boards which are using mxc_spi
>>> driver.
>>>
>>> Series has patches for
>>> 1) DM_SPI/SPI_FLASH enablement for boards which
>>> already support DM and OF_CONTROL.
>>> 2) Drop the boards which doesn't support DM or OF_CONTROL.
>>>
>>> Now it's call for board maintainers to update their
>>> board to use device tree and DM options to alive
>>> on tree before MW.
A couple of boards (pcm058, for example) were already updated. Some
other boards are strongly maintained and I get patches for them (dh6 for
example), so I guess it is enough to CC the board maintainers again
asking to update. We can check later how many boards will still remain.
Best regards,
Stefano
>>>
>>> thanks,
>>> Jagan.
>>>
>>> Jagan Teki (16):
>>> cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
>>> cm_fx6: Switch to full DM-aware
>>> dh_imx6: Switch to full DM-aware
>>> arm: Remove mx51evk board
>>> arm: Remove ts4800 board
>>> arm: Remove tqma6s_wru4_mmc_defconfig
>>> arm: Remove pfla02 board
>>> arm: Remove pcm058 board
>>> arm: Remove riotboard board
>>> arm: Remove zc5202/zc5601 board
>>> arm: Remove cgtqmx6eval board
>>> arm: Remove ot1200 board
>>> arm: Remove dms-ba16 board
>>> arm: Remove configs/mx35pdk_defconfig board
>>> arm: Remove flea3_defconfig board
>>> arm: Remove mx31pdk_defconfig board
>>>
>>> arch/arm/Kconfig | 11 -
>>> arch/arm/mach-imx/mx3/Kconfig | 12 -
>>> arch/arm/mach-imx/mx5/Kconfig | 11 -
>>> arch/arm/mach-imx/mx6/Kconfig | 59 --
>>> board/CarMediaLab/flea3/Kconfig | 15 -
>>> board/CarMediaLab/flea3/MAINTAINERS | 6 -
>>> board/CarMediaLab/flea3/Makefile | 8 -
>>> board/CarMediaLab/flea3/flea3.c | 224 ----
>>> board/CarMediaLab/flea3/lowlevel_init.S | 24 -
>>> board/advantech/dms-ba16/Kconfig | 31 -
>>> board/advantech/dms-ba16/MAINTAINERS | 8 -
>>> board/advantech/dms-ba16/Makefile | 6 -
>>> board/advantech/dms-ba16/clocks.cfg | 25 -
>>> board/advantech/dms-ba16/ddr-setup.cfg | 39 -
>>> board/advantech/dms-ba16/dms-ba16.c | 629 -----------
>>> board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 -
>>> board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 -
>>> board/advantech/dms-ba16/micron-1g.cfg | 63 --
>>> board/advantech/dms-ba16/samsung-2g.cfg | 63 --
>>> board/bachmann/ot1200/Kconfig | 12 -
>>> board/bachmann/ot1200/MAINTAINERS | 6 -
>>> board/bachmann/ot1200/Makefile | 11 -
>>> board/bachmann/ot1200/README | 20 -
>>> board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 ---
>>> board/bachmann/ot1200/ot1200.c | 359 -------
>>> board/bachmann/ot1200/ot1200_spl.c | 152 ---
>>> board/congatec/cgtqmx6eval/Kconfig | 12 -
>>> board/congatec/cgtqmx6eval/MAINTAINERS | 6 -
>>> board/congatec/cgtqmx6eval/Makefile | 8 -
>>> board/congatec/cgtqmx6eval/README | 74 --
>>> board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 --------------------
>>> board/el/el6x/Kconfig | 25 -
>>> board/el/el6x/MAINTAINERS | 8 -
>>> board/el/el6x/Makefile | 5 -
>>> board/el/el6x/el6x.c | 636 ------------
>>> board/embest/mx6boards/Kconfig | 12 -
>>> board/embest/mx6boards/MAINTAINERS | 8 -
>>> board/embest/mx6boards/Makefile | 7 -
>>> board/embest/mx6boards/mx6boards.c | 662 ------------
>>> board/freescale/mx31pdk/Kconfig | 15 -
>>> board/freescale/mx31pdk/MAINTAINERS | 6 -
>>> board/freescale/mx31pdk/Makefile | 11 -
>>> board/freescale/mx31pdk/lowlevel_init.S | 76 --
>>> board/freescale/mx31pdk/mx31pdk.c | 119 ---
>>> board/freescale/mx35pdk/Kconfig | 15 -
>>> board/freescale/mx35pdk/MAINTAINERS | 6 -
>>> board/freescale/mx35pdk/Makefile | 8 -
>>> board/freescale/mx35pdk/README | 114 --
>>> board/freescale/mx35pdk/lowlevel_init.S | 239 -----
>>> board/freescale/mx35pdk/mx35pdk.c | 293 ------
>>> board/freescale/mx35pdk/mx35pdk.h | 41 -
>>> board/freescale/mx51evk/Kconfig | 15 -
>>> board/freescale/mx51evk/MAINTAINERS | 6 -
>>> board/freescale/mx51evk/Makefile | 8 -
>>> board/freescale/mx51evk/imximage.cfg | 108 --
>>> board/freescale/mx51evk/mx51evk.c | 401 -------
>>> board/freescale/mx51evk/mx51evk_video.c | 98 --
>>> board/phytec/pcm058/Kconfig | 12 -
>>> board/phytec/pcm058/MAINTAINERS | 6 -
>>> board/phytec/pcm058/Makefile | 7 -
>>> board/phytec/pcm058/README | 35 -
>>> board/phytec/pcm058/pcm058.c | 571 ----------
>>> board/phytec/pfla02/Kconfig | 18 -
>>> board/phytec/pfla02/MAINTAINERS | 6 -
>>> board/phytec/pfla02/Makefile | 7 -
>>> board/phytec/pfla02/README | 24 -
>>> board/phytec/pfla02/pfla02.c | 713 -------------
>>> board/technologic/ts4800/Kconfig | 15 -
>>> board/technologic/ts4800/MAINTAINERS | 6 -
>>> board/technologic/ts4800/Makefile | 5 -
>>> board/technologic/ts4800/ts4800.c | 262 -----
>>> board/technologic/ts4800/ts4800.h | 15 -
>>> configs/cgtqmx6eval_defconfig | 85 --
>>> configs/cl-som-imx7_defconfig | 7 +-
>>> configs/cm_fx6_defconfig | 3 +
>>> configs/dh_imx6_defconfig | 3 +
>>> configs/dms-ba16-1g_defconfig | 64 --
>>> configs/dms-ba16_defconfig | 63 --
>>> configs/flea3_defconfig | 48 -
>>> configs/marsboard_defconfig | 44 -
>>> configs/mx31pdk_defconfig | 40 -
>>> configs/mx35pdk_defconfig | 52 -
>>> configs/mx51evk_defconfig | 42 -
>>> configs/ot1200_defconfig | 55 -
>>> configs/ot1200_spl_defconfig | 66 --
>>> configs/pcm058_defconfig | 70 --
>>> configs/pfla02_defconfig | 71 --
>>> configs/riotboard_defconfig | 44 -
>>> configs/riotboard_spl_defconfig | 55 -
>>> configs/tqma6s_wru4_mmc_defconfig | 81 --
>>> configs/ts4800_defconfig | 28 -
>>> configs/zc5202_defconfig | 56 -
>>> configs/zc5601_defconfig | 54 -
>>> include/configs/advantech_dms-ba16.h | 233 -----
>>> include/configs/cgtqmx6eval.h | 209 ----
>>> include/configs/cm_fx6.h | 7 -
>>> include/configs/dh_imx6.h | 6 -
>>> include/configs/embestmx6boards.h | 140 ---
>>> include/configs/flea3.h | 182 ----
>>> include/configs/mx31pdk.h | 141 ---
>>> include/configs/mx35pdk.h | 210 ----
>>> include/configs/mx51evk.h | 197 ----
>>> include/configs/ot1200.h | 99 --
>>> include/configs/pcm058.h | 77 --
>>> include/configs/pfla02.h | 131 ---
>>> include/configs/ts4800.h | 139 ---
>>> include/configs/zc5202.h | 27 -
>>> include/configs/zc5601.h | 26 -
>>> 108 files changed, 11 insertions(+), 10675 deletions(-)
>>> delete mode 100644 board/CarMediaLab/flea3/Kconfig
>>> delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
>>> delete mode 100644 board/CarMediaLab/flea3/Makefile
>>> delete mode 100644 board/CarMediaLab/flea3/flea3.c
>>> delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
>>> delete mode 100644 board/advantech/dms-ba16/Kconfig
>>> delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
>>> delete mode 100644 board/advantech/dms-ba16/Makefile
>>> delete mode 100644 board/advantech/dms-ba16/clocks.cfg
>>> delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
>>> delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
>>> delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
>>> delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
>>> delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
>>> delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
>>> delete mode 100644 board/bachmann/ot1200/Kconfig
>>> delete mode 100644 board/bachmann/ot1200/MAINTAINERS
>>> delete mode 100644 board/bachmann/ot1200/Makefile
>>> delete mode 100644 board/bachmann/ot1200/README
>>> delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
>>> delete mode 100644 board/bachmann/ot1200/ot1200.c
>>> delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
>>> delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
>>> delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
>>> delete mode 100644 board/congatec/cgtqmx6eval/Makefile
>>> delete mode 100644 board/congatec/cgtqmx6eval/README
>>> delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
>>> delete mode 100644 board/el/el6x/Kconfig
>>> delete mode 100644 board/el/el6x/MAINTAINERS
>>> delete mode 100644 board/el/el6x/Makefile
>>> delete mode 100644 board/el/el6x/el6x.c
>>> delete mode 100644 board/embest/mx6boards/Kconfig
>>> delete mode 100644 board/embest/mx6boards/MAINTAINERS
>>> delete mode 100644 board/embest/mx6boards/Makefile
>>> delete mode 100644 board/embest/mx6boards/mx6boards.c
>>> delete mode 100644 board/freescale/mx31pdk/Kconfig
>>> delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
>>> delete mode 100644 board/freescale/mx31pdk/Makefile
>>> delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
>>> delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
>>> delete mode 100644 board/freescale/mx35pdk/Kconfig
>>> delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
>>> delete mode 100644 board/freescale/mx35pdk/Makefile
>>> delete mode 100644 board/freescale/mx35pdk/README
>>> delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
>>> delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
>>> delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
>>> delete mode 100644 board/freescale/mx51evk/Kconfig
>>> delete mode 100644 board/freescale/mx51evk/MAINTAINERS
>>> delete mode 100644 board/freescale/mx51evk/Makefile
>>> delete mode 100644 board/freescale/mx51evk/imximage.cfg
>>> delete mode 100644 board/freescale/mx51evk/mx51evk.c
>>> delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
>>> delete mode 100644 board/phytec/pcm058/Kconfig
>>> delete mode 100644 board/phytec/pcm058/MAINTAINERS
>>> delete mode 100644 board/phytec/pcm058/Makefile
>>> delete mode 100644 board/phytec/pcm058/README
>>> delete mode 100644 board/phytec/pcm058/pcm058.c
>>> delete mode 100644 board/phytec/pfla02/Kconfig
>>> delete mode 100644 board/phytec/pfla02/MAINTAINERS
>>> delete mode 100644 board/phytec/pfla02/Makefile
>>> delete mode 100644 board/phytec/pfla02/README
>>> delete mode 100644 board/phytec/pfla02/pfla02.c
>>> delete mode 100644 board/technologic/ts4800/Kconfig
>>> delete mode 100644 board/technologic/ts4800/MAINTAINERS
>>> delete mode 100644 board/technologic/ts4800/Makefile
>>> delete mode 100644 board/technologic/ts4800/ts4800.c
>>> delete mode 100644 board/technologic/ts4800/ts4800.h
>>> delete mode 100644 configs/cgtqmx6eval_defconfig
>>> delete mode 100644 configs/dms-ba16-1g_defconfig
>>> delete mode 100644 configs/dms-ba16_defconfig
>>> delete mode 100644 configs/flea3_defconfig
>>> delete mode 100644 configs/marsboard_defconfig
>>> delete mode 100644 configs/mx31pdk_defconfig
>>> delete mode 100644 configs/mx35pdk_defconfig
>>> delete mode 100644 configs/mx51evk_defconfig
>>> delete mode 100644 configs/ot1200_defconfig
>>> delete mode 100644 configs/ot1200_spl_defconfig
>>> delete mode 100644 configs/pcm058_defconfig
>>> delete mode 100644 configs/pfla02_defconfig
>>> delete mode 100644 configs/riotboard_defconfig
>>> delete mode 100644 configs/riotboard_spl_defconfig
>>> delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
>>> delete mode 100644 configs/ts4800_defconfig
>>> delete mode 100644 configs/zc5202_defconfig
>>> delete mode 100644 configs/zc5601_defconfig
>>> delete mode 100644 include/configs/advantech_dms-ba16.h
>>> delete mode 100644 include/configs/cgtqmx6eval.h
>>> delete mode 100644 include/configs/embestmx6boards.h
>>> delete mode 100644 include/configs/flea3.h
>>> delete mode 100644 include/configs/mx31pdk.h
>>> delete mode 100644 include/configs/mx35pdk.h
>>> delete mode 100644 include/configs/mx51evk.h
>>> delete mode 100644 include/configs/ot1200.h
>>> delete mode 100644 include/configs/pcm058.h
>>> delete mode 100644 include/configs/pfla02.h
>>> delete mode 100644 include/configs/ts4800.h
>>> delete mode 100644 include/configs/zc5202.h
>>> delete mode 100644 include/configs/zc5601.h
>>
>> I'm cc'ing more of the i.MX folks here as when this has come up before
>> there's been a request to not delete some of these platforms and instead
>> to convert them. As of yet, no one has stepped up to maintain and
>> convert them so I'm bringing this to a wider audience. Thanks!
>
> Look like no objection for these boards to drop?
>
> Jagan.
>
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 07/16] arm: Remove pfla02 board
2020-06-13 13:54 ` [PATCH 07/16] arm: Remove pfla02 board Jagan Teki
@ 2020-07-08 12:55 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 12:55 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Remove it.
>
> Patch-cc: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 09/16] arm: Remove riotboard board
2020-06-13 13:54 ` [PATCH 09/16] arm: Remove riotboard board Jagan Teki
@ 2020-07-08 12:58 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 12:58 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Remove it.
>
> Patch-cc: Eric B?nard <eric@eukrea.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 10/16] arm: Remove zc5202/zc5601 board
2020-06-13 13:54 ` [PATCH 10/16] arm: Remove zc5202/zc5601 board Jagan Teki
@ 2020-07-08 12:59 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 12:59 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Patch-cc: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 11/16] arm: Remove cgtqmx6eval board
2020-06-13 13:54 ` [PATCH 11/16] arm: Remove cgtqmx6eval board Jagan Teki
@ 2020-07-08 13:00 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 13:00 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Remove it.
>
> Patch-cc: Otavio Salvador <otavio@ossystems.com.br>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 12/16] arm: Remove ot1200 board
2020-06-13 13:54 ` [PATCH 12/16] arm: Remove ot1200 board Jagan Teki
@ 2020-07-08 13:00 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 13:00 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Remove it.
>
> Patch-cc: Christian Gmeiner <christian.gmeiner@gmail.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 13/16] arm: Remove dms-ba16 board
2020-06-13 13:54 ` [PATCH 13/16] arm: Remove dms-ba16 board Jagan Teki
@ 2020-07-08 13:01 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 13:01 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Remove it.
>
> Patch-cc: Akshay Bhat <akshaybhat@timesys.com>
> Patch-cc: Ken Lin <Ken.Lin@advantech.com.tw>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 14/16] arm: Remove configs/mx35pdk_defconfig board
2020-06-13 13:54 ` [PATCH 14/16] arm: Remove configs/mx35pdk_defconfig board Jagan Teki
@ 2020-07-08 13:02 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 13:02 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> DM, OF_CONTROL, DM_SPI and other driver model migration
> deadlines are expired for this board.
>
> Remove it.
>
> Patch-cc: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 15/16] arm: Remove flea3_defconfig board
2020-06-13 13:54 ` [PATCH 15/16] arm: Remove flea3_defconfig board Jagan Teki
@ 2020-07-08 13:03 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 13:03 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> DM, OF_CONTROL, DM_SPI and other driver model migration
> deadlines are expired for this board.
>
> Remove it.
>
> Patch-cc: Stefano Babic <sbabic@denx.de>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 16/16] arm: Remove mx31pdk_defconfig board
2020-06-13 13:54 ` [PATCH 16/16] arm: Remove mx31pdk_defconfig board Jagan Teki
@ 2020-07-08 13:04 ` Jagan Teki
2020-07-08 18:49 ` Magnus Lilja
0 siblings, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-07-08 13:04 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:26 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> DM, OF_CONTROL, DM_SPI and other driver model migration
> deadlines are expired for this board.
>
> Remove it.
>
> Patch-cc: Magnus Lilja <lilja.magnus@gmail.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Added board maintainer.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-07-08 12:54 ` Stefano Babic
@ 2020-07-08 18:48 ` Magnus Lilja
2020-07-11 16:53 ` Jagan Teki
1 sibling, 0 replies; 38+ messages in thread
From: Magnus Lilja @ 2020-07-08 18:48 UTC (permalink / raw)
To: u-boot
On Wed, 8 Jul 2020 at 14:55, Stefano Babic <sbabic@denx.de> wrote:
>
> On 08.07.20 13:40, Jagan Teki wrote:
> > On Sat, Jun 13, 2020 at 9:11 PM Tom Rini <trini@konsulko.com> wrote:
> >>
> >> On Sat, Jun 13, 2020 at 07:24:39PM +0530, Jagan Teki wrote:
> >>
> >>> This series updated boards which are using mxc_spi
> >>> driver.
> >>>
> >>> Series has patches for
> >>> 1) DM_SPI/SPI_FLASH enablement for boards which
> >>> already support DM and OF_CONTROL.
> >>> 2) Drop the boards which doesn't support DM or OF_CONTROL.
> >>>
> >>> Now it's call for board maintainers to update their
> >>> board to use device tree and DM options to alive
> >>> on tree before MW.
>
> A couple of boards (pcm058, for example) were already updated. Some
> other boards are strongly maintained and I get patches for them (dh6 for
> example), so I guess it is enough to CC the board maintainers again
> asking to update. We can check later how many boards will still remain.
>
> Best regards,
> Stefano
I don't think I have the possibility to bring i.MX31 PDK uptodate in
the near future. Also I currently don't have access to a JTAG
programmer so reprogramming u-boot on my hardware without is a bit
risky.
Best regards, Magnus
>
>
> >>>
> >>> thanks,
> >>> Jagan.
> >>>
> >>> Jagan Teki (16):
> >>> cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
> >>> cm_fx6: Switch to full DM-aware
> >>> dh_imx6: Switch to full DM-aware
> >>> arm: Remove mx51evk board
> >>> arm: Remove ts4800 board
> >>> arm: Remove tqma6s_wru4_mmc_defconfig
> >>> arm: Remove pfla02 board
> >>> arm: Remove pcm058 board
> >>> arm: Remove riotboard board
> >>> arm: Remove zc5202/zc5601 board
> >>> arm: Remove cgtqmx6eval board
> >>> arm: Remove ot1200 board
> >>> arm: Remove dms-ba16 board
> >>> arm: Remove configs/mx35pdk_defconfig board
> >>> arm: Remove flea3_defconfig board
> >>> arm: Remove mx31pdk_defconfig board
> >>>
> >>> arch/arm/Kconfig | 11 -
> >>> arch/arm/mach-imx/mx3/Kconfig | 12 -
> >>> arch/arm/mach-imx/mx5/Kconfig | 11 -
> >>> arch/arm/mach-imx/mx6/Kconfig | 59 --
> >>> board/CarMediaLab/flea3/Kconfig | 15 -
> >>> board/CarMediaLab/flea3/MAINTAINERS | 6 -
> >>> board/CarMediaLab/flea3/Makefile | 8 -
> >>> board/CarMediaLab/flea3/flea3.c | 224 ----
> >>> board/CarMediaLab/flea3/lowlevel_init.S | 24 -
> >>> board/advantech/dms-ba16/Kconfig | 31 -
> >>> board/advantech/dms-ba16/MAINTAINERS | 8 -
> >>> board/advantech/dms-ba16/Makefile | 6 -
> >>> board/advantech/dms-ba16/clocks.cfg | 25 -
> >>> board/advantech/dms-ba16/ddr-setup.cfg | 39 -
> >>> board/advantech/dms-ba16/dms-ba16.c | 629 -----------
> >>> board/advantech/dms-ba16/dms-ba16_1g.cfg | 24 -
> >>> board/advantech/dms-ba16/dms-ba16_2g.cfg | 24 -
> >>> board/advantech/dms-ba16/micron-1g.cfg | 63 --
> >>> board/advantech/dms-ba16/samsung-2g.cfg | 63 --
> >>> board/bachmann/ot1200/Kconfig | 12 -
> >>> board/bachmann/ot1200/MAINTAINERS | 6 -
> >>> board/bachmann/ot1200/Makefile | 11 -
> >>> board/bachmann/ot1200/README | 20 -
> >>> board/bachmann/ot1200/mx6q_4x_mt41j128.cfg | 154 ---
> >>> board/bachmann/ot1200/ot1200.c | 359 -------
> >>> board/bachmann/ot1200/ot1200_spl.c | 152 ---
> >>> board/congatec/cgtqmx6eval/Kconfig | 12 -
> >>> board/congatec/cgtqmx6eval/MAINTAINERS | 6 -
> >>> board/congatec/cgtqmx6eval/Makefile | 8 -
> >>> board/congatec/cgtqmx6eval/README | 74 --
> >>> board/congatec/cgtqmx6eval/cgtqmx6eval.c | 1091 --------------------
> >>> board/el/el6x/Kconfig | 25 -
> >>> board/el/el6x/MAINTAINERS | 8 -
> >>> board/el/el6x/Makefile | 5 -
> >>> board/el/el6x/el6x.c | 636 ------------
> >>> board/embest/mx6boards/Kconfig | 12 -
> >>> board/embest/mx6boards/MAINTAINERS | 8 -
> >>> board/embest/mx6boards/Makefile | 7 -
> >>> board/embest/mx6boards/mx6boards.c | 662 ------------
> >>> board/freescale/mx31pdk/Kconfig | 15 -
> >>> board/freescale/mx31pdk/MAINTAINERS | 6 -
> >>> board/freescale/mx31pdk/Makefile | 11 -
> >>> board/freescale/mx31pdk/lowlevel_init.S | 76 --
> >>> board/freescale/mx31pdk/mx31pdk.c | 119 ---
> >>> board/freescale/mx35pdk/Kconfig | 15 -
> >>> board/freescale/mx35pdk/MAINTAINERS | 6 -
> >>> board/freescale/mx35pdk/Makefile | 8 -
> >>> board/freescale/mx35pdk/README | 114 --
> >>> board/freescale/mx35pdk/lowlevel_init.S | 239 -----
> >>> board/freescale/mx35pdk/mx35pdk.c | 293 ------
> >>> board/freescale/mx35pdk/mx35pdk.h | 41 -
> >>> board/freescale/mx51evk/Kconfig | 15 -
> >>> board/freescale/mx51evk/MAINTAINERS | 6 -
> >>> board/freescale/mx51evk/Makefile | 8 -
> >>> board/freescale/mx51evk/imximage.cfg | 108 --
> >>> board/freescale/mx51evk/mx51evk.c | 401 -------
> >>> board/freescale/mx51evk/mx51evk_video.c | 98 --
> >>> board/phytec/pcm058/Kconfig | 12 -
> >>> board/phytec/pcm058/MAINTAINERS | 6 -
> >>> board/phytec/pcm058/Makefile | 7 -
> >>> board/phytec/pcm058/README | 35 -
> >>> board/phytec/pcm058/pcm058.c | 571 ----------
> >>> board/phytec/pfla02/Kconfig | 18 -
> >>> board/phytec/pfla02/MAINTAINERS | 6 -
> >>> board/phytec/pfla02/Makefile | 7 -
> >>> board/phytec/pfla02/README | 24 -
> >>> board/phytec/pfla02/pfla02.c | 713 -------------
> >>> board/technologic/ts4800/Kconfig | 15 -
> >>> board/technologic/ts4800/MAINTAINERS | 6 -
> >>> board/technologic/ts4800/Makefile | 5 -
> >>> board/technologic/ts4800/ts4800.c | 262 -----
> >>> board/technologic/ts4800/ts4800.h | 15 -
> >>> configs/cgtqmx6eval_defconfig | 85 --
> >>> configs/cl-som-imx7_defconfig | 7 +-
> >>> configs/cm_fx6_defconfig | 3 +
> >>> configs/dh_imx6_defconfig | 3 +
> >>> configs/dms-ba16-1g_defconfig | 64 --
> >>> configs/dms-ba16_defconfig | 63 --
> >>> configs/flea3_defconfig | 48 -
> >>> configs/marsboard_defconfig | 44 -
> >>> configs/mx31pdk_defconfig | 40 -
> >>> configs/mx35pdk_defconfig | 52 -
> >>> configs/mx51evk_defconfig | 42 -
> >>> configs/ot1200_defconfig | 55 -
> >>> configs/ot1200_spl_defconfig | 66 --
> >>> configs/pcm058_defconfig | 70 --
> >>> configs/pfla02_defconfig | 71 --
> >>> configs/riotboard_defconfig | 44 -
> >>> configs/riotboard_spl_defconfig | 55 -
> >>> configs/tqma6s_wru4_mmc_defconfig | 81 --
> >>> configs/ts4800_defconfig | 28 -
> >>> configs/zc5202_defconfig | 56 -
> >>> configs/zc5601_defconfig | 54 -
> >>> include/configs/advantech_dms-ba16.h | 233 -----
> >>> include/configs/cgtqmx6eval.h | 209 ----
> >>> include/configs/cm_fx6.h | 7 -
> >>> include/configs/dh_imx6.h | 6 -
> >>> include/configs/embestmx6boards.h | 140 ---
> >>> include/configs/flea3.h | 182 ----
> >>> include/configs/mx31pdk.h | 141 ---
> >>> include/configs/mx35pdk.h | 210 ----
> >>> include/configs/mx51evk.h | 197 ----
> >>> include/configs/ot1200.h | 99 --
> >>> include/configs/pcm058.h | 77 --
> >>> include/configs/pfla02.h | 131 ---
> >>> include/configs/ts4800.h | 139 ---
> >>> include/configs/zc5202.h | 27 -
> >>> include/configs/zc5601.h | 26 -
> >>> 108 files changed, 11 insertions(+), 10675 deletions(-)
> >>> delete mode 100644 board/CarMediaLab/flea3/Kconfig
> >>> delete mode 100644 board/CarMediaLab/flea3/MAINTAINERS
> >>> delete mode 100644 board/CarMediaLab/flea3/Makefile
> >>> delete mode 100644 board/CarMediaLab/flea3/flea3.c
> >>> delete mode 100644 board/CarMediaLab/flea3/lowlevel_init.S
> >>> delete mode 100644 board/advantech/dms-ba16/Kconfig
> >>> delete mode 100644 board/advantech/dms-ba16/MAINTAINERS
> >>> delete mode 100644 board/advantech/dms-ba16/Makefile
> >>> delete mode 100644 board/advantech/dms-ba16/clocks.cfg
> >>> delete mode 100644 board/advantech/dms-ba16/ddr-setup.cfg
> >>> delete mode 100644 board/advantech/dms-ba16/dms-ba16.c
> >>> delete mode 100644 board/advantech/dms-ba16/dms-ba16_1g.cfg
> >>> delete mode 100644 board/advantech/dms-ba16/dms-ba16_2g.cfg
> >>> delete mode 100644 board/advantech/dms-ba16/micron-1g.cfg
> >>> delete mode 100644 board/advantech/dms-ba16/samsung-2g.cfg
> >>> delete mode 100644 board/bachmann/ot1200/Kconfig
> >>> delete mode 100644 board/bachmann/ot1200/MAINTAINERS
> >>> delete mode 100644 board/bachmann/ot1200/Makefile
> >>> delete mode 100644 board/bachmann/ot1200/README
> >>> delete mode 100644 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
> >>> delete mode 100644 board/bachmann/ot1200/ot1200.c
> >>> delete mode 100644 board/bachmann/ot1200/ot1200_spl.c
> >>> delete mode 100644 board/congatec/cgtqmx6eval/Kconfig
> >>> delete mode 100644 board/congatec/cgtqmx6eval/MAINTAINERS
> >>> delete mode 100644 board/congatec/cgtqmx6eval/Makefile
> >>> delete mode 100644 board/congatec/cgtqmx6eval/README
> >>> delete mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
> >>> delete mode 100644 board/el/el6x/Kconfig
> >>> delete mode 100644 board/el/el6x/MAINTAINERS
> >>> delete mode 100644 board/el/el6x/Makefile
> >>> delete mode 100644 board/el/el6x/el6x.c
> >>> delete mode 100644 board/embest/mx6boards/Kconfig
> >>> delete mode 100644 board/embest/mx6boards/MAINTAINERS
> >>> delete mode 100644 board/embest/mx6boards/Makefile
> >>> delete mode 100644 board/embest/mx6boards/mx6boards.c
> >>> delete mode 100644 board/freescale/mx31pdk/Kconfig
> >>> delete mode 100644 board/freescale/mx31pdk/MAINTAINERS
> >>> delete mode 100644 board/freescale/mx31pdk/Makefile
> >>> delete mode 100644 board/freescale/mx31pdk/lowlevel_init.S
> >>> delete mode 100644 board/freescale/mx31pdk/mx31pdk.c
> >>> delete mode 100644 board/freescale/mx35pdk/Kconfig
> >>> delete mode 100644 board/freescale/mx35pdk/MAINTAINERS
> >>> delete mode 100644 board/freescale/mx35pdk/Makefile
> >>> delete mode 100644 board/freescale/mx35pdk/README
> >>> delete mode 100644 board/freescale/mx35pdk/lowlevel_init.S
> >>> delete mode 100644 board/freescale/mx35pdk/mx35pdk.c
> >>> delete mode 100644 board/freescale/mx35pdk/mx35pdk.h
> >>> delete mode 100644 board/freescale/mx51evk/Kconfig
> >>> delete mode 100644 board/freescale/mx51evk/MAINTAINERS
> >>> delete mode 100644 board/freescale/mx51evk/Makefile
> >>> delete mode 100644 board/freescale/mx51evk/imximage.cfg
> >>> delete mode 100644 board/freescale/mx51evk/mx51evk.c
> >>> delete mode 100644 board/freescale/mx51evk/mx51evk_video.c
> >>> delete mode 100644 board/phytec/pcm058/Kconfig
> >>> delete mode 100644 board/phytec/pcm058/MAINTAINERS
> >>> delete mode 100644 board/phytec/pcm058/Makefile
> >>> delete mode 100644 board/phytec/pcm058/README
> >>> delete mode 100644 board/phytec/pcm058/pcm058.c
> >>> delete mode 100644 board/phytec/pfla02/Kconfig
> >>> delete mode 100644 board/phytec/pfla02/MAINTAINERS
> >>> delete mode 100644 board/phytec/pfla02/Makefile
> >>> delete mode 100644 board/phytec/pfla02/README
> >>> delete mode 100644 board/phytec/pfla02/pfla02.c
> >>> delete mode 100644 board/technologic/ts4800/Kconfig
> >>> delete mode 100644 board/technologic/ts4800/MAINTAINERS
> >>> delete mode 100644 board/technologic/ts4800/Makefile
> >>> delete mode 100644 board/technologic/ts4800/ts4800.c
> >>> delete mode 100644 board/technologic/ts4800/ts4800.h
> >>> delete mode 100644 configs/cgtqmx6eval_defconfig
> >>> delete mode 100644 configs/dms-ba16-1g_defconfig
> >>> delete mode 100644 configs/dms-ba16_defconfig
> >>> delete mode 100644 configs/flea3_defconfig
> >>> delete mode 100644 configs/marsboard_defconfig
> >>> delete mode 100644 configs/mx31pdk_defconfig
> >>> delete mode 100644 configs/mx35pdk_defconfig
> >>> delete mode 100644 configs/mx51evk_defconfig
> >>> delete mode 100644 configs/ot1200_defconfig
> >>> delete mode 100644 configs/ot1200_spl_defconfig
> >>> delete mode 100644 configs/pcm058_defconfig
> >>> delete mode 100644 configs/pfla02_defconfig
> >>> delete mode 100644 configs/riotboard_defconfig
> >>> delete mode 100644 configs/riotboard_spl_defconfig
> >>> delete mode 100644 configs/tqma6s_wru4_mmc_defconfig
> >>> delete mode 100644 configs/ts4800_defconfig
> >>> delete mode 100644 configs/zc5202_defconfig
> >>> delete mode 100644 configs/zc5601_defconfig
> >>> delete mode 100644 include/configs/advantech_dms-ba16.h
> >>> delete mode 100644 include/configs/cgtqmx6eval.h
> >>> delete mode 100644 include/configs/embestmx6boards.h
> >>> delete mode 100644 include/configs/flea3.h
> >>> delete mode 100644 include/configs/mx31pdk.h
> >>> delete mode 100644 include/configs/mx35pdk.h
> >>> delete mode 100644 include/configs/mx51evk.h
> >>> delete mode 100644 include/configs/ot1200.h
> >>> delete mode 100644 include/configs/pcm058.h
> >>> delete mode 100644 include/configs/pfla02.h
> >>> delete mode 100644 include/configs/ts4800.h
> >>> delete mode 100644 include/configs/zc5202.h
> >>> delete mode 100644 include/configs/zc5601.h
> >>
> >> I'm cc'ing more of the i.MX folks here as when this has come up before
> >> there's been a request to not delete some of these platforms and instead
> >> to convert them. As of yet, no one has stepped up to maintain and
> >> convert them so I'm bringing this to a wider audience. Thanks!
> >
> > Look like no objection for these boards to drop?
> >
> > Jagan.
> >
>
>
> --
> =====================================================================
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
> =====================================================================
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 16/16] arm: Remove mx31pdk_defconfig board
2020-07-08 13:04 ` Jagan Teki
@ 2020-07-08 18:49 ` Magnus Lilja
0 siblings, 0 replies; 38+ messages in thread
From: Magnus Lilja @ 2020-07-08 18:49 UTC (permalink / raw)
To: u-boot
On Wed, 8 Jul 2020 at 15:04, Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> On Sat, Jun 13, 2020 at 7:26 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
> >
> > DM, OF_CONTROL, DM_SPI and other driver model migration
> > deadlines are expired for this board.
> >
> > Remove it.
> >
> > Patch-cc: Magnus Lilja <lilja.magnus@gmail.com>
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
>
> Added board maintainer.
Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Regards, Magnus
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-07-08 12:54 ` Stefano Babic
2020-07-08 18:48 ` Magnus Lilja
@ 2020-07-11 16:53 ` Jagan Teki
2020-10-23 18:22 ` Jagan Teki
1 sibling, 1 reply; 38+ messages in thread
From: Jagan Teki @ 2020-07-11 16:53 UTC (permalink / raw)
To: u-boot
On Wed, Jul 8, 2020 at 6:25 PM Stefano Babic <sbabic@denx.de> wrote:
>
> On 08.07.20 13:40, Jagan Teki wrote:
> > On Sat, Jun 13, 2020 at 9:11 PM Tom Rini <trini@konsulko.com> wrote:
> >>
> >> On Sat, Jun 13, 2020 at 07:24:39PM +0530, Jagan Teki wrote:
> >>
> >>> This series updated boards which are using mxc_spi
> >>> driver.
> >>>
> >>> Series has patches for
> >>> 1) DM_SPI/SPI_FLASH enablement for boards which
> >>> already support DM and OF_CONTROL.
> >>> 2) Drop the boards which doesn't support DM or OF_CONTROL.
> >>>
> >>> Now it's call for board maintainers to update their
> >>> board to use device tree and DM options to alive
> >>> on tree before MW.
>
> A couple of boards (pcm058, for example) were already updated. Some
> other boards are strongly maintained and I get patches for them (dh6 for
> example), so I guess it is enough to CC the board maintainers again
> asking to update. We can check later how many boards will still remain.
Thanks. I have marked the missing board maintainers. Hope to resolve
this before MW.
Jagan.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
2020-06-13 13:54 ` [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH Jagan Teki
@ 2020-10-23 8:28 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-10-23 8:28 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> Enable DM_SPI/DM_SPI_FLASH with associated config
> options.
>
> Build fine, but not tested.
>
> Patch-cc: Uri Mashiach <uri.mashiach@compulab.co.il>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Applied to u-boot-spi/master
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 02/16] cm_fx6: Switch to full DM-aware
2020-06-13 13:54 ` [PATCH 02/16] cm_fx6: Switch to full DM-aware Jagan Teki
@ 2020-10-23 8:28 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-10-23 8:28 UTC (permalink / raw)
To: u-boot
On Sat, Jun 13, 2020 at 7:25 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> Enable DM_SPI/DM_SPI_FLASH with a related config option.
>
> Build fine, but not tested.
>
> Patch-cc: Nikita Kiryanov <nikita@compulab.co.il>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
Applied to u-boot-spi/master
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 00/16] spi: dm-conversion (part3)
2020-07-11 16:53 ` Jagan Teki
@ 2020-10-23 18:22 ` Jagan Teki
0 siblings, 0 replies; 38+ messages in thread
From: Jagan Teki @ 2020-10-23 18:22 UTC (permalink / raw)
To: u-boot
On Sat, Jul 11, 2020 at 10:23 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> On Wed, Jul 8, 2020 at 6:25 PM Stefano Babic <sbabic@denx.de> wrote:
> >
> > On 08.07.20 13:40, Jagan Teki wrote:
> > > On Sat, Jun 13, 2020 at 9:11 PM Tom Rini <trini@konsulko.com> wrote:
> > >>
> > >> On Sat, Jun 13, 2020 at 07:24:39PM +0530, Jagan Teki wrote:
> > >>
> > >>> This series updated boards which are using mxc_spi
> > >>> driver.
> > >>>
> > >>> Series has patches for
> > >>> 1) DM_SPI/SPI_FLASH enablement for boards which
> > >>> already support DM and OF_CONTROL.
> > >>> 2) Drop the boards which doesn't support DM or OF_CONTROL.
> > >>>
> > >>> Now it's call for board maintainers to update their
> > >>> board to use device tree and DM options to alive
> > >>> on tree before MW.
> >
> > A couple of boards (pcm058, for example) were already updated. Some
> > other boards are strongly maintained and I get patches for them (dh6 for
> > example), so I guess it is enough to CC the board maintainers again
> > asking to update. We can check later how many boards will still remain.
>
> Thanks. I have marked the missing board maintainers. Hope to resolve
> this before MW.
Look like no issues with removing few boards on this series. preparing
to merge soon.
Jagan.
^ permalink raw reply [flat|nested] 38+ messages in thread
end of thread, other threads:[~2020-10-23 18:22 UTC | newest]
Thread overview: 38+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-13 13:54 [PATCH 00/16] spi: dm-conversion (part3) Jagan Teki
2020-06-13 13:54 ` [PATCH 01/16] cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH Jagan Teki
2020-10-23 8:28 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 02/16] cm_fx6: Switch to full DM-aware Jagan Teki
2020-10-23 8:28 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 03/16] dh_imx6: " Jagan Teki
2020-06-13 13:54 ` [PATCH 04/16] arm: Remove mx51evk board Jagan Teki
2020-06-13 13:54 ` [PATCH 05/16] arm: Remove ts4800 board Jagan Teki
2020-07-08 12:53 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 06/16] arm: Remove tqma6s_wru4_mmc_defconfig Jagan Teki
2020-07-08 12:54 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 07/16] arm: Remove pfla02 board Jagan Teki
2020-07-08 12:55 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 08/16] arm: Remove pcm058 board Jagan Teki
2020-06-13 13:54 ` [PATCH 09/16] arm: Remove riotboard board Jagan Teki
2020-07-08 12:58 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 10/16] arm: Remove zc5202/zc5601 board Jagan Teki
2020-07-08 12:59 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 11/16] arm: Remove cgtqmx6eval board Jagan Teki
2020-07-08 13:00 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 12/16] arm: Remove ot1200 board Jagan Teki
2020-07-08 13:00 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 13/16] arm: Remove dms-ba16 board Jagan Teki
2020-07-08 13:01 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 14/16] arm: Remove configs/mx35pdk_defconfig board Jagan Teki
2020-07-08 13:02 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 15/16] arm: Remove flea3_defconfig board Jagan Teki
2020-07-08 13:03 ` Jagan Teki
2020-06-13 13:54 ` [PATCH 16/16] arm: Remove mx31pdk_defconfig board Jagan Teki
2020-07-08 13:04 ` Jagan Teki
2020-07-08 18:49 ` Magnus Lilja
2020-06-13 15:41 ` [PATCH 00/16] spi: dm-conversion (part3) Tom Rini
2020-07-08 11:40 ` Jagan Teki
2020-07-08 12:24 ` Fabio Estevam
2020-07-08 12:54 ` Stefano Babic
2020-07-08 18:48 ` Magnus Lilja
2020-07-11 16:53 ` Jagan Teki
2020-10-23 18:22 ` Jagan Teki
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