[PATCH 0/2] Rename RZ/G2L SDHI clocks

[PATCH 0/2] Rename RZ/G2L SDHI clocks

[Biju Das]

RZ/G2L SDHI has 4 clocks which is controlled by PM frame work and is using
Gen3 compatible string. Now the clock factorisation happened on highspeed
clock handling and it changes to fallback by getting parent clock, if
"clkh" is not specified in device tree.

This path series rename the clocks to match with the clock names used in
R-Car Gen2 and later generations. This will avoid driver changes related
to clock names.

This patch series based on renesas-devel

Biju Das (2):
  dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
  arm64: dts: renesas: r9a07g044: Rename SDHI clocks

 .../devicetree/bindings/mmc/renesas,sdhi.yaml          | 10 +++++-----
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi             |  8 ++++----
 2 files changed, 9 insertions(+), 9 deletions(-)

-- 
2.17.1

[PATCH 1/2] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks

[Biju Das]

Rename the below RZ/G2L clocks to match with the clock names used in
R-Car Gen2 and later generations.

 imclk->core
 clk_hs->clkh
 imclk2->cd

This changes will avoid using fallback for RZ/G2L high speed clock,
if "clkh" is not used in device tree and also the code changes in
driver related to this clocks.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Note:
 This patch series based on renesas-devel and depend upon [1]

 [1] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/commit/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?id=e051025efac3929ca7e3e2f2c8860d3447366ebc
---
 .../devicetree/bindings/mmc/renesas,sdhi.yaml          | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index f5107a641790..9ce6e06c19db 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -113,17 +113,17 @@ allOf:
         clocks:
           items:
             - description: IMCLK, SDHI channel main clock1.
+            - description: CLK_HS, SDHI channel High speed clock which operates
+                           4 times that of SDHI channel main clock1.
             - description: IMCLK2, SDHI channel main clock2. When this clock is
                            turned off, external SD card detection cannot be
                            detected.
-            - description: CLK_HS, SDHI channel High speed clock which operates
-                           4 times that of SDHI channel main clock1.
             - description: ACLK, SDHI channel bus clock.
         clock-names:
           items:
-            - const: imclk
-            - const: imclk2
-            - const: clk_hs
+            - const: core
+            - const: clkh
+            - const: cd
             - const: aclk
       required:
         - clock-names
-- 
2.17.1

[PATCH 2/2] arm64: dts: renesas: r9a07g044: Rename SDHI clocks

[Biju Das]

Rename the below SDHI clocks to match with the clocks used in driver.

     imclk->core
     clk_hs->clkh
     imclk2->cd

Also re-arrange the clocks to match with the sorting order used in the
binding document.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 2dd6eff471cb..6d7dc4785161 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -613,10 +613,10 @@
 			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK>,
-				 <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
 				 <&cpg CPG_MOD R9A07G044_SDHI0_CLK_HS>,
+				 <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
 				 <&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
-			clock-names = "imclk", "imclk2", "clk_hs", "aclk";
+			clock-names = "core", "clkh", "cd", "aclk";
 			resets = <&cpg R9A07G044_SDHI0_IXRST>;
 			power-domains = <&cpg>;
 			status = "disabled";
@@ -629,10 +629,10 @@
 			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK>,
-				 <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
 				 <&cpg CPG_MOD R9A07G044_SDHI1_CLK_HS>,
+				 <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
 				 <&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
-			clock-names = "imclk", "imclk2", "clk_hs", "aclk";
+			clock-names = "core", "clkh", "cd", "aclk";
 			resets = <&cpg R9A07G044_SDHI1_IXRST>;
 			power-domains = <&cpg>;
 			status = "disabled";
-- 
2.17.1

Re: [PATCH 1/2] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks

[Wolfram Sang]

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On Mon, Nov 22, 2021 at 10:39:04AM +0000, Biju Das wrote:
> Rename the below RZ/G2L clocks to match with the clock names used in
> R-Car Gen2 and later generations.
> 
>  imclk->core
>  clk_hs->clkh
>  imclk2->cd
> 
> This changes will avoid using fallback for RZ/G2L high speed clock,
> if "clkh" is not used in device tree and also the code changes in
> driver related to this clocks.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

The bindings match what we discussed. Thanks!

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>


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Re: [PATCH 0/2] Rename RZ/G2L SDHI clocks

[Ulf Hansson]

On Mon, 22 Nov 2021 at 11:39, Biju Das <biju.das.jz@bp.renesas.com> wrote:
>
> RZ/G2L SDHI has 4 clocks which is controlled by PM frame work and is using
> Gen3 compatible string. Now the clock factorisation happened on highspeed
> clock handling and it changes to fallback by getting parent clock, if
> "clkh" is not specified in device tree.
>
> This path series rename the clocks to match with the clock names used in
> R-Car Gen2 and later generations. This will avoid driver changes related
> to clock names.
>
> This patch series based on renesas-devel

Acked-by: Ulf Hansson <ulf.hansson@linaro.org>

Kind regards
Uffe

>
> Biju Das (2):
>   dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
>   arm64: dts: renesas: r9a07g044: Rename SDHI clocks
>
>  .../devicetree/bindings/mmc/renesas,sdhi.yaml          | 10 +++++-----
>  arch/arm64/boot/dts/renesas/r9a07g044.dtsi             |  8 ++++----
>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> --
> 2.17.1
>

Re: [PATCH 1/2] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks

[Geert Uytterhoeven]

On Mon, Nov 22, 2021 at 11:39 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Rename the below RZ/G2L clocks to match with the clock names used in
> R-Car Gen2 and later generations.
>
>  imclk->core
>  clk_hs->clkh
>  imclk2->cd
>
> This changes will avoid using fallback for RZ/G2L high speed clock,
> if "clkh" is not used in device tree and also the code changes in
> driver related to this clocks.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.17 if Ulf is happy.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/2] arm64: dts: renesas: r9a07g044: Rename SDHI clocks

[Geert Uytterhoeven]

On Mon, Nov 22, 2021 at 11:39 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Rename the below SDHI clocks to match with the clocks used in driver.
>
>      imclk->core
>      clk_hs->clkh
>      imclk2->cd
>
> Also re-arrange the clocks to match with the sorting order used in the
> binding document.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v5.17.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 1/2] dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks

[Ulf Hansson]

On Tue, 23 Nov 2021 at 14:38, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> On Mon, Nov 22, 2021 at 11:39 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Rename the below RZ/G2L clocks to match with the clock names used in
> > R-Car Gen2 and later generations.
> >
> >  imclk->core
> >  clk_hs->clkh
> >  imclk2->cd
> >
> > This changes will avoid using fallback for RZ/G2L high speed clock,
> > if "clkh" is not used in device tree and also the code changes in
> > driver related to this clocks.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-devel for v5.17 if Ulf is happy.

Acked-by: Ulf Hansson <ulf.hansson@linaro.org>

Kind regards
Uffe