From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: Magnus Damm <magnus.damm@gmail.com>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH v2 2/4] clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag
Date: Thu, 10 Sep 2020 15:06:24 +0200 [thread overview]
Message-ID: <CAMuHMdX0--GqyjqWH+0Hi_6_A2BC8qda6k2wuUtQ6=FjabG5ZQ@mail.gmail.com> (raw)
In-Reply-To: <1599657211-17504-3-git-send-email-yoshihiro.shimoda.uh@renesas.com>
Hi Shimoda-san,
On Wed, Sep 9, 2020 at 3:13 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Geert suggested defining multiple registers layout variants using
> an enum [1] to support further devices like R-Car V3U. So, use enum
> clk_reg_layout instead of a boolean .stbyctrl flag. No behavior change.
>
> [1]
> https://lore.kernel.org/linux-renesas-soc/CAMuHMdVAgN69p9FFnQdO4iHk2CHkeNaVui2Q-FOY6_BFVjQ-Nw@mail.gmail.com/
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> --- a/drivers/clk/renesas/renesas-cpg-mssr.h
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.h
> @@ -130,7 +135,7 @@ struct cpg_mssr_info {
> unsigned int num_core_clks;
> unsigned int last_dt_core_clk;
> unsigned int num_total_core_clks;
> - bool stbyctrl;
> + enum clk_reg_layout reg_layout;
Seems like you forgot to update the struct's kerneldoc for this rename?
>
> /* Module Clocks */
> const struct mssr_mod_clk *mod_clks;
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2020-09-10 21:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-09 13:13 [PATCH v2 0/4] clk: renesas: cpg-mssr: add support for V3U Yoshihiro Shimoda
2020-09-09 13:13 ` [PATCH v2 1/4] dt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions Yoshihiro Shimoda
2020-09-10 12:56 ` Geert Uytterhoeven
2020-09-09 13:13 ` [PATCH v2 2/4] clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag Yoshihiro Shimoda
2020-09-10 13:06 ` Geert Uytterhoeven [this message]
2020-09-10 13:06 ` Geert Uytterhoeven
2020-09-11 0:35 ` Yoshihiro Shimoda
2020-09-09 13:13 ` [PATCH v2 3/4] clk: renesas: cpg-mssr: add register pointers into struct cpg_mssr_priv Yoshihiro Shimoda
2020-09-10 13:11 ` Geert Uytterhoeven
2020-09-11 4:16 ` Yoshihiro Shimoda
2020-09-09 13:13 ` [PATCH v2 4/4] clk: renesas: cpg-mssr: Add support for R-Car V3U Yoshihiro Shimoda
2020-09-10 13:19 ` Geert Uytterhoeven
2020-09-11 4:41 ` Yoshihiro Shimoda
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