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From: Sam Protsenko <semen.protsenko@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>,
	Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Janghyuck Kim <janghyuck.kim@samsung.com>,
	Cho KyongHo <pullip.cho@samsung.com>,
	Daniel Mentz <danielmentz@google.com>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/4] iommu/exynos: Check if SysMMU v7 has VM registers
Date: Fri, 8 Jul 2022 16:34:55 +0300	[thread overview]
Message-ID: <CAPLW+4=A7wTwH8a40hzDxn=4yT+jeMn2DX2WRyzxaX59hgbDnw@mail.gmail.com> (raw)
In-Reply-To: <23357d34-4570-1309-6b6e-46055bdb8160@linaro.org>

On Sun, 3 Jul 2022 at 22:10, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 02/07/2022 23:37, Sam Protsenko wrote:
> > SysMMU v7 can have Virtual Machine registers, which implement multiple
> > translation domains. The driver should know if it's true or not, as VM
> > registers shouldn't be accessed if not present. Read corresponding
> > capabilities register to obtain that info, and store it in driver data.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> >  drivers/iommu/exynos-iommu.c | 42 ++++++++++++++++++++++++++++++------
> >  1 file changed, 36 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> > index 28f8c8d93aa3..df6ddbebbe2b 100644
> > --- a/drivers/iommu/exynos-iommu.c
> > +++ b/drivers/iommu/exynos-iommu.c
> > @@ -135,6 +135,9 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
> >  #define CFG_SYSSEL   (1 << 22) /* System MMU 3.2 only */
> >  #define CFG_FLPDCACHE        (1 << 20) /* System MMU 3.2+ only */
> >
> > +#define CAPA0_CAPA1_EXIST            BIT(11)
> > +#define CAPA1_VCR_ENABLED            BIT(14)
> > +
> >  /* common registers */
> >  #define REG_MMU_CTRL         0x000
> >  #define REG_MMU_CFG          0x004
> > @@ -171,6 +174,10 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
> >  #define REG_V5_FAULT_AR_VA   0x070
> >  #define REG_V5_FAULT_AW_VA   0x080
> >
> > +/* v7.x registers */
> > +#define REG_V7_CAPA0         0x870
> > +#define REG_V7_CAPA1         0x874
> > +
> >  #define has_sysmmu(dev)              (dev_iommu_priv_get(dev) != NULL)
> >
> >  static struct device *dma_dev;
> > @@ -274,6 +281,9 @@ struct sysmmu_drvdata {
> >       unsigned int version;           /* our version */
> >
> >       struct iommu_device iommu;      /* IOMMU core handle */
> > +
> > +     /* v7 fields */
> > +     bool has_vcr;                   /* virtual machine control register */
> >  };
> >
> >  static struct exynos_iommu_domain *to_exynos_domain(struct iommu_domain *dom)
> > @@ -364,11 +374,7 @@ static void __sysmmu_disable_clocks(struct sysmmu_drvdata *data)
> >
> >  static void __sysmmu_get_version(struct sysmmu_drvdata *data)
> >  {
> > -     u32 ver;
> > -
> > -     __sysmmu_enable_clocks(data);
> > -
> > -     ver = readl(data->sfrbase + REG_MMU_VERSION);
> > +     const u32 ver = readl(data->sfrbase + REG_MMU_VERSION);
>
>
> No need for const for local, non-pointer variables. There is no benefit
> in preventing the modification and it is not a constant.
>

I'd say it's more a matter of taste, having "const" kinda disciplines
one. But I don't mind removing those bits, will do in v2.

> >
> >       /* controllers on some SoCs don't report proper version */
> >       if (ver == 0x80000001u)
> > @@ -378,6 +384,29 @@ static void __sysmmu_get_version(struct sysmmu_drvdata *data)
> >
> >       dev_dbg(data->sysmmu, "hardware version: %d.%d\n",
> >               MMU_MAJ_VER(data->version), MMU_MIN_VER(data->version));
> > +}
> > +
> > +static bool __sysmmu_has_capa1(struct sysmmu_drvdata *data)
> > +{
> > +     const u32 capa0 = readl(data->sfrbase + REG_V7_CAPA0);
>
> Same here and further.
>
>
> Best regards,
> Krzysztof

WARNING: multiple messages have this Message-ID (diff)
From: Sam Protsenko <semen.protsenko@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>,
	Joerg Roedel <joro@8bytes.org>,  Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	 Janghyuck Kim <janghyuck.kim@samsung.com>,
	Cho KyongHo <pullip.cho@samsung.com>,
	 Daniel Mentz <danielmentz@google.com>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	 iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
	 linux-arm-kernel@lists.infradead.org,
	linux-samsung-soc@vger.kernel.org,  linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/4] iommu/exynos: Check if SysMMU v7 has VM registers
Date: Fri, 8 Jul 2022 16:34:55 +0300	[thread overview]
Message-ID: <CAPLW+4=A7wTwH8a40hzDxn=4yT+jeMn2DX2WRyzxaX59hgbDnw@mail.gmail.com> (raw)
In-Reply-To: <23357d34-4570-1309-6b6e-46055bdb8160@linaro.org>

On Sun, 3 Jul 2022 at 22:10, Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 02/07/2022 23:37, Sam Protsenko wrote:
> > SysMMU v7 can have Virtual Machine registers, which implement multiple
> > translation domains. The driver should know if it's true or not, as VM
> > registers shouldn't be accessed if not present. Read corresponding
> > capabilities register to obtain that info, and store it in driver data.
> >
> > Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> > ---
> >  drivers/iommu/exynos-iommu.c | 42 ++++++++++++++++++++++++++++++------
> >  1 file changed, 36 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
> > index 28f8c8d93aa3..df6ddbebbe2b 100644
> > --- a/drivers/iommu/exynos-iommu.c
> > +++ b/drivers/iommu/exynos-iommu.c
> > @@ -135,6 +135,9 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
> >  #define CFG_SYSSEL   (1 << 22) /* System MMU 3.2 only */
> >  #define CFG_FLPDCACHE        (1 << 20) /* System MMU 3.2+ only */
> >
> > +#define CAPA0_CAPA1_EXIST            BIT(11)
> > +#define CAPA1_VCR_ENABLED            BIT(14)
> > +
> >  /* common registers */
> >  #define REG_MMU_CTRL         0x000
> >  #define REG_MMU_CFG          0x004
> > @@ -171,6 +174,10 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
> >  #define REG_V5_FAULT_AR_VA   0x070
> >  #define REG_V5_FAULT_AW_VA   0x080
> >
> > +/* v7.x registers */
> > +#define REG_V7_CAPA0         0x870
> > +#define REG_V7_CAPA1         0x874
> > +
> >  #define has_sysmmu(dev)              (dev_iommu_priv_get(dev) != NULL)
> >
> >  static struct device *dma_dev;
> > @@ -274,6 +281,9 @@ struct sysmmu_drvdata {
> >       unsigned int version;           /* our version */
> >
> >       struct iommu_device iommu;      /* IOMMU core handle */
> > +
> > +     /* v7 fields */
> > +     bool has_vcr;                   /* virtual machine control register */
> >  };
> >
> >  static struct exynos_iommu_domain *to_exynos_domain(struct iommu_domain *dom)
> > @@ -364,11 +374,7 @@ static void __sysmmu_disable_clocks(struct sysmmu_drvdata *data)
> >
> >  static void __sysmmu_get_version(struct sysmmu_drvdata *data)
> >  {
> > -     u32 ver;
> > -
> > -     __sysmmu_enable_clocks(data);
> > -
> > -     ver = readl(data->sfrbase + REG_MMU_VERSION);
> > +     const u32 ver = readl(data->sfrbase + REG_MMU_VERSION);
>
>
> No need for const for local, non-pointer variables. There is no benefit
> in preventing the modification and it is not a constant.
>

I'd say it's more a matter of taste, having "const" kinda disciplines
one. But I don't mind removing those bits, will do in v2.

> >
> >       /* controllers on some SoCs don't report proper version */
> >       if (ver == 0x80000001u)
> > @@ -378,6 +384,29 @@ static void __sysmmu_get_version(struct sysmmu_drvdata *data)
> >
> >       dev_dbg(data->sysmmu, "hardware version: %d.%d\n",
> >               MMU_MAJ_VER(data->version), MMU_MIN_VER(data->version));
> > +}
> > +
> > +static bool __sysmmu_has_capa1(struct sysmmu_drvdata *data)
> > +{
> > +     const u32 capa0 = readl(data->sfrbase + REG_V7_CAPA0);
>
> Same here and further.
>
>
> Best regards,
> Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-07-08 13:35 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-02 21:37 [PATCH 0/4] iommu/exynos: Add basic support for SysMMU v7 Sam Protsenko
2022-07-02 21:37 ` Sam Protsenko
2022-07-02 21:37 ` Sam Protsenko
2022-07-02 21:37 ` [PATCH 1/4] iommu/exynos: Set correct dma mask for SysMMU v5+ Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-03 18:50   ` Krzysztof Kozlowski
2022-07-03 18:50     ` Krzysztof Kozlowski
2022-07-03 18:50     ` Krzysztof Kozlowski
2022-07-08 13:18     ` Sam Protsenko
2022-07-08 13:18       ` Sam Protsenko
2022-07-11 12:27       ` Krzysztof Kozlowski
2022-07-11 12:27         ` Krzysztof Kozlowski
2022-07-11 12:59         ` Robin Murphy
2022-07-11 12:59           ` Robin Murphy
2022-07-02 21:37 ` [PATCH 2/4] iommu/exynos: Check if SysMMU v7 has VM registers Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-03 19:10   ` Krzysztof Kozlowski
2022-07-03 19:10     ` Krzysztof Kozlowski
2022-07-03 19:10     ` Krzysztof Kozlowski
2022-07-08 13:34     ` Sam Protsenko [this message]
2022-07-08 13:34       ` Sam Protsenko
2022-07-02 21:37 ` [PATCH 3/4] iommu/exynos: Use lookup based approach to access v7 registers Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-03 19:29   ` Krzysztof Kozlowski
2022-07-03 19:29     ` Krzysztof Kozlowski
2022-07-03 19:29     ` Krzysztof Kozlowski
2022-07-08 18:13     ` Sam Protsenko
2022-07-08 18:13       ` Sam Protsenko
2022-07-02 21:37 ` [PATCH 4/4] iommu/exynos: Add minimal support for SysMMU v7 with VM registers Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-02 21:37   ` Sam Protsenko
2022-07-02 21:48 ` [PATCH 0/4] iommu/exynos: Add basic support for SysMMU v7 Sam Protsenko
2022-07-02 21:48   ` Sam Protsenko
2022-07-02 21:48   ` Sam Protsenko
2022-07-03 12:47   ` David Virag
2022-07-03 12:47     ` David Virag
2022-07-03 12:47     ` David Virag
2022-07-06 14:24     ` Sam Protsenko
2022-07-06 14:24       ` Sam Protsenko
2022-07-06 14:24       ` Sam Protsenko
2022-07-10 23:04     ` Sam Protsenko
2022-07-10 23:04       ` Sam Protsenko
2022-07-13 14:14     ` Sam Protsenko
2022-07-13 14:14       ` Sam Protsenko

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