flush_cache_all API

flush_cache_all API

[naveen yadav]

Hi All,

I am using Multi-core ARM machine.
If I use flush_cache_all() API, will it flush only current CPU cache
?, or flush all cache's of all core's.

Thanks

flush_cache_all API

[loody]

hi:

2011/7/11 naveen yadav <yad.naveen@gmail.com>

> Hi All,
>
> I am using Multi-core ARM machine.
> If I use flush_cache_all() API, will it flush only current CPU cache
> ?, or flush all cache's of all core's.
>
> Thanks
>
>

how about asking this question to linux arm mailing list?

-- 
Regards,
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flush_cache_all API

[Vladimir Murzin]

On 7/11/11, naveen yadav <yad.naveen@gmail.com> wrote:
> Hi All,
>
> I am using Multi-core ARM machine.
> If I use flush_cache_all() API, will it flush only current CPU cache
> ?, or flush all cache's of all core's.
>
> Thanks
>
> _______________________________________________
> Kernelnewbies mailing list
> Kernelnewbies at kernelnewbies.org
> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>
Hi!

I think, it doesn't matter as soon as SCU is involved.

flush_cache_all API

[Gang Lei (雷刚)]

Hi :

The SCU can solve all the cache coherency problems?


From: kernelnewbies-bounces@kernelnewbies.org [mailto:kernelnewbies-bounces at kernelnewbies.org] On Behalf Of Vladimir Murzin
Sent: 2011?7?11? 17:51
To: naveen yadav
Cc: kernelnewbies at kernelnewbies.org
Subject: Re: flush_cache_all API


On 7/11/11, naveen yadav <yad.naveen@gmail.com> wrote:
> Hi All,
>
> I am using Multi-core ARM machine.
> If I use flush_cache_all() API, will it flush only current CPU cache
> ?, or flush all cache's of all core's.
>
> Thanks
>
> _______________________________________________
> Kernelnewbies mailing list
> Kernelnewbies at kernelnewbies.org
> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>
Hi!

I think, it doesn't matter as soon as SCU is involved.

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Kernelnewbies mailing list
Kernelnewbies at kernelnewbies.org
http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
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flush_cache_all API

[Vladimir Murzin]

On 7/13/11, Gang Lei (??) <gang.lei@mediatek.com> wrote:
> Hi :
>
> The SCU can solve all the cache coherency problems?
>
>  ...

>From [1]:

The SCU functions are to:
* maintain data cache coherency between the Cortex-A9 processors
* initiate L2 AXI memory accesses
* arbitrate between Cortex-A9 processors requesting L2 accesses
* manage ACP accesses.

Note
 * The Cortex-A9 SCU does not support hardware management of coherency
of the instruction cache.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0407e/CDDEHDDG.html