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From: Greg KH <gregkh@linuxfoundation.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>,
	"open list:STAGING SUBSYSTEM" <devel@driverdev.osuosl.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Jason Yan <yanaijie@huawei.com>
Subject: Re: [PATCH v2 2/2] pinctrl: ralink: add a pinctrl driver for the rt2880 family
Date: Tue, 8 Dec 2020 10:04:08 +0100	[thread overview]
Message-ID: <X89BiDacLNQ7ZQOH@kroah.com> (raw)
In-Reply-To: <CACRpkdY_Me8kO-Fa-vUspJNv+2vy0fswTM-RaUoaZJ5rCfuynA@mail.gmail.com>

On Tue, Dec 08, 2020 at 09:21:31AM +0100, Linus Walleij wrote:
> On Tue, Dec 8, 2020 at 8:55 AM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
> 
> > These Socs have 1-3 banks of 8-32 gpios. Rather then setting the muxing of each
> > pin individually, these socs have mux groups that when set will effect 1-N pins.
> > Pin groups have a 2, 4 or 8 different muxes.
> >
> > Acked-by: Linus Walleij <linus.walleij@linaro.org>
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> 
> Greg I'm happy if you just apply this right now for v5.11, as Sergio
> is obviously on top of things and the DT bindings will get there
> eventually so I don't see any need to hold back the de-staging just
> waiting for patch 1 (which I will eventually apply directly anyway).

Now merged into my tree, thanks!

greg k-h

WARNING: multiple messages have this Message-ID (diff)
From: Greg KH <gregkh@linuxfoundation.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: "open list:STAGING SUBSYSTEM" <devel@driverdev.osuosl.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>, Jason Yan <yanaijie@huawei.com>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH v2 2/2] pinctrl: ralink: add a pinctrl driver for the rt2880 family
Date: Tue, 8 Dec 2020 10:04:08 +0100	[thread overview]
Message-ID: <X89BiDacLNQ7ZQOH@kroah.com> (raw)
In-Reply-To: <CACRpkdY_Me8kO-Fa-vUspJNv+2vy0fswTM-RaUoaZJ5rCfuynA@mail.gmail.com>

On Tue, Dec 08, 2020 at 09:21:31AM +0100, Linus Walleij wrote:
> On Tue, Dec 8, 2020 at 8:55 AM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
> 
> > These Socs have 1-3 banks of 8-32 gpios. Rather then setting the muxing of each
> > pin individually, these socs have mux groups that when set will effect 1-N pins.
> > Pin groups have a 2, 4 or 8 different muxes.
> >
> > Acked-by: Linus Walleij <linus.walleij@linaro.org>
> > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> 
> Greg I'm happy if you just apply this right now for v5.11, as Sergio
> is obviously on top of things and the DT bindings will get there
> eventually so I don't see any need to hold back the de-staging just
> waiting for patch 1 (which I will eventually apply directly anyway).

Now merged into my tree, thanks!

greg k-h
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  reply	other threads:[~2020-12-08  9:04 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-08  7:55 [PATCH v2 0/2] pinctrl: ralink: pinctrl driver for the rt2880 family Sergio Paracuellos
2020-12-08  7:55 ` Sergio Paracuellos
2020-12-08  7:55 ` [PATCH v2 1/2] dt-bindings: pinctrl: rt2880: add binding document Sergio Paracuellos
2020-12-08  7:55   ` Sergio Paracuellos
2020-12-10 13:47   ` Rob Herring
2020-12-10 13:47     ` Rob Herring
2020-12-11  6:58     ` Sergio Paracuellos
2020-12-11  6:58       ` Sergio Paracuellos
2020-12-08  7:55 ` [PATCH v2 2/2] pinctrl: ralink: add a pinctrl driver for the rt2880 family Sergio Paracuellos
2020-12-08  7:55   ` Sergio Paracuellos
2020-12-08  8:21   ` Linus Walleij
2020-12-08  8:21     ` Linus Walleij
2020-12-08  9:04     ` Greg KH [this message]
2020-12-08  9:04       ` Greg KH
2020-12-08  9:33       ` Sergio Paracuellos
2020-12-08  9:33         ` Sergio Paracuellos

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