* [PATCH 0/3] arm64: dts: renesas: r8a779a0: Add FCP and VSP support
@ 2020-12-16 17:00 Kieran Bingham
2020-12-16 17:00 ` [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support Kieran Bingham
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Kieran Bingham @ 2020-12-16 17:00 UTC (permalink / raw)
To: Laurent Pinchart, Geert Uytterhoeven, linux-renesas-soc, devicetree
Cc: Rob Herring, Kieran Bingham
Provide DT nodes for the FCPVD, and VSP on the V3U.
Kieran Bingham (3):
arm64: dts: renesas: r8a779a0: Add FCPVD support
arm64: dts: renesas: r8a779a0: Add VSPD support
arm64: dts: renesas: r8a779a0: Add VSPX support
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 74 +++++++++++++++++++++++
1 file changed, 74 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support
2020-12-16 17:00 [PATCH 0/3] arm64: dts: renesas: r8a779a0: Add FCP and VSP support Kieran Bingham
@ 2020-12-16 17:00 ` Kieran Bingham
2020-12-16 17:41 ` Laurent Pinchart
2020-12-16 17:00 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add VSPD support Kieran Bingham
2020-12-16 17:00 ` [PATCH 3/3] arm64: dts: renesas: r8a779a0: Add VSPX support Kieran Bingham
2 siblings, 1 reply; 8+ messages in thread
From: Kieran Bingham @ 2020-12-16 17:00 UTC (permalink / raw)
To: Laurent Pinchart, Geert Uytterhoeven, linux-renesas-soc, devicetree
Cc: Rob Herring, Kieran Bingham
Provide FCPVD support for the V3U.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index 6cf77ce9aa93..ba6fbbd8710e 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -117,6 +117,22 @@ gic: interrupt-controller@f1000000 {
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
};
+ fcpvd0: fcp@fea10000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea10000 0 0x200>;
+ clocks = <&cpg CPG_MOD 508>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 508>;
+ };
+
+ fcpvd1: fcp@fea11000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 509>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 509>;
+ };
+
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add VSPD support
2020-12-16 17:00 [PATCH 0/3] arm64: dts: renesas: r8a779a0: Add FCP and VSP support Kieran Bingham
2020-12-16 17:00 ` [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support Kieran Bingham
@ 2020-12-16 17:00 ` Kieran Bingham
2020-12-16 17:46 ` Laurent Pinchart
2020-12-16 17:00 ` [PATCH 3/3] arm64: dts: renesas: r8a779a0: Add VSPX support Kieran Bingham
2 siblings, 1 reply; 8+ messages in thread
From: Kieran Bingham @ 2020-12-16 17:00 UTC (permalink / raw)
To: Laurent Pinchart, Geert Uytterhoeven, linux-renesas-soc, devicetree
Cc: Rob Herring, Kieran Bingham
Provide VSPD support on the V3U.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index ba6fbbd8710e..a23b4ce2e5f4 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -133,6 +133,28 @@ fcpvd1: fcp@fea11000 {
resets = <&cpg 509>;
};
+ vspd0: vsp@fea20000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea20000 0 0x5000>;
+ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 830>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 830>;
+
+ renesas,fcp = <&fcpvd0>;
+ };
+
+ vspd1: vsp@fea28000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea28000 0 0x5000>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 831>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 831>;
+
+ renesas,fcp = <&fcpvd1>;
+ };
+
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] arm64: dts: renesas: r8a779a0: Add VSPX support
2020-12-16 17:00 [PATCH 0/3] arm64: dts: renesas: r8a779a0: Add FCP and VSP support Kieran Bingham
2020-12-16 17:00 ` [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support Kieran Bingham
2020-12-16 17:00 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add VSPD support Kieran Bingham
@ 2020-12-16 17:00 ` Kieran Bingham
2020-12-16 18:15 ` Laurent Pinchart
2 siblings, 1 reply; 8+ messages in thread
From: Kieran Bingham @ 2020-12-16 17:00 UTC (permalink / raw)
To: Laurent Pinchart, Geert Uytterhoeven, linux-renesas-soc, devicetree
Cc: Rob Herring, Kieran Bingham
Provide VSP-X support on the V3U.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
---
The FCPvX is not yet connected here, as the clock domains are unclear
for that.
The register mapping space is kept at 0x8000 for now as this is a bit of
an unknown entity (with the IIF) so playing it safe and keeping the same
value as the BSP (0x8000) - however with no CLU on these nodes, I expect
the register space to be suitable to be mapped at length 0x4000.
arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 36 +++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index a23b4ce2e5f4..4fb28df5cd6b 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -155,6 +155,42 @@ vspd1: vsp@fea28000 {
renesas,fcp = <&fcpvd1>;
};
+ vspx0: vsp@fedd0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfedd0000 0 0x8000>;
+ interrupts = <GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1028>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 1028>;
+ };
+
+ vspx1: vsp@fedd8000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfedd8000 0 0x8000>;
+ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1029>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 1029>;
+ };
+
+ vspx2: vsp@fede0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfede0000 0 0x8000>;
+ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1030>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 1030>;
+ };
+
+ vspx3: vsp@fede8000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfede8000 0 0x8000>;
+ interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 1031>;
+ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
+ resets = <&cpg 1031>;
+ };
+
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support
2020-12-16 17:00 ` [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support Kieran Bingham
@ 2020-12-16 17:41 ` Laurent Pinchart
2020-12-17 14:52 ` Kieran Bingham
0 siblings, 1 reply; 8+ messages in thread
From: Laurent Pinchart @ 2020-12-16 17:41 UTC (permalink / raw)
To: Kieran Bingham
Cc: Geert Uytterhoeven, linux-renesas-soc, devicetree, Rob Herring
Hi Kieran,
Thank you for the patch.
On Wed, Dec 16, 2020 at 05:00:16PM +0000, Kieran Bingham wrote:
> Provide FCPVD support for the V3U.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index 6cf77ce9aa93..ba6fbbd8710e 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -117,6 +117,22 @@ gic: interrupt-controller@f1000000 {
> power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> };
>
> + fcpvd0: fcp@fea10000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfea10000 0 0x200>;
> + clocks = <&cpg CPG_MOD 508>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 508>;
> + };
> +
> + fcpvd1: fcp@fea11000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfea2f000 0 0x200>;
This doesn't match the node address (the former being correct I
believe). With this fixed,
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> + clocks = <&cpg CPG_MOD 509>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 509>;
> + };
> +
> prr: chipid@fff00044 {
> compatible = "renesas,prr";
> reg = <0 0xfff00044 0 4>;
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add VSPD support
2020-12-16 17:00 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add VSPD support Kieran Bingham
@ 2020-12-16 17:46 ` Laurent Pinchart
0 siblings, 0 replies; 8+ messages in thread
From: Laurent Pinchart @ 2020-12-16 17:46 UTC (permalink / raw)
To: Kieran Bingham
Cc: Geert Uytterhoeven, linux-renesas-soc, devicetree, Rob Herring
Hi Kieran,
Thank you for the patch.
On Wed, Dec 16, 2020 at 05:00:17PM +0000, Kieran Bingham wrote:
> Provide VSPD support on the V3U.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index ba6fbbd8710e..a23b4ce2e5f4 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -133,6 +133,28 @@ fcpvd1: fcp@fea11000 {
> resets = <&cpg 509>;
> };
>
> + vspd0: vsp@fea20000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfea20000 0 0x5000>;
> + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 830>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 830>;
> +
> + renesas,fcp = <&fcpvd0>;
> + };
> +
> + vspd1: vsp@fea28000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfea28000 0 0x5000>;
> + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 831>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 831>;
> +
> + renesas,fcp = <&fcpvd1>;
> + };
> +
> prr: chipid@fff00044 {
> compatible = "renesas,prr";
> reg = <0 0xfff00044 0 4>;
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] arm64: dts: renesas: r8a779a0: Add VSPX support
2020-12-16 17:00 ` [PATCH 3/3] arm64: dts: renesas: r8a779a0: Add VSPX support Kieran Bingham
@ 2020-12-16 18:15 ` Laurent Pinchart
0 siblings, 0 replies; 8+ messages in thread
From: Laurent Pinchart @ 2020-12-16 18:15 UTC (permalink / raw)
To: Kieran Bingham
Cc: Geert Uytterhoeven, linux-renesas-soc, devicetree, Rob Herring
Hi Kieran,
Thank you for the patch.
On Wed, Dec 16, 2020 at 05:00:18PM +0000, Kieran Bingham wrote:
> Provide VSP-X support on the V3U.
>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> ---
> The FCPvX is not yet connected here, as the clock domains are unclear
> for that.
>
> The register mapping space is kept at 0x8000 for now as this is a bit of
> an unknown entity (with the IIF) so playing it safe and keeping the same
> value as the BSP (0x8000) - however with no CLU on these nodes, I expect
> the register space to be suitable to be mapped at length 0x4000.
I think so too.
> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 36 +++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> index a23b4ce2e5f4..4fb28df5cd6b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -155,6 +155,42 @@ vspd1: vsp@fea28000 {
> renesas,fcp = <&fcpvd1>;
> };
>
> + vspx0: vsp@fedd0000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfedd0000 0 0x8000>;
> + interrupts = <GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH>;
I'm not entirely sure about the interrupt number, as there are other
VSP-related interrupts listed in the datasheet that don't seem to
correspond to any IP core. I suppose there will be a documentation
update at some point. For now I have no reason to believe the interrupts
here are incorrect.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> + clocks = <&cpg CPG_MOD 1028>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 1028>;
> + };
> +
> + vspx1: vsp@fedd8000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfedd8000 0 0x8000>;
> + interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1029>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 1029>;
> + };
> +
> + vspx2: vsp@fede0000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfede0000 0 0x8000>;
> + interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1030>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 1030>;
> + };
> +
> + vspx3: vsp@fede8000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfede8000 0 0x8000>;
> + interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 1031>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + resets = <&cpg 1031>;
> + };
> +
> prr: chipid@fff00044 {
> compatible = "renesas,prr";
> reg = <0 0xfff00044 0 4>;
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support
2020-12-16 17:41 ` Laurent Pinchart
@ 2020-12-17 14:52 ` Kieran Bingham
0 siblings, 0 replies; 8+ messages in thread
From: Kieran Bingham @ 2020-12-17 14:52 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Geert Uytterhoeven, linux-renesas-soc, devicetree, Rob Herring
Hi Laurent,
On 16/12/2020 17:41, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Wed, Dec 16, 2020 at 05:00:16PM +0000, Kieran Bingham wrote:
>> Provide FCPVD support for the V3U.
>>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> ---
>> arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 16 ++++++++++++++++
>> 1 file changed, 16 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>> index 6cf77ce9aa93..ba6fbbd8710e 100644
>> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>> @@ -117,6 +117,22 @@ gic: interrupt-controller@f1000000 {
>> power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
>> };
>>
>> + fcpvd0: fcp@fea10000 {
>> + compatible = "renesas,fcpv";
>> + reg = <0 0xfea10000 0 0x200>;
>> + clocks = <&cpg CPG_MOD 508>;
>> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
>> + resets = <&cpg 508>;
>> + };
>> +
>> + fcpvd1: fcp@fea11000 {
>> + compatible = "renesas,fcpv";
>> + reg = <0 0xfea2f000 0 0x200>;
>
> This doesn't match the node address (the former being correct I
> believe). With this fixed,
Oh dear, that's bad indeed.
I'm sorry - could you help me locate the correct buttons on my keyboard
to fix this please? :
> https://as1.ftcdn.net/jpg/00/74/64/78/500_F_74647888_XIrZ25aSYKhu5YB4PyuU7qYqzAJr3EjQ.jpg
:-D
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks.
K
>
>> + clocks = <&cpg CPG_MOD 509>;
>> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
>> + resets = <&cpg 509>;
>> + };
>> +
>> prr: chipid@fff00044 {
>> compatible = "renesas,prr";
>> reg = <0 0xfff00044 0 4>;
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-12-17 14:53 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-16 17:00 [PATCH 0/3] arm64: dts: renesas: r8a779a0: Add FCP and VSP support Kieran Bingham
2020-12-16 17:00 ` [PATCH 1/3] arm64: dts: renesas: r8a779a0: Add FCPVD support Kieran Bingham
2020-12-16 17:41 ` Laurent Pinchart
2020-12-17 14:52 ` Kieran Bingham
2020-12-16 17:00 ` [PATCH 2/3] arm64: dts: renesas: r8a779a0: Add VSPD support Kieran Bingham
2020-12-16 17:46 ` Laurent Pinchart
2020-12-16 17:00 ` [PATCH 3/3] arm64: dts: renesas: r8a779a0: Add VSPX support Kieran Bingham
2020-12-16 18:15 ` Laurent Pinchart
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