From: "Ville Syrjälä" <ville.syrjala@linux.intel.com> To: Jani Nikula <jani.nikula@intel.com> Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, manasi.d.navare@intel.com Subject: Re: [PATCH v3 01/13] drm/dp: add DP 2.0 UHBR link rate and bw code conversions Date: Fri, 17 Sep 2021 15:40:35 +0300 [thread overview] Message-ID: <YUSMwx5T8FamQt6R@intel.com> (raw) In-Reply-To: <cab4edda8834d6b4db610fabb5e1f1f18ae33c2c.1631191763.git.jani.nikula@intel.com> On Thu, Sep 09, 2021 at 03:51:53PM +0300, Jani Nikula wrote: > The bw code equals link_rate / 0.27 Gbps only for 8b/10b link > rates. Handle DP 2.0 UHBR rates as special cases, though this is not > pretty. > > Cc: dri-devel@lists.freedesktop.org > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/drm_dp_helper.c | 26 ++++++++++++++++++++++---- > 1 file changed, 22 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c > index 6d0f2c447f3b..9b2a2961fca8 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -207,15 +207,33 @@ EXPORT_SYMBOL(drm_dp_lttpr_link_train_channel_eq_delay); > > u8 drm_dp_link_rate_to_bw_code(int link_rate) > { > - /* Spec says link_bw = link_rate / 0.27Gbps */ > - return link_rate / 27000; > + switch (link_rate) { > + case 1000000: > + return DP_LINK_BW_10; > + case 1350000: > + return DP_LINK_BW_13_5; > + case 2000000: > + return DP_LINK_BW_20; > + default: > + /* Spec says link_bw = link_rate / 0.27Gbps */ > + return link_rate / 27000; > + } > } > EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); > > int drm_dp_bw_code_to_link_rate(u8 link_bw) > { > - /* Spec says link_rate = link_bw * 0.27Gbps */ > - return link_bw * 27000; > + switch (link_bw) { > + case DP_LINK_BW_10: > + return 1000000; > + case DP_LINK_BW_13_5: > + return 1350000; > + case DP_LINK_BW_20: > + return 2000000; > + default: > + /* Spec says link_rate = link_bw * 0.27Gbps */ > + return link_bw * 27000; > + } > } > EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); > > -- > 2.30.2 -- Ville Syrjälä Intel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com> To: Jani Nikula <jani.nikula@intel.com> Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, manasi.d.navare@intel.com Subject: Re: [Intel-gfx] [PATCH v3 01/13] drm/dp: add DP 2.0 UHBR link rate and bw code conversions Date: Fri, 17 Sep 2021 15:40:35 +0300 [thread overview] Message-ID: <YUSMwx5T8FamQt6R@intel.com> (raw) In-Reply-To: <cab4edda8834d6b4db610fabb5e1f1f18ae33c2c.1631191763.git.jani.nikula@intel.com> On Thu, Sep 09, 2021 at 03:51:53PM +0300, Jani Nikula wrote: > The bw code equals link_rate / 0.27 Gbps only for 8b/10b link > rates. Handle DP 2.0 UHBR rates as special cases, though this is not > pretty. > > Cc: dri-devel@lists.freedesktop.org > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/drm_dp_helper.c | 26 ++++++++++++++++++++++---- > 1 file changed, 22 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c > index 6d0f2c447f3b..9b2a2961fca8 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -207,15 +207,33 @@ EXPORT_SYMBOL(drm_dp_lttpr_link_train_channel_eq_delay); > > u8 drm_dp_link_rate_to_bw_code(int link_rate) > { > - /* Spec says link_bw = link_rate / 0.27Gbps */ > - return link_rate / 27000; > + switch (link_rate) { > + case 1000000: > + return DP_LINK_BW_10; > + case 1350000: > + return DP_LINK_BW_13_5; > + case 2000000: > + return DP_LINK_BW_20; > + default: > + /* Spec says link_bw = link_rate / 0.27Gbps */ > + return link_rate / 27000; > + } > } > EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); > > int drm_dp_bw_code_to_link_rate(u8 link_bw) > { > - /* Spec says link_rate = link_bw * 0.27Gbps */ > - return link_bw * 27000; > + switch (link_bw) { > + case DP_LINK_BW_10: > + return 1000000; > + case DP_LINK_BW_13_5: > + return 1350000; > + case DP_LINK_BW_20: > + return 2000000; > + default: > + /* Spec says link_rate = link_bw * 0.27Gbps */ > + return link_bw * 27000; > + } > } > EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); > > -- > 2.30.2 -- Ville Syrjälä Intel
next prev parent reply other threads:[~2021-09-17 12:40 UTC|newest] Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-09 12:51 [PATCH v3 00/13] drm/i915/dp: dp 2.0 enabling prep work Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-09 12:51 ` [PATCH v3 01/13] drm/dp: add DP 2.0 UHBR link rate and bw code conversions Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-17 12:40 ` Ville Syrjälä [this message] 2021-09-17 12:40 ` Ville Syrjälä 2021-09-09 12:51 ` [PATCH v3 02/13] drm/dp: use more of the extended receiver cap Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-09 16:18 ` Lyude Paul 2021-09-09 16:18 ` Lyude Paul 2021-09-09 16:18 ` Lyude Paul 2021-09-09 16:18 ` [Intel-gfx] " Lyude Paul 2021-09-09 12:51 ` [PATCH v3 03/13] drm/dp: add LTTPR DP 2.0 DPCD addresses Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-21 22:58 ` Nathan Chancellor 2021-09-22 0:45 ` Stephen Rothwell 2021-09-22 11:10 ` Jani Nikula 2021-09-22 13:49 ` Alex Deucher 2021-09-22 13:49 ` Alex Deucher 2021-09-22 17:32 ` [PATCH] drm/amd/display: Only define DP 2.0 symbols if not already defined Harry Wentland 2021-09-22 17:32 ` [Intel-gfx] " Harry Wentland 2021-09-09 12:51 ` [PATCH v3 04/13] drm/dp: add helper for extracting adjust 128b/132b TX FFE preset Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-09 12:51 ` [PATCH v3 05/13] drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-17 12:54 ` Ville Syrjälä 2021-09-17 12:54 ` [Intel-gfx] " Ville Syrjälä 2021-09-09 12:51 ` [PATCH v3 06/13] drm/i915/dp: add helper for checking for UHBR link rate Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-17 12:41 ` Ville Syrjälä 2021-09-17 12:41 ` [Intel-gfx] " Ville Syrjälä 2021-09-09 12:51 ` [PATCH v3 07/13] drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates Jani Nikula 2021-09-09 12:51 ` [Intel-gfx] " Jani Nikula 2021-09-09 12:52 ` [PATCH v3 08/13] drm/i915/dp: select 128b/132b channel encoding for UHBR rates Jani Nikula 2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula 2021-09-09 12:52 ` [PATCH v3 09/13] drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0 Jani Nikula 2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula 2021-09-09 12:52 ` [PATCH v3 10/13] drm/i915/dp: add HAS_DP20 macro Jani Nikula 2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula 2021-09-17 12:42 ` Ville Syrjälä 2021-09-17 12:42 ` [Intel-gfx] " Ville Syrjälä 2021-09-09 12:52 ` [PATCH v3 11/13] drm/i915/dg2: use 128b/132b transcoder DDI mode Jani Nikula 2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula 2021-09-17 12:51 ` Ville Syrjälä 2021-09-17 12:51 ` [Intel-gfx] " Ville Syrjälä 2021-09-09 12:52 ` [PATCH v3 12/13] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} for 128b/132b Jani Nikula 2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula 2021-09-17 12:53 ` [PATCH v3 12/13] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH,LOW} " Ville Syrjälä 2021-09-17 12:53 ` [Intel-gfx] [PATCH v3 12/13] drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH, LOW} " Ville Syrjälä 2021-09-21 8:44 ` Jani Nikula 2021-09-21 8:44 ` [Intel-gfx] " Jani Nikula 2021-09-09 12:52 ` [PATCH v3 13/13] drm/i915/dg2: update link training " Jani Nikula 2021-09-09 12:52 ` [Intel-gfx] " Jani Nikula 2021-09-09 13:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp: dp 2.0 enabling prep work (rev3) Patchwork 2021-09-09 13:50 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-09-09 14:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-09-09 16:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-09-17 12:54 ` [PATCH v3 00/13] drm/i915/dp: dp 2.0 enabling prep work Jani Nikula 2021-09-17 12:54 ` [Intel-gfx] " Jani Nikula 2021-09-17 16:56 ` Maxime Ripard 2021-09-17 16:56 ` [Intel-gfx] " Maxime Ripard 2021-09-21 8:44 ` Jani Nikula 2021-09-21 8:44 ` [Intel-gfx] " Jani Nikula 2021-09-22 12:54 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/dp: dp 2.0 enabling prep work (rev4) Patchwork 2021-09-22 18:24 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/dp: dp 2.0 enabling prep work (rev5) Patchwork
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