Re: [RFC PATCH v2 0/5] Add hardware prefetch driver for A64FX and Intel processors

From: Borislav Petkov <bp@alien8.de>
To: "tarumizu.kohei@fujitsu.com" <tarumizu.kohei@fujitsu.com>
Cc: "catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will@kernel.org" <will@kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH v2 0/5] Add hardware prefetch driver for A64FX and Intel processors
Date: Wed, 10 Nov 2021 09:34:02 +0100	[thread overview]
Message-ID: <YYuD+jRPUQrsmAkD@zn.tnic> (raw)
In-Reply-To: <OSBPR01MB20370518F9296BA4302FF7DC80919@OSBPR01MB2037.jpnprd01.prod.outlook.com>

On Mon, Nov 08, 2021 at 02:17:43AM +0000, tarumizu.kohei@fujitsu.com wrote:
> The following performance improvements have been reported for some
> Intel processors.
> https://github.com/xmrig/xmrig/issues/1433#issuecomment-572126184

Yes, I know about that use case.

> For these reasons, we would like to add this interface to the
> upstream kernel.

So put all those justifications at the beginning of your 0th message
when you send a patchset so that it is clear to reviewers *why* you're
doing this. The "why" is the most important - everything else comes
after.

> > I'm not sure about a wholly separate drivers/hwpf/ - it's not like there are
> > gazillion different hw prefetch drivers.
> 
> We created a new directory to lump multiple separate files into one
> place. We don't think this is a good way. If there is any other
> suitable way, we would like to change it.

Well, how many prefetcher drivers will be there?

On x86 there will be one per vendor, so 2-3 the most...

Also, as dhansen points out, we have already

  /sys/devices/system/cpu/cpu*/cache

so all those knobs belong there on x86.

Also, I think that shoehorning all these different cache architectures
and different prefetcher knobs which are available from each CPU, into a
common sysfs hierarchy is going to cause a lot of ugly ifdeffery if not
done right.

Some caches will have control A while others won't - they will have
control B so people will wonder why control A works on box B_a but not
on box B_b...

So we have to be very careful what we expose to userspace because it
becomes an ABI which we have to support for an indefinite time.

Also, if you're going to give the xmrig example, then we should involve
the xmrig people and ask them whether the stuff you're exposing to
userspace is good for their use case.

And so on and so on...

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette