From: John Garry <john.garry@huawei.com>
To: Mark Brown <broonie@kernel.org>
Cc: <linuxarm@huawei.com>, <andriy.shevchenko@linux.intel.com>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<linux-spi@vger.kernel.org>
Subject: Re: [PATCH RFC 3/3] spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits
Date: Fri, 28 Feb 2020 17:17:18 +0000 [thread overview]
Message-ID: <a3b1711b-ed70-59d0-3326-991f1531db2b@huawei.com> (raw)
In-Reply-To: <20200228162057.GC4956@sirena.org.uk>
On 28/02/2020 16:20, Mark Brown wrote:
> On Fri, Feb 28, 2020 at 11:18:51PM +0800, John Garry wrote:
>> The Huawei D06 board (and variants) can support Quad mode of operation.
>>
>> Since we have no current method in ACPI SPI bus device resource description
>> to describe this information, use DMI to detect the board, and set the
>> controller buswidth override bits.
>
> Hopefully this is something that the ACPI people will be looking to
> address going forwards :/
>
Yeah, well I did mention the bugzilla [0] I raised for this in the cover
letter; but I think that the new process workflows to raise feature
requests in this way still needs to be formalized, so this may be
blocked for now [1].
And unfortunately I can't actively participate in relevant standards WGs
either, so if anyone else would like to assist, then that would great...
BTW, I think that it might also be good to request a generic
jedec-compatible SPI NOR part ACPI HID/CID here also.
Thanks,
John
[0] https://bugzilla.tianocore.org/show_bug.cgi?id=2557
[1] https://edk2.groups.io/g/devel/message/53420
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
>
WARNING: multiple messages have this Message-ID (diff)
From: John Garry <john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
To: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: <linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
<andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH RFC 3/3] spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits
Date: Fri, 28 Feb 2020 17:17:18 +0000 [thread overview]
Message-ID: <a3b1711b-ed70-59d0-3326-991f1531db2b@huawei.com> (raw)
In-Reply-To: <20200228162057.GC4956-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
On 28/02/2020 16:20, Mark Brown wrote:
> On Fri, Feb 28, 2020 at 11:18:51PM +0800, John Garry wrote:
>> The Huawei D06 board (and variants) can support Quad mode of operation.
>>
>> Since we have no current method in ACPI SPI bus device resource description
>> to describe this information, use DMI to detect the board, and set the
>> controller buswidth override bits.
>
> Hopefully this is something that the ACPI people will be looking to
> address going forwards :/
>
Yeah, well I did mention the bugzilla [0] I raised for this in the cover
letter; but I think that the new process workflows to raise feature
requests in this way still needs to be formalized, so this may be
blocked for now [1].
And unfortunately I can't actively participate in relevant standards WGs
either, so if anyone else would like to assist, then that would great...
BTW, I think that it might also be good to request a generic
jedec-compatible SPI NOR part ACPI HID/CID here also.
Thanks,
John
[0] https://bugzilla.tianocore.org/show_bug.cgi?id=2557
[1] https://edk2.groups.io/g/devel/message/53420
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
>
WARNING: multiple messages have this Message-ID (diff)
From: John Garry <john.garry@huawei.com>
To: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org, andriy.shevchenko@linux.intel.com,
linux-mtd@lists.infradead.org, linuxarm@huawei.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 3/3] spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits
Date: Fri, 28 Feb 2020 17:17:18 +0000 [thread overview]
Message-ID: <a3b1711b-ed70-59d0-3326-991f1531db2b@huawei.com> (raw)
In-Reply-To: <20200228162057.GC4956@sirena.org.uk>
On 28/02/2020 16:20, Mark Brown wrote:
> On Fri, Feb 28, 2020 at 11:18:51PM +0800, John Garry wrote:
>> The Huawei D06 board (and variants) can support Quad mode of operation.
>>
>> Since we have no current method in ACPI SPI bus device resource description
>> to describe this information, use DMI to detect the board, and set the
>> controller buswidth override bits.
>
> Hopefully this is something that the ACPI people will be looking to
> address going forwards :/
>
Yeah, well I did mention the bugzilla [0] I raised for this in the cover
letter; but I think that the new process workflows to raise feature
requests in this way still needs to be formalized, so this may be
blocked for now [1].
And unfortunately I can't actively participate in relevant standards WGs
either, so if anyone else would like to assist, then that would great...
BTW, I think that it might also be good to request a generic
jedec-compatible SPI NOR part ACPI HID/CID here also.
Thanks,
John
[0] https://bugzilla.tianocore.org/show_bug.cgi?id=2557
[1] https://edk2.groups.io/g/devel/message/53420
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-02-28 17:17 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-28 15:18 [PATCH RFC 0/3] spi/HiSilicon v3xx: Support dual and quad mode through DMI quirks John Garry
2020-02-28 15:18 ` John Garry
2020-02-28 15:18 ` John Garry
2020-02-28 15:18 ` [PATCH RFC 1/3] spi: Allow SPI controller override device buswidth John Garry
2020-02-28 15:18 ` John Garry
2020-02-28 18:25 ` Applied "spi: Allow SPI controller override device buswidth" to the spi tree Mark Brown
2020-02-28 18:25 ` Mark Brown
2020-02-28 18:25 ` Mark Brown
2020-03-01 10:04 ` [PATCH RFC 1/3] spi: Allow SPI controller override device buswidth Sergei Shtylyov
2020-03-01 10:04 ` Sergei Shtylyov
2020-03-01 10:04 ` Sergei Shtylyov
2020-03-02 9:30 ` John Garry
2020-03-02 9:30 ` John Garry
2020-03-02 12:22 ` Mark Brown
2020-03-02 12:22 ` Mark Brown
2020-03-02 12:22 ` Mark Brown
2020-03-02 16:12 ` Geert Uytterhoeven
2020-03-02 16:12 ` Geert Uytterhoeven
2020-03-02 16:33 ` Mark Brown
2020-03-02 16:33 ` Mark Brown
2020-03-02 18:51 ` Geert Uytterhoeven
2020-03-02 18:51 ` Geert Uytterhoeven
2020-03-02 18:51 ` Geert Uytterhoeven
2020-03-03 9:42 ` John Garry
2020-03-03 9:42 ` John Garry
2020-03-03 9:42 ` John Garry
2020-03-03 12:43 ` Mark Brown
2020-03-03 12:43 ` Mark Brown
2020-03-03 12:43 ` Mark Brown
2020-02-28 15:18 ` [PATCH RFC 2/3] spi: HiSilicon v3xx: Properly set CMD_CONFIG for Dual/Quad modes John Garry
2020-02-28 15:18 ` John Garry
2020-02-28 15:18 ` John Garry
2020-02-28 18:25 ` Applied "spi: HiSilicon v3xx: Properly set CMD_CONFIG for Dual/Quad modes" to the spi tree Mark Brown
2020-02-28 18:25 ` Mark Brown
2020-02-28 18:25 ` Mark Brown
2020-02-28 15:18 ` [PATCH RFC 3/3] spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits John Garry
2020-02-28 15:18 ` John Garry
2020-02-28 16:20 ` Mark Brown
2020-02-28 16:20 ` Mark Brown
2020-02-28 16:20 ` Mark Brown
2020-02-28 17:17 ` John Garry [this message]
2020-02-28 17:17 ` John Garry
2020-02-28 17:17 ` John Garry
2020-02-28 18:25 ` Applied "spi: HiSilicon v3xx: Use DMI quirk to set controller buswidth override bits" to the spi tree Mark Brown
2020-02-28 18:25 ` Mark Brown
2020-02-28 18:25 ` Mark Brown
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