From: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> To: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Date: Fri, 7 Apr 2017 08:49:08 +0100 [thread overview] Message-ID: <a73bdb48-f424-2b45-ea0f-99781fd832f3@nvidia.com> (raw) In-Reply-To: <58E67152.1080400-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> On 06/04/17 17:48, Laxman Dewangan wrote: > > On Thursday 06 April 2017 08:56 PM, Jon Hunter wrote: >> On 06/04/17 15:21, Laxman Dewangan wrote: >>> In some of NVIDIA Tegra's platform, PWM controller is used to >>> control the PWM controlled regulators. PWM signal is connected to >>> the VID pin of the regulator where duty cycle of PWM signal decide >>> the voltage level of the regulator output. >>> >>> The tristate (high impedance of PWM pin form Tegra) also define >> s/form/from/ >> s/define/defines/ >> >>> one of the state of PWM regulator which needs to be configure in >>> suspend state of system. >> It maybe clearer to say that when the system enters suspend the >> regulator requires the pwm output to be tristated. > > Not necessarily that every PWM regulator interfaces needs it. It > depends on the devices. Yes I understand that. I am just saying the description could be a little clearer. > So I will say: > > When system enters suspend, in some of PWM regulator interface, it is > required to to set the PWM output to be tristated. Ok, but I think you should say why that is, because from the above sentence alone it is not clear. Maybe you should say that some PWM client/slave devices require the PWM output to be tristated. Jon -- nvpublic
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com> To: Laxman Dewangan <ldewangan@nvidia.com>, <thierry.reding@gmail.com>, <robh+dt@kernel.org> Cc: <mark.rutland@arm.com>, <linux-pwm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: Re: [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Date: Fri, 7 Apr 2017 08:49:08 +0100 [thread overview] Message-ID: <a73bdb48-f424-2b45-ea0f-99781fd832f3@nvidia.com> (raw) In-Reply-To: <58E67152.1080400@nvidia.com> On 06/04/17 17:48, Laxman Dewangan wrote: > > On Thursday 06 April 2017 08:56 PM, Jon Hunter wrote: >> On 06/04/17 15:21, Laxman Dewangan wrote: >>> In some of NVIDIA Tegra's platform, PWM controller is used to >>> control the PWM controlled regulators. PWM signal is connected to >>> the VID pin of the regulator where duty cycle of PWM signal decide >>> the voltage level of the regulator output. >>> >>> The tristate (high impedance of PWM pin form Tegra) also define >> s/form/from/ >> s/define/defines/ >> >>> one of the state of PWM regulator which needs to be configure in >>> suspend state of system. >> It maybe clearer to say that when the system enters suspend the >> regulator requires the pwm output to be tristated. > > Not necessarily that every PWM regulator interfaces needs it. It > depends on the devices. Yes I understand that. I am just saying the description could be a little clearer. > So I will say: > > When system enters suspend, in some of PWM regulator interface, it is > required to to set the PWM output to be tristated. Ok, but I think you should say why that is, because from the above sentence alone it is not clear. Maybe you should say that some PWM client/slave devices require the PWM output to be tristated. Jon -- nvpublic
next prev parent reply other threads:[~2017-04-07 7:49 UTC|newest] Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-04-06 14:20 [PATCH V2 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups Laxman Dewangan 2017-04-06 14:20 ` Laxman Dewangan 2017-04-06 14:20 ` [PATCH V2 2/4] pwm: tegra: Increase precision in pwm rate calculation Laxman Dewangan 2017-04-06 14:20 ` Laxman Dewangan [not found] ` <1491488461-24621-3-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-06 16:24 ` Thierry Reding 2017-04-06 16:24 ` Thierry Reding 2017-04-06 17:03 ` Laxman Dewangan 2017-04-06 16:28 ` Thierry Reding 2017-04-06 16:28 ` Thierry Reding [not found] ` <1491488461-24621-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-06 14:20 ` [PATCH V2 1/4] pwm: tegra: Use DIV_ROUND_CLOSEST_ULL() instead of local implementation Laxman Dewangan 2017-04-06 14:20 ` Laxman Dewangan 2017-04-06 16:28 ` Thierry Reding 2017-04-06 14:21 ` [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Laxman Dewangan 2017-04-06 14:21 ` Laxman Dewangan 2017-04-06 15:26 ` Jon Hunter 2017-04-06 15:26 ` Jon Hunter [not found] ` <f43c83a9-8ae0-73b0-d41d-97d3bc6c253e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-06 16:48 ` Laxman Dewangan 2017-04-06 16:48 ` Laxman Dewangan [not found] ` <58E67152.1080400-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-07 7:49 ` Jon Hunter [this message] 2017-04-07 7:49 ` Jon Hunter 2017-04-06 14:21 ` [PATCH V4 4/4] pwm: tegra: Add support to configure pin state " Laxman Dewangan 2017-04-06 14:21 ` Laxman Dewangan 2017-04-06 15:17 ` Jon Hunter 2017-04-06 15:17 ` Jon Hunter 2017-04-06 16:40 ` Laxman Dewangan 2017-04-06 16:40 ` Laxman Dewangan [not found] ` <58E66F8F.1030802-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-07 7:51 ` Jon Hunter 2017-04-07 7:51 ` Jon Hunter 2017-04-07 9:33 [PATCH V3 0/4] pwm: tegra: Pin configuration in suspend/resume and cleanups Laxman Dewangan 2017-04-07 9:34 ` [PATCH V3 3/4] pwm: tegra: Add DT binding details to configure pin in suspends/resume Laxman Dewangan 2017-04-07 9:34 ` Laxman Dewangan [not found] ` <1491557642-15940-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> 2017-04-07 10:25 ` Jon Hunter 2017-04-07 10:25 ` Jon Hunter 2017-04-10 20:13 ` Rob Herring
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