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From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>,
	linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] MIPS: Add arch CDMM definitions and probing
Date: Wed, 28 Jan 2015 23:09:17 +0000 (GMT)	[thread overview]
Message-ID: <alpine.LFD.2.11.1501280253280.28301@eddie.linux-mips.org> (raw)
In-Reply-To: <1422393401-13543-2-git-send-email-james.hogan@imgtec.com>

On Tue, 27 Jan 2015, James Hogan wrote:

> diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
> index 33866fce4d63..2086372fa72a 100644
> --- a/arch/mips/include/asm/cpu.h
> +++ b/arch/mips/include/asm/cpu.h
> @@ -370,6 +370,7 @@ enum cpu_type_enum {
>  #define MIPS_CPU_RIXIEX		0x200000000ull /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */
>  #define MIPS_CPU_MAAR		0x400000000ull /* MAAR(I) registers are present */
>  #define MIPS_CPU_FRE		0x800000000ull /* FRE & UFE bits implemented */
> +#define MIPS_CPU_CDMM		0x10000000000ll /* CPU has Common Device Memory Map */

 Is it a typo here: 0x10000000000ll vs 0x1000000000ull?

  Maciej

  reply	other threads:[~2015-01-29  1:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-27 21:16 [PATCH 0/3] Add MIPS CDMM bus support James Hogan
2015-01-27 21:16 ` James Hogan
2015-01-27 21:16 ` [PATCH 1/3] MIPS: Add arch CDMM definitions and probing James Hogan
2015-01-27 21:16   ` James Hogan
2015-01-28 23:09   ` Maciej W. Rozycki [this message]
2015-01-28 23:16     ` James Hogan
2015-01-27 21:16 ` [PATCH 2/3] MIPS: Add CDMM bus support James Hogan
2015-01-27 21:16   ` James Hogan
2015-01-27 21:16 ` [PATCH 3/3] MIPS: Malta: Implement mips_cdmm_phys_base() James Hogan
2015-01-27 21:16   ` James Hogan

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