From: Sean Anderson <seanga2@gmail.com> To: Zong Li <zong.li@sifive.com>, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org, yash.shah@sifive.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH 0/4] clk: add driver for the SiFive FU740 Date: Fri, 16 Oct 2020 10:17:43 -0400 [thread overview] Message-ID: <d0627c5b-1007-bca0-e6d6-0a3740eaf6a7@gmail.com> (raw) In-Reply-To: <cover.1602838910.git.zong.li@sifive.com> On 10/16/20 5:18 AM, Zong Li wrote: > Add a driver for the SiFive FU740 PRCI IP block, which handles more > clocks than FU540. These patches also refactor the original > implementation by spliting the dependent-code of fu540 and fu740 > respectively. > > Zong Li (4): > clk: sifive: Extract prci core to common base I don't see this patch, and it isn't listed on the web archive. Was it not CC'd to this list? --Sean > clk: sifive: Use common name for prci configuration > clk: sifive: Add a driver for the SiFive FU740 PRCI IP block > clk: sifive: Refactor __prci_clock array by using macro > > arch/riscv/Kconfig.socs | 2 +- > drivers/clk/sifive/Kconfig | 8 +- > drivers/clk/sifive/Makefile | 5 +- > drivers/clk/sifive/fu540-prci.c | 618 +----------------- > drivers/clk/sifive/fu540-prci.h | 21 + > drivers/clk/sifive/fu740-prci.c | 102 +++ > drivers/clk/sifive/fu740-prci.h | 21 + > drivers/clk/sifive/sifive-prci.c | 529 +++++++++++++++ > drivers/clk/sifive/sifive-prci.h | 297 +++++++++ > include/dt-bindings/clock/sifive-fu740-prci.h | 23 + > 10 files changed, 1032 insertions(+), 594 deletions(-) > create mode 100644 drivers/clk/sifive/fu540-prci.h > create mode 100644 drivers/clk/sifive/fu740-prci.c > create mode 100644 drivers/clk/sifive/fu740-prci.h > create mode 100644 drivers/clk/sifive/sifive-prci.c > create mode 100644 drivers/clk/sifive/sifive-prci.h > create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h >
WARNING: multiple messages have this Message-ID (diff)
From: Sean Anderson <seanga2@gmail.com> To: Zong Li <zong.li@sifive.com>, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, mturquette@baylibre.com, sboyd@kernel.org, yash.shah@sifive.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH 0/4] clk: add driver for the SiFive FU740 Date: Fri, 16 Oct 2020 10:17:43 -0400 [thread overview] Message-ID: <d0627c5b-1007-bca0-e6d6-0a3740eaf6a7@gmail.com> (raw) In-Reply-To: <cover.1602838910.git.zong.li@sifive.com> On 10/16/20 5:18 AM, Zong Li wrote: > Add a driver for the SiFive FU740 PRCI IP block, which handles more > clocks than FU540. These patches also refactor the original > implementation by spliting the dependent-code of fu540 and fu740 > respectively. > > Zong Li (4): > clk: sifive: Extract prci core to common base I don't see this patch, and it isn't listed on the web archive. Was it not CC'd to this list? --Sean > clk: sifive: Use common name for prci configuration > clk: sifive: Add a driver for the SiFive FU740 PRCI IP block > clk: sifive: Refactor __prci_clock array by using macro > > arch/riscv/Kconfig.socs | 2 +- > drivers/clk/sifive/Kconfig | 8 +- > drivers/clk/sifive/Makefile | 5 +- > drivers/clk/sifive/fu540-prci.c | 618 +----------------- > drivers/clk/sifive/fu540-prci.h | 21 + > drivers/clk/sifive/fu740-prci.c | 102 +++ > drivers/clk/sifive/fu740-prci.h | 21 + > drivers/clk/sifive/sifive-prci.c | 529 +++++++++++++++ > drivers/clk/sifive/sifive-prci.h | 297 +++++++++ > include/dt-bindings/clock/sifive-fu740-prci.h | 23 + > 10 files changed, 1032 insertions(+), 594 deletions(-) > create mode 100644 drivers/clk/sifive/fu540-prci.h > create mode 100644 drivers/clk/sifive/fu740-prci.c > create mode 100644 drivers/clk/sifive/fu740-prci.h > create mode 100644 drivers/clk/sifive/sifive-prci.c > create mode 100644 drivers/clk/sifive/sifive-prci.h > create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2020-10-16 14:17 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-16 9:18 [PATCH 0/4] clk: add driver for the SiFive FU740 Zong Li 2020-10-16 9:18 ` Zong Li 2020-10-16 9:18 ` [PATCH 1/4] clk: sifive: Extract prci core to common base Zong Li 2020-10-16 9:18 ` Zong Li 2020-11-05 2:45 ` Stephen Boyd 2020-11-05 2:45 ` Stephen Boyd 2020-11-05 7:22 ` Zong Li 2020-11-05 7:22 ` Zong Li 2020-11-05 9:19 ` Andreas Schwab 2020-11-05 9:19 ` Andreas Schwab 2020-11-05 9:30 ` Zong Li 2020-11-05 9:30 ` Zong Li 2020-10-16 9:18 ` [PATCH 2/4] clk: sifive: Use common name for prci configuration Zong Li 2020-10-16 9:18 ` Zong Li 2020-11-05 2:46 ` Stephen Boyd 2020-11-05 2:46 ` Stephen Boyd 2020-11-05 6:56 ` Zong Li 2020-11-05 6:56 ` Zong Li 2020-11-05 18:54 ` Palmer Dabbelt 2020-11-05 18:54 ` Palmer Dabbelt 2020-10-16 9:18 ` [PATCH 3/4] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block Zong Li 2020-10-16 9:18 ` Zong Li 2020-10-16 9:18 ` [PATCH 4/4] clk: sifive: Refactor __prci_clock array by using macro Zong Li 2020-10-16 9:18 ` Zong Li 2020-11-05 2:50 ` Stephen Boyd 2020-11-05 2:50 ` Stephen Boyd 2020-11-05 7:16 ` Zong Li 2020-11-05 7:16 ` Zong Li 2020-10-16 14:17 ` Sean Anderson [this message] 2020-10-16 14:17 ` [PATCH 0/4] clk: add driver for the SiFive FU740 Sean Anderson 2020-10-16 14:56 ` Zong Li 2020-10-16 14:56 ` Zong Li 2020-11-04 6:37 ` Zong Li 2020-11-04 6:37 ` Zong Li
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